pm.h 3.0 KB

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  1. /*
  2. * Register definitions for the Power Manager (PM)
  3. */
  4. #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
  5. #define __ARCH_AVR32_MACH_AT32AP_PM_H__
  6. /* PM register offsets */
  7. #define PM_MCCTRL 0x0000
  8. #define PM_CKSEL 0x0004
  9. #define PM_CPU_MASK 0x0008
  10. #define PM_HSB_MASK 0x000c
  11. #define PM_PBA_MASK 0x0010
  12. #define PM_PBB_MASK 0x0014
  13. #define PM_PLL0 0x0020
  14. #define PM_PLL1 0x0024
  15. #define PM_IER 0x0040
  16. #define PM_IDR 0x0044
  17. #define PM_IMR 0x0048
  18. #define PM_ISR 0x004c
  19. #define PM_ICR 0x0050
  20. #define PM_GCCTRL(x) (0x0060 + 4 * (x))
  21. #define PM_RCAUSE 0x00c0
  22. /* Bitfields in CKSEL */
  23. #define PM_CPUSEL_OFFSET 0
  24. #define PM_CPUSEL_SIZE 3
  25. #define PM_CPUDIV_OFFSET 7
  26. #define PM_CPUDIV_SIZE 1
  27. #define PM_HSBSEL_OFFSET 8
  28. #define PM_HSBSEL_SIZE 3
  29. #define PM_HSBDIV_OFFSET 15
  30. #define PM_HSBDIV_SIZE 1
  31. #define PM_PBASEL_OFFSET 16
  32. #define PM_PBASEL_SIZE 3
  33. #define PM_PBADIV_OFFSET 23
  34. #define PM_PBADIV_SIZE 1
  35. #define PM_PBBSEL_OFFSET 24
  36. #define PM_PBBSEL_SIZE 3
  37. #define PM_PBBDIV_OFFSET 31
  38. #define PM_PBBDIV_SIZE 1
  39. /* Bitfields in PLL0 */
  40. #define PM_PLLEN_OFFSET 0
  41. #define PM_PLLEN_SIZE 1
  42. #define PM_PLLOSC_OFFSET 1
  43. #define PM_PLLOSC_SIZE 1
  44. #define PM_PLLOPT_OFFSET 2
  45. #define PM_PLLOPT_SIZE 3
  46. #define PM_PLLDIV_OFFSET 8
  47. #define PM_PLLDIV_SIZE 8
  48. #define PM_PLLMUL_OFFSET 16
  49. #define PM_PLLMUL_SIZE 8
  50. #define PM_PLLCOUNT_OFFSET 24
  51. #define PM_PLLCOUNT_SIZE 6
  52. #define PM_PLLTEST_OFFSET 31
  53. #define PM_PLLTEST_SIZE 1
  54. /* Bitfields in ICR */
  55. #define PM_LOCK0_OFFSET 0
  56. #define PM_LOCK0_SIZE 1
  57. #define PM_LOCK1_OFFSET 1
  58. #define PM_LOCK1_SIZE 1
  59. #define PM_WAKE_OFFSET 2
  60. #define PM_WAKE_SIZE 1
  61. #define PM_CKRDY_OFFSET 5
  62. #define PM_CKRDY_SIZE 1
  63. #define PM_MSKRDY_OFFSET 6
  64. #define PM_MSKRDY_SIZE 1
  65. /* Bitfields in GCCTRL0 */
  66. #define PM_OSCSEL_OFFSET 0
  67. #define PM_OSCSEL_SIZE 1
  68. #define PM_PLLSEL_OFFSET 1
  69. #define PM_PLLSEL_SIZE 1
  70. #define PM_CEN_OFFSET 2
  71. #define PM_CEN_SIZE 1
  72. #define PM_DIVEN_OFFSET 4
  73. #define PM_DIVEN_SIZE 1
  74. #define PM_DIV_OFFSET 8
  75. #define PM_DIV_SIZE 8
  76. /* Bitfields in RCAUSE */
  77. #define PM_POR_OFFSET 0
  78. #define PM_POR_SIZE 1
  79. #define PM_EXT_OFFSET 2
  80. #define PM_EXT_SIZE 1
  81. #define PM_WDT_OFFSET 3
  82. #define PM_WDT_SIZE 1
  83. #define PM_NTAE_OFFSET 4
  84. #define PM_NTAE_SIZE 1
  85. /* Bit manipulation macros */
  86. #define PM_BIT(name) \
  87. (1 << PM_##name##_OFFSET)
  88. #define PM_BF(name,value) \
  89. (((value) & ((1 << PM_##name##_SIZE) - 1)) \
  90. << PM_##name##_OFFSET)
  91. #define PM_BFEXT(name,value) \
  92. (((value) >> PM_##name##_OFFSET) \
  93. & ((1 << PM_##name##_SIZE) - 1))
  94. #define PM_BFINS(name,value,old)\
  95. (((old) & ~(((1 << PM_##name##_SIZE) - 1) \
  96. << PM_##name##_OFFSET)) \
  97. | PM_BF(name,value))
  98. /* Register access macros */
  99. #define pm_readl(reg) \
  100. __raw_readl((void __iomem __force *)PM_BASE + PM_##reg)
  101. #define pm_writel(reg,value) \
  102. __raw_writel((value), (void __iomem __force *)PM_BASE + PM_##reg)
  103. #endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */