clock.c 6.3 KB

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  1. /*
  2. * Clock management for AT32AP CPUs
  3. *
  4. * Copyright (C) 2006 Atmel Corporation
  5. *
  6. * Based on arch/arm/mach-at91/clock.c
  7. * Copyright (C) 2005 David Brownell
  8. * Copyright (C) 2005 Ivan Kokshaysky
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/err.h>
  16. #include <linux/export.h>
  17. #include <linux/device.h>
  18. #include <linux/string.h>
  19. #include <linux/list.h>
  20. #include <mach/chip.h>
  21. #include "clock.h"
  22. /* at32 clock list */
  23. static LIST_HEAD(at32_clock_list);
  24. static DEFINE_SPINLOCK(clk_lock);
  25. static DEFINE_SPINLOCK(clk_list_lock);
  26. void at32_clk_register(struct clk *clk)
  27. {
  28. spin_lock(&clk_list_lock);
  29. /* add the new item to the end of the list */
  30. list_add_tail(&clk->list, &at32_clock_list);
  31. spin_unlock(&clk_list_lock);
  32. }
  33. static struct clk *__clk_get(struct device *dev, const char *id)
  34. {
  35. struct clk *clk;
  36. list_for_each_entry(clk, &at32_clock_list, list) {
  37. if (clk->dev == dev && strcmp(id, clk->name) == 0) {
  38. return clk;
  39. }
  40. }
  41. return ERR_PTR(-ENOENT);
  42. }
  43. struct clk *clk_get(struct device *dev, const char *id)
  44. {
  45. struct clk *clk;
  46. spin_lock(&clk_list_lock);
  47. clk = __clk_get(dev, id);
  48. spin_unlock(&clk_list_lock);
  49. return clk;
  50. }
  51. EXPORT_SYMBOL(clk_get);
  52. void clk_put(struct clk *clk)
  53. {
  54. /* clocks are static for now, we can't free them */
  55. }
  56. EXPORT_SYMBOL(clk_put);
  57. static void __clk_enable(struct clk *clk)
  58. {
  59. if (clk->parent)
  60. __clk_enable(clk->parent);
  61. if (clk->users++ == 0 && clk->mode)
  62. clk->mode(clk, 1);
  63. }
  64. int clk_enable(struct clk *clk)
  65. {
  66. unsigned long flags;
  67. spin_lock_irqsave(&clk_lock, flags);
  68. __clk_enable(clk);
  69. spin_unlock_irqrestore(&clk_lock, flags);
  70. return 0;
  71. }
  72. EXPORT_SYMBOL(clk_enable);
  73. static void __clk_disable(struct clk *clk)
  74. {
  75. if (clk->users == 0) {
  76. printk(KERN_ERR "%s: mismatched disable\n", clk->name);
  77. WARN_ON(1);
  78. return;
  79. }
  80. if (--clk->users == 0 && clk->mode)
  81. clk->mode(clk, 0);
  82. if (clk->parent)
  83. __clk_disable(clk->parent);
  84. }
  85. void clk_disable(struct clk *clk)
  86. {
  87. unsigned long flags;
  88. spin_lock_irqsave(&clk_lock, flags);
  89. __clk_disable(clk);
  90. spin_unlock_irqrestore(&clk_lock, flags);
  91. }
  92. EXPORT_SYMBOL(clk_disable);
  93. unsigned long clk_get_rate(struct clk *clk)
  94. {
  95. unsigned long flags;
  96. unsigned long rate;
  97. spin_lock_irqsave(&clk_lock, flags);
  98. rate = clk->get_rate(clk);
  99. spin_unlock_irqrestore(&clk_lock, flags);
  100. return rate;
  101. }
  102. EXPORT_SYMBOL(clk_get_rate);
  103. long clk_round_rate(struct clk *clk, unsigned long rate)
  104. {
  105. unsigned long flags, actual_rate;
  106. if (!clk->set_rate)
  107. return -ENOSYS;
  108. spin_lock_irqsave(&clk_lock, flags);
  109. actual_rate = clk->set_rate(clk, rate, 0);
  110. spin_unlock_irqrestore(&clk_lock, flags);
  111. return actual_rate;
  112. }
  113. EXPORT_SYMBOL(clk_round_rate);
  114. int clk_set_rate(struct clk *clk, unsigned long rate)
  115. {
  116. unsigned long flags;
  117. long ret;
  118. if (!clk->set_rate)
  119. return -ENOSYS;
  120. spin_lock_irqsave(&clk_lock, flags);
  121. ret = clk->set_rate(clk, rate, 1);
  122. spin_unlock_irqrestore(&clk_lock, flags);
  123. return (ret < 0) ? ret : 0;
  124. }
  125. EXPORT_SYMBOL(clk_set_rate);
  126. int clk_set_parent(struct clk *clk, struct clk *parent)
  127. {
  128. unsigned long flags;
  129. int ret;
  130. if (!clk->set_parent)
  131. return -ENOSYS;
  132. spin_lock_irqsave(&clk_lock, flags);
  133. ret = clk->set_parent(clk, parent);
  134. spin_unlock_irqrestore(&clk_lock, flags);
  135. return ret;
  136. }
  137. EXPORT_SYMBOL(clk_set_parent);
  138. struct clk *clk_get_parent(struct clk *clk)
  139. {
  140. return clk->parent;
  141. }
  142. EXPORT_SYMBOL(clk_get_parent);
  143. #ifdef CONFIG_DEBUG_FS
  144. /* /sys/kernel/debug/at32ap_clk */
  145. #include <linux/io.h>
  146. #include <linux/debugfs.h>
  147. #include <linux/seq_file.h>
  148. #include "pm.h"
  149. #define NEST_DELTA 2
  150. #define NEST_MAX 6
  151. struct clkinf {
  152. struct seq_file *s;
  153. unsigned nest;
  154. };
  155. static void
  156. dump_clock(struct clk *parent, struct clkinf *r)
  157. {
  158. unsigned nest = r->nest;
  159. char buf[16 + NEST_MAX];
  160. struct clk *clk;
  161. unsigned i;
  162. /* skip clocks coupled to devices that aren't registered */
  163. if (parent->dev && !dev_name(parent->dev) && !parent->users)
  164. return;
  165. /* <nest spaces> name <pad to end> */
  166. memset(buf, ' ', sizeof(buf) - 1);
  167. buf[sizeof(buf) - 1] = 0;
  168. i = strlen(parent->name);
  169. memcpy(buf + nest, parent->name,
  170. min(i, (unsigned)(sizeof(buf) - 1 - nest)));
  171. seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
  172. buf, parent->set_parent ? '*' : ' ',
  173. parent->users,
  174. parent->users ? "on" : "off", /* NOTE: not-paranoid!! */
  175. clk_get_rate(parent));
  176. if (parent->dev)
  177. seq_printf(r->s, ", for %s", dev_name(parent->dev));
  178. seq_printf(r->s, "\n");
  179. /* cost of this scan is small, but not linear... */
  180. r->nest = nest + NEST_DELTA;
  181. list_for_each_entry(clk, &at32_clock_list, list) {
  182. if (clk->parent == parent)
  183. dump_clock(clk, r);
  184. }
  185. r->nest = nest;
  186. }
  187. static int clk_show(struct seq_file *s, void *unused)
  188. {
  189. struct clkinf r;
  190. int i;
  191. struct clk *clk;
  192. /* show all the power manager registers */
  193. seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
  194. seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL));
  195. seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
  196. seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
  197. seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
  198. seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
  199. seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
  200. seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1));
  201. seq_printf(s, "IMR = %8x\n", pm_readl(IMR));
  202. for (i = 0; i < 8; i++) {
  203. if (i == 5)
  204. continue;
  205. seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
  206. }
  207. seq_printf(s, "\n");
  208. r.s = s;
  209. r.nest = 0;
  210. /* protected from changes on the list while dumping */
  211. spin_lock(&clk_list_lock);
  212. /* show clock tree as derived from the three oscillators */
  213. clk = __clk_get(NULL, "osc32k");
  214. dump_clock(clk, &r);
  215. clk_put(clk);
  216. clk = __clk_get(NULL, "osc0");
  217. dump_clock(clk, &r);
  218. clk_put(clk);
  219. clk = __clk_get(NULL, "osc1");
  220. dump_clock(clk, &r);
  221. clk_put(clk);
  222. spin_unlock(&clk_list_lock);
  223. return 0;
  224. }
  225. static int clk_open(struct inode *inode, struct file *file)
  226. {
  227. return single_open(file, clk_show, NULL);
  228. }
  229. static const struct file_operations clk_operations = {
  230. .open = clk_open,
  231. .read = seq_read,
  232. .llseek = seq_lseek,
  233. .release = single_release,
  234. };
  235. static int __init clk_debugfs_init(void)
  236. {
  237. (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
  238. NULL, NULL, &clk_operations);
  239. return 0;
  240. }
  241. postcore_initcall(clk_debugfs_init);
  242. #endif