<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
<!-- Awlsim project file generated by awlsim-0.52 -->
<awlsim_project date_create="2012-08-13 00:00:00.000000"
                date_modify="2017-04-26 20:00:30.059887"
                format_version="1">
	<!-- CPU core configuration -->
	<cpu>
		<!-- CPU core feature specification -->
		<specs nr_accus="2"
		       nr_counters="256"
		       nr_flags="2048"
		       nr_inputs="128"
		       nr_localbytes="1024"
		       nr_outputs="128"
		       nr_timers="256" />

		<!-- CPU core configuration -->
		<config clock_memory_byte="-1"
		        ext_insns_enable="0"
		        mnemonics="2"
		        ob_startinfo_enable="0" />
	</cpu>

	<!-- AWL/STL language configuration -->
	<language_awl>
		<!-- AWL/STL source code -->
		<source name="Main"
		        type="0"><![CDATA[
ORGANIZATION_BLOCK OB 1
BEGIN
	
	CALL	FC 1
	CALL	FC 2
	CALL	FB 1, DB 2 (
		INPUT_VAR := 1
	)
	CALL	FC 30 (
		INP0	:= E 42.0,
		INP1	:= E 42.1,
		INP2	:= E 42.2,
		INP3	:= E 42.3,
		INP4	:= E 42.4,
		OUT0	:= A 42.0,
		RET_VAL	:= A 42.1,
	)
	
	AUF	DB 1
	L	DBD 2
	T	MD 16
	
END_ORGANIZATION_BLOCK

]]></source>

		<!-- AWL/STL source code -->
		<source name="FC 1"
		        type="0"><![CDATA[
FUNCTION FC 1: VOID
BEGIN
	
	U	E 0.0
	=	A 0.0
	
	U	"test_symbol_E"
	=	"test_symbol_A"
	
END_FUNCTION

]]></source>

		<!-- AWL/STL source code -->
		<source name="FC 2"
		        type="0"><![CDATA[
FUNCTION FC 2: VOID
TITLE = light chaser
BEGIN
	U	M 0.0
	L	S5T#200MS
	SV	T 10
	UN	T 10
	=	M 0.0

	L	MD 4
	L	1
	==D
	S	M 0.1
	RRD	1
	==D
	R	M 0.1
	
	L	MD 4
	UD	L#-1
	L	1
	SPZ	_001
	TAK
	U	M 0.0
	SPBN	_001
	U	M 0.1
	SPBN	_000
	RLD	2
_000:	RRD	1
_001:	T	MD 4
	
	// Outputs in AD 4 and AD 8
	L	MD 4
	T	AD 4
	TAD
	T	AD 8
END_FUNCTION

]]></source>

		<!-- AWL/STL source code -->
		<source name="FB 1"
		        type="0"><![CDATA[
FUNCTION_BLOCK FB 1
	VAR_INPUT
		INPUT_VAR : INT;
	END_VAR
BEGIN
	L	#INPUT_VAR
	T	MW 20
END_FUNCTION_BLOCK


DATA_BLOCK DB 2
	TITLE = This is an instance DB for FB 1
	FB 1
BEGIN
	INPUT_VAR := 123;
END_DATA_BLOCK

]]></source>

		<!-- AWL/STL source code -->
		<source name="DB 1"
		        type="0"><![CDATA[
DATA_BLOCK DB 1
TITLE = This is global DB 1
STRUCT
	VAR1 : INT;	// DBW0: VAR1 => 16 bit signed int
	VAR2 : DWORD;	// DBD2: VAR2 => 32 bit unsigned dword
	VAR3 : WORD;	// DBW6: VAR3 => 16 bit unsigned word
END_STRUCT
BEGIN
	VAR1 := 1337;
	VAR2 := DW#16#DEADBEEF;
	VAR3 := B#(1, 2);
END_DATA_BLOCK

]]></source>
	</language_awl>

	<!-- FUP/FBD language configuration -->
	<language_fup>
		<!-- FUP/FBD source code -->
		<source name="Diagram 1"
		        type="1"><![CDATA[
<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
<FUP version="0">
	<blockdecl name="FC 30" type="FC" />
	<interface allow_initvalue="0" allow_inouts="1" allow_inputs="1" allow_outputs="1" allow_retval="1" allow_stats="0" allow_temps="1">
		<inputs>
			<field name="INP0" type="BOOL" />
			<field name="INP1" type="BOOL" />
			<field name="INP2" type="BOOL" />
			<field name="INP3" type="BOOL" />
			<field name="INP4" type="BOOL" />
		</inputs>
		<outputs>
			<field name="OUT0" type="BOOL" />
		</outputs>
		<retval>
			<field name="RET_VAL" type="BOOL" />
		</retval>
	</interface>
	<grids>
		<grid height="18" width="12">
			<wires>
				<wire id="0" />
				<wire id="1" />
				<wire id="3" />
				<wire id="4" />
				<wire id="5" />
				<wire id="6" />
				<wire id="7" />
				<wire id="8" />
				<wire id="9" />
			</wires>
			<elements>
				<element subtype="and" type="boolean" x="2" y="2">
					<connections>
						<connection dir_in="1" dir_out="0" pos="0" wire="0" />
						<connection dir_in="1" dir_out="0" pos="1" wire="1" />
						<connection dir_in="0" dir_out="1" pos="0" wire="6" />
					</connections>
				</element>
				<element content="#INP0" subtype="load" type="operand" x="1" y="2">
					<connections>
						<connection dir_in="0" dir_out="1" pos="0" wire="0" />
					</connections>
				</element>
				<element content="#INP1" subtype="load" type="operand" x="1" y="3">
					<connections>
						<connection dir_in="0" dir_out="1" pos="0" wire="1" />
					</connections>
				</element>
				<element content="#OUT0" subtype="assign" type="operand" x="4" y="5">
					<connections>
						<connection dir_in="1" dir_out="0" pos="0" wire="5" />
					</connections>
				</element>
				<element subtype="or" type="boolean" x="3" y="4">
					<connections>
						<connection dir_in="1" dir_out="0" pos="0" wire="6" />
						<connection dir_in="1" dir_out="0" pos="1" wire="7" />
						<connection dir_in="0" dir_out="1" pos="0" wire="5" />
					</connections>
				</element>
				<element subtype="and" type="boolean" x="2" y="5">
					<connections>
						<connection dir_in="1" dir_out="0" pos="0" wire="3" />
						<connection dir_in="1" dir_out="0" pos="1" wire="4" />
						<connection dir_in="0" dir_out="1" pos="0" wire="7" />
					</connections>
				</element>
				<element content="#INP2" subtype="load" type="operand" x="1" y="5">
					<connections>
						<connection dir_in="0" dir_out="1" pos="0" wire="3" />
					</connections>
				</element>
				<element content="#INP3" subtype="load" type="operand" x="1" y="6">
					<connections>
						<connection dir_in="0" dir_out="1" pos="0" wire="4" />
					</connections>
				</element>
				<element subtype="and" type="boolean" x="4" y="8">
					<connections>
						<connection dir_in="1" dir_out="0" pos="0" wire="5" />
						<connection dir_in="1" dir_out="0" pos="1" wire="8" />
						<connection dir_in="0" dir_out="1" pos="0" wire="9" />
					</connections>
				</element>
				<element content="#INP4" subtype="load" type="operand" x="3" y="9">
					<connections>
						<connection dir_in="0" dir_out="1" pos="0" wire="8" />
					</connections>
				</element>
				<element content="#RET_VAL" subtype="assign" type="operand" x="5" y="9">
					<connections>
						<connection dir_in="1" dir_out="0" pos="0" wire="9" />
					</connections>
				</element>
			</elements>
		</grid>
	</grids>
</FUP>
]]></source>
	</language_fup>

	<!-- Symbol table configuration -->
	<symbols>
		<!-- symbol table source code -->
		<source name="symbol table"
		        type="3"><![CDATA[
126,test_symbol_E           E 32.0      BOOL      This is a symbol                                                                
126,test_symbol_A           A 32.0      BOOL                                                                                      

]]></source>
	</symbols>

	<!-- Standard library selections -->
	<libraries>
		<!-- Standard library selection -->
		<lib_selection effective_index="21"
		               index="21"
		               name="IEC"
		               type="FC" />
	</libraries>

	<!-- Core server link configuration -->
	<core_link>
		<!-- Locally spawned core server -->
		<spawn_local enable="1"
		             interpreters="$DEFAULT"
		             port_range_begin="4183"
		             port_range_end="8278" />

		<!-- Remote server connection -->
		<connect host="192.168.179.31"
		         port="4151"
		         timeout_ms="3000" />

		<!-- Transport tunnel -->
		<tunnel local_port="-1"
		        type="0">
			<ssh executable="ssh"
			     port="22"
			     user="pi" />
		</tunnel>
	</core_link>

	<!-- Hardware modules configuration -->
	<hardware>
		<!-- Loaded hardware module -->
		<module name="dummy">
			<params>
				<param name="inputAddressBase"
				       value="0" />
				<param name="outputAddressBase"
				       value="0" />
				<param name="removeOnReset"
				       value="True" />
			</params>
		</module>
	</hardware>

	<!-- Graphical user interface configuration -->
	<gui>
		<editor autoindent="1"
		        font="Courier,11,-1,5,50,0,0,0,0,0"
		        paste_autoindent="1"
		        validation="1" />
	</gui>
</awlsim_project>
