0004-Disable-loading-microcode-in-various-devicetrees.patch 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226
  1. From a44b8f4e28bb1e0c6c19d529620548be3fb02331 Mon Sep 17 00:00:00 2001
  2. From: Leah Rowe <info@minifree.org>
  3. Date: Thu, 28 Nov 2024 21:05:49 +0000
  4. Subject: [PATCH 1/1] Disable loading microcode in various devicetrees
  5. I got build errors because of these. They are not included
  6. in the code at all, because of Canoeboot's de-blobbing rules.
  7. Remove them.
  8. Signed-off-by: Leah Rowe <info@minifree.org>
  9. ---
  10. arch/x86/dts/bayleybay.dts | 12 ------------
  11. arch/x86/dts/baytrail_som-db5800-som-6867.dts | 9 ---------
  12. arch/x86/dts/cherryhill.dts | 13 -------------
  13. arch/x86/dts/chromebook_link.dts | 9 ---------
  14. arch/x86/dts/chromebook_samus.dts | 8 --------
  15. arch/x86/dts/conga-qeval20-qa3-e3845.dts | 8 --------
  16. arch/x86/dts/cougarcanyon2.dts | 18 ------------------
  17. arch/x86/dts/crownbay.dts | 6 ------
  18. arch/x86/dts/dfi-bt700.dtsi | 8 --------
  19. arch/x86/dts/minnowmax.dts | 9 ---------
  20. 10 files changed, 100 deletions(-)
  21. diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
  22. index 59403f40ce..0d55503271 100644
  23. --- a/arch/x86/dts/bayleybay.dts
  24. +++ b/arch/x86/dts/bayleybay.dts
  25. @@ -273,16 +273,4 @@
  26. fsp,enable-igd;
  27. };
  28. - microcode {
  29. - update@0 {
  30. -#include "microcode/m0230671117.dtsi"
  31. - };
  32. - update@1 {
  33. -#include "microcode/m0130673325.dtsi"
  34. - };
  35. - update@2 {
  36. -#include "microcode/m0130679907.dtsi"
  37. - };
  38. - };
  39. -
  40. };
  41. diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
  42. index 4e12c4a40c..caf10e90df 100644
  43. --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts
  44. +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
  45. @@ -291,13 +291,4 @@
  46. fsp,enable-igd;
  47. };
  48. - microcode {
  49. - update@0 {
  50. -#include "microcode/m0130673325.dtsi"
  51. - };
  52. - update@1 {
  53. -#include "microcode/m0130679907.dtsi"
  54. - };
  55. - };
  56. -
  57. };
  58. diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
  59. index 3d35e4643c..c78e587186 100644
  60. --- a/arch/x86/dts/cherryhill.dts
  61. +++ b/arch/x86/dts/cherryhill.dts
  62. @@ -200,17 +200,4 @@
  63. fsp,sd-detect-chk;
  64. };
  65. };
  66. -
  67. - microcode {
  68. - update@0 {
  69. -#include "microcode/m01406c2220.dtsi"
  70. - };
  71. - update@1 {
  72. -#include "microcode/m01406c3363.dtsi"
  73. - };
  74. - update@2 {
  75. -#include "microcode/m01406c440a.dtsi"
  76. - };
  77. - };
  78. -
  79. };
  80. diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
  81. index c904b7d0b6..66e08e6226 100644
  82. --- a/arch/x86/dts/chromebook_link.dts
  83. +++ b/arch/x86/dts/chromebook_link.dts
  84. @@ -514,15 +514,6 @@
  85. reg = <0xfed40000 0x5000>;
  86. compatible = "infineon,slb9635lpc";
  87. };
  88. -
  89. - microcode {
  90. - bootph-all;
  91. - update@0 {
  92. - bootph-all;
  93. -#include "microcode/m12306a9_0000001b.dtsi"
  94. - };
  95. - };
  96. -
  97. };
  98. &creative_codec {
  99. diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
  100. index ddff277046..f2c980aaff 100644
  101. --- a/arch/x86/dts/chromebook_samus.dts
  102. +++ b/arch/x86/dts/chromebook_samus.dts
  103. @@ -686,14 +686,6 @@
  104. };
  105. };
  106. - microcode {
  107. - bootph-all;
  108. - update@0 {
  109. - bootph-all;
  110. -#include "microcode/mc0306d4_00000018.dtsi"
  111. - };
  112. - };
  113. -
  114. sound {
  115. compatible = "google,samus-sound";
  116. codec-enable-gpio = <&gpio_b 11 GPIO_ACTIVE_HIGH>;
  117. diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
  118. index c6577b30c8..d08103b5d9 100644
  119. --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
  120. +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
  121. @@ -301,12 +301,4 @@
  122. };
  123. };
  124. - microcode {
  125. - update@0 {
  126. -#include "microcode/m0130673325.dtsi"
  127. - };
  128. - update@1 {
  129. -#include "microcode/m0130679907.dtsi"
  130. - };
  131. - };
  132. };
  133. diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts
  134. index 4833aab21c..a11504c235 100644
  135. --- a/arch/x86/dts/cougarcanyon2.dts
  136. +++ b/arch/x86/dts/cougarcanyon2.dts
  137. @@ -65,24 +65,6 @@
  138. };
  139. };
  140. - microcode {
  141. - update@0 {
  142. -#include "microcode/m12306a2_00000008.dtsi"
  143. - };
  144. - update@1 {
  145. -#include "microcode/m12306a4_00000007.dtsi"
  146. - };
  147. - update@2 {
  148. -#include "microcode/m12306a5_00000007.dtsi"
  149. - };
  150. - update@3 {
  151. -#include "microcode/m12306a8_00000010.dtsi"
  152. - };
  153. - update@4 {
  154. -#include "microcode/m12306a9_0000001b.dtsi"
  155. - };
  156. - };
  157. -
  158. fsp {
  159. compatible = "intel,ivybridge-fsp";
  160. fsp,enable-ht;
  161. diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
  162. index 64282303fb..fd752758c5 100644
  163. --- a/arch/x86/dts/crownbay.dts
  164. +++ b/arch/x86/dts/crownbay.dts
  165. @@ -61,12 +61,6 @@
  166. stdout-path = "/serial";
  167. };
  168. - microcode {
  169. - update@0 {
  170. -#include "microcode/m0220661105_cv.dtsi"
  171. - };
  172. - };
  173. -
  174. pci {
  175. #address-cells = <3>;
  176. #size-cells = <2>;
  177. diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi
  178. index 868cea4d18..8a9f5cfb12 100644
  179. --- a/arch/x86/dts/dfi-bt700.dtsi
  180. +++ b/arch/x86/dts/dfi-bt700.dtsi
  181. @@ -319,12 +319,4 @@
  182. };
  183. };
  184. - microcode {
  185. - update@0 {
  186. -#include "microcode/m0130673325.dtsi"
  187. - };
  188. - update@1 {
  189. -#include "microcode/m0130679907.dtsi"
  190. - };
  191. - };
  192. };
  193. diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
  194. index f44b9bbc53..e059c11421 100644
  195. --- a/arch/x86/dts/minnowmax.dts
  196. +++ b/arch/x86/dts/minnowmax.dts
  197. @@ -318,13 +318,4 @@
  198. };
  199. };
  200. - microcode {
  201. - update@0 {
  202. -#include "microcode/m0130673325.dtsi"
  203. - };
  204. - update@1 {
  205. -#include "microcode/m0130679907.dtsi"
  206. - };
  207. - };
  208. -
  209. };
  210. --
  211. 2.39.5