Makefile 1.2 KB

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  1. # This is slightly incorrect, but works well enough. If we let all.a
  2. # alone be the default target, make may scan the objects and decide
  3. # all.a is up to date *before* entering subdirectories are re-building
  4. # those very objects. So just make sure to enter subdirectories first.
  5. default: build all.a
  6. include rules.mk
  7. # The atrocity below makes sure directories are entered to build files
  8. # inside and each directory is only entered once.
  9. #
  10. # Listing */*.c from the top directory while also allowing to build them
  11. # from within each directory makes the build ambiguous, as the rules
  12. # aren't guaranteed to match, and requires special compiler commands since
  13. # gcc -c dir/file.c creates file.o instead of dir/file.o.
  14. define subdir
  15. srcs-$1 = $$(sort $(wildcard $1*.$2))
  16. objs-$1 = $$(patsubst %.$2,%.o,$$(srcs-$1))
  17. $$(foreach file,$$(srcs-$1),\
  18. $$(eval $$(file:.$2=.o): $$(file)))
  19. $$(objs-$1): build-$1
  20. .SILENT: build-$1
  21. build-$1: $$(srcs-$1)
  22. $$(MAKE) -C $1
  23. build: build-$1
  24. objs += $$(objs-$1)
  25. clean += $1*.o $1*.d
  26. endef
  27. subdirs = $(filter-out arch/, $(sort $(dir $(wildcard */Makefile))))
  28. $(eval $(call subdir,arch/$(ARCH)/,s))
  29. $(foreach d,$(subdirs),$(eval $(call subdir,$d,c)))
  30. all.a: $(objs)
  31. $(AR) cr $@ $^
  32. clean += */stamp all.a