mixart_hwdep.h 6.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146
  1. /*
  2. * Driver for Digigram miXart soundcards
  3. *
  4. * definitions and makros for basic card access
  5. *
  6. * Copyright (c) 2003 by Digigram <alsa@digigram.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #ifndef __SOUND_MIXART_HWDEP_H
  23. #define __SOUND_MIXART_HWDEP_H
  24. #include <sound/hwdep.h>
  25. #define readl_be(x) be32_to_cpu(__raw_readl(x))
  26. #define writel_be(data,addr) __raw_writel(cpu_to_be32(data),addr)
  27. #define readl_le(x) le32_to_cpu(__raw_readl(x))
  28. #define writel_le(data,addr) __raw_writel(cpu_to_le32(data),addr)
  29. #define MIXART_MEM(mgr,x) ((mgr)->mem[0].virt + (x))
  30. #define MIXART_REG(mgr,x) ((mgr)->mem[1].virt + (x))
  31. /* Daughter board Type */
  32. #define DAUGHTER_TYPE_MASK 0x0F
  33. #define DAUGHTER_VER_MASK 0xF0
  34. #define DAUGHTER_TYPEVER_MASK (DAUGHTER_TYPE_MASK|DAUGHTER_VER_MASK)
  35. #define MIXART_DAUGHTER_TYPE_NONE 0x00
  36. #define MIXART_DAUGHTER_TYPE_COBRANET 0x08
  37. #define MIXART_DAUGHTER_TYPE_AES 0x0E
  38. #define MIXART_BA0_SIZE (16 * 1024 * 1024) /* 16M */
  39. #define MIXART_BA1_SIZE (4 * 1024) /* 4k */
  40. /*
  41. * -----------BAR 0 --------------------------------------------------------------------------------------------------------
  42. */
  43. #define MIXART_PSEUDOREG 0x2000 /* base address for pseudoregister */
  44. #define MIXART_PSEUDOREG_BOARDNUMBER MIXART_PSEUDOREG+0 /* board number */
  45. /* perfmeter (available when elf loaded)*/
  46. #define MIXART_PSEUDOREG_PERF_STREAM_LOAD_OFFSET MIXART_PSEUDOREG+0x70 /* streaming load */
  47. #define MIXART_PSEUDOREG_PERF_SYSTEM_LOAD_OFFSET MIXART_PSEUDOREG+0x78 /* system load (reference)*/
  48. #define MIXART_PSEUDOREG_PERF_MAILBX_LOAD_OFFSET MIXART_PSEUDOREG+0x7C /* mailbox load */
  49. #define MIXART_PSEUDOREG_PERF_INTERR_LOAD_OFFSET MIXART_PSEUDOREG+0x74 /* interrupt handling load */
  50. /* motherboard xilinx loader info */
  51. #define MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET MIXART_PSEUDOREG+0x9C /* 0x00600000 */
  52. #define MIXART_PSEUDOREG_MXLX_SIZE_OFFSET MIXART_PSEUDOREG+0xA0 /* xilinx size in bytes */
  53. #define MIXART_PSEUDOREG_MXLX_STATUS_OFFSET MIXART_PSEUDOREG+0xA4 /* status = EMBEBBED_STAT_XXX */
  54. /* elf loader info */
  55. #define MIXART_PSEUDOREG_ELF_STATUS_OFFSET MIXART_PSEUDOREG+0xB0 /* status = EMBEBBED_STAT_XXX */
  56. /*
  57. * after the elf code is loaded, and the flowtable info was passed to it,
  58. * the driver polls on this address, until it shows 1 (presence) or 2 (absence)
  59. * once it is non-zero, the daughter board type may be read
  60. */
  61. #define MIXART_PSEUDOREG_DBRD_PRESENCE_OFFSET MIXART_PSEUDOREG+0x990
  62. /* Global info structure */
  63. #define MIXART_PSEUDOREG_DBRD_TYPE_OFFSET MIXART_PSEUDOREG+0x994 /* Type and version of daughterboard */
  64. /* daughterboard xilinx loader info */
  65. #define MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET MIXART_PSEUDOREG+0x998 /* get the address here where to write the file */
  66. #define MIXART_PSEUDOREG_DXLX_SIZE_OFFSET MIXART_PSEUDOREG+0x99C /* xilinx size in bytes */
  67. #define MIXART_PSEUDOREG_DXLX_STATUS_OFFSET MIXART_PSEUDOREG+0x9A0 /* status = EMBEBBED_STAT_XXX */
  68. /* */
  69. #define MIXART_FLOWTABLE_PTR 0x3000 /* pointer to flow table */
  70. /* mailbox addresses */
  71. /* message DRV -> EMB */
  72. #define MSG_INBOUND_POST_HEAD 0x010008 /* DRV posts MF + increment4 */
  73. #define MSG_INBOUND_POST_TAIL 0x01000C /* EMB gets MF + increment4 */
  74. /* message EMB -> DRV */
  75. #define MSG_OUTBOUND_POST_TAIL 0x01001C /* DRV gets MF + increment4 */
  76. #define MSG_OUTBOUND_POST_HEAD 0x010018 /* EMB posts MF + increment4 */
  77. /* Get Free Frames */
  78. #define MSG_INBOUND_FREE_TAIL 0x010004 /* DRV gets MFA + increment4 */
  79. #define MSG_OUTBOUND_FREE_TAIL 0x010014 /* EMB gets MFA + increment4 */
  80. /* Put Free Frames */
  81. #define MSG_OUTBOUND_FREE_HEAD 0x010010 /* DRV puts MFA + increment4 */
  82. #define MSG_INBOUND_FREE_HEAD 0x010000 /* EMB puts MFA + increment4 */
  83. /* firmware addresses of the message fifos */
  84. #define MSG_BOUND_STACK_SIZE 0x004000 /* size of each following stack */
  85. /* posted messages */
  86. #define MSG_OUTBOUND_POST_STACK 0x108000 /* stack of messages to the DRV */
  87. #define MSG_INBOUND_POST_STACK 0x104000 /* stack of messages to the EMB */
  88. /* available empty messages */
  89. #define MSG_OUTBOUND_FREE_STACK 0x10C000 /* stack of free enveloped for EMB */
  90. #define MSG_INBOUND_FREE_STACK 0x100000 /* stack of free enveloped for DRV */
  91. /* defines for mailbox message frames */
  92. #define MSG_FRAME_OFFSET 0x64
  93. #define MSG_FRAME_SIZE 0x6400
  94. #define MSG_FRAME_NUMBER 32
  95. #define MSG_FROM_AGENT_ITMF_OFFSET (MSG_FRAME_OFFSET + (MSG_FRAME_SIZE * MSG_FRAME_NUMBER))
  96. #define MSG_TO_AGENT_ITMF_OFFSET (MSG_FROM_AGENT_ITMF_OFFSET + MSG_FRAME_SIZE)
  97. #define MSG_HOST_RSC_PROTECTION (MSG_TO_AGENT_ITMF_OFFSET + MSG_FRAME_SIZE)
  98. #define MSG_AGENT_RSC_PROTECTION (MSG_HOST_RSC_PROTECTION + 4)
  99. /*
  100. * -----------BAR 1 --------------------------------------------------------------------------------------------------------
  101. */
  102. /* interrupt addresses and constants */
  103. #define MIXART_PCI_OMIMR_OFFSET 0x34 /* outbound message interrupt mask register */
  104. #define MIXART_PCI_OMISR_OFFSET 0x30 /* outbound message interrupt status register */
  105. #define MIXART_PCI_ODBR_OFFSET 0x60 /* outbound doorbell register */
  106. #define MIXART_BA1_BRUTAL_RESET_OFFSET 0x68 /* write 1 in LSBit to reset board */
  107. #define MIXART_HOST_ALL_INTERRUPT_MASKED 0x02B /* 0000 0010 1011 */
  108. #define MIXART_ALLOW_OUTBOUND_DOORBELL 0x023 /* 0000 0010 0011 */
  109. #define MIXART_OIDI 0x008 /* 0000 0000 1000 */
  110. int snd_mixart_setup_firmware(struct mixart_mgr *mgr);
  111. #endif /* __SOUND_MIXART_HWDEP_H */