imx7-reset.h 1.9 KB

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  1. /*
  2. * Copyright (C) 2017 Impinj, Inc.
  3. *
  4. * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #ifndef DT_BINDING_RESET_IMX7_H
  19. #define DT_BINDING_RESET_IMX7_H
  20. #define IMX7_RESET_A7_CORE_POR_RESET0 0
  21. #define IMX7_RESET_A7_CORE_POR_RESET1 1
  22. #define IMX7_RESET_A7_CORE_RESET0 2
  23. #define IMX7_RESET_A7_CORE_RESET1 3
  24. #define IMX7_RESET_A7_DBG_RESET0 4
  25. #define IMX7_RESET_A7_DBG_RESET1 5
  26. #define IMX7_RESET_A7_ETM_RESET0 6
  27. #define IMX7_RESET_A7_ETM_RESET1 7
  28. #define IMX7_RESET_A7_SOC_DBG_RESET 8
  29. #define IMX7_RESET_A7_L2RESET 9
  30. #define IMX7_RESET_SW_M4C_RST 10
  31. #define IMX7_RESET_SW_M4P_RST 11
  32. #define IMX7_RESET_EIM_RST 12
  33. #define IMX7_RESET_HSICPHY_PORT_RST 13
  34. #define IMX7_RESET_USBPHY1_POR 14
  35. #define IMX7_RESET_USBPHY1_PORT_RST 15
  36. #define IMX7_RESET_USBPHY2_POR 16
  37. #define IMX7_RESET_USBPHY2_PORT_RST 17
  38. #define IMX7_RESET_MIPI_PHY_MRST 18
  39. #define IMX7_RESET_MIPI_PHY_SRST 19
  40. /*
  41. * IMX7_RESET_PCIEPHY is a logical reset line combining PCIEPHY_BTN
  42. * and PCIEPHY_G_RST
  43. */
  44. #define IMX7_RESET_PCIEPHY 20
  45. #define IMX7_RESET_PCIEPHY_PERST 21
  46. /*
  47. * IMX7_RESET_PCIE_CTRL_APPS_EN is not strictly a reset line, but it
  48. * can be used to inhibit PCIe LTTSM, so, in a way, it can be thoguht
  49. * of as one
  50. */
  51. #define IMX7_RESET_PCIE_CTRL_APPS_EN 22
  52. #define IMX7_RESET_DDRC_PRST 23
  53. #define IMX7_RESET_DDRC_CORE_RST 24
  54. #define IMX7_RESET_NUM 25
  55. #endif