phy-mv-usb.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
  4. * Author: Chao Xie <chao.xie@marvell.com>
  5. * Neil Zhang <zhangwm@marvell.com>
  6. */
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/io.h>
  10. #include <linux/uaccess.h>
  11. #include <linux/device.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/clk.h>
  14. #include <linux/workqueue.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/usb.h>
  17. #include <linux/usb/ch9.h>
  18. #include <linux/usb/otg.h>
  19. #include <linux/usb/gadget.h>
  20. #include <linux/usb/hcd.h>
  21. #include <linux/platform_data/mv_usb.h>
  22. #include "phy-mv-usb.h"
  23. #define DRIVER_DESC "Marvell USB OTG transceiver driver"
  24. MODULE_DESCRIPTION(DRIVER_DESC);
  25. MODULE_LICENSE("GPL");
  26. static const char driver_name[] = "mv-otg";
  27. static char *state_string[] = {
  28. "undefined",
  29. "b_idle",
  30. "b_srp_init",
  31. "b_peripheral",
  32. "b_wait_acon",
  33. "b_host",
  34. "a_idle",
  35. "a_wait_vrise",
  36. "a_wait_bcon",
  37. "a_host",
  38. "a_suspend",
  39. "a_peripheral",
  40. "a_wait_vfall",
  41. "a_vbus_err"
  42. };
  43. static int mv_otg_set_vbus(struct usb_otg *otg, bool on)
  44. {
  45. struct mv_otg *mvotg = container_of(otg->usb_phy, struct mv_otg, phy);
  46. if (mvotg->pdata->set_vbus == NULL)
  47. return -ENODEV;
  48. return mvotg->pdata->set_vbus(on);
  49. }
  50. static int mv_otg_set_host(struct usb_otg *otg,
  51. struct usb_bus *host)
  52. {
  53. otg->host = host;
  54. return 0;
  55. }
  56. static int mv_otg_set_peripheral(struct usb_otg *otg,
  57. struct usb_gadget *gadget)
  58. {
  59. otg->gadget = gadget;
  60. return 0;
  61. }
  62. static void mv_otg_run_state_machine(struct mv_otg *mvotg,
  63. unsigned long delay)
  64. {
  65. dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
  66. if (!mvotg->qwork)
  67. return;
  68. queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
  69. }
  70. static void mv_otg_timer_await_bcon(struct timer_list *t)
  71. {
  72. struct mv_otg *mvotg = from_timer(mvotg, t,
  73. otg_ctrl.timer[A_WAIT_BCON_TIMER]);
  74. mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
  75. dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
  76. if (spin_trylock(&mvotg->wq_lock)) {
  77. mv_otg_run_state_machine(mvotg, 0);
  78. spin_unlock(&mvotg->wq_lock);
  79. }
  80. }
  81. static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
  82. {
  83. struct timer_list *timer;
  84. if (id >= OTG_TIMER_NUM)
  85. return -EINVAL;
  86. timer = &mvotg->otg_ctrl.timer[id];
  87. if (timer_pending(timer))
  88. del_timer(timer);
  89. return 0;
  90. }
  91. static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
  92. unsigned long interval)
  93. {
  94. struct timer_list *timer;
  95. if (id >= OTG_TIMER_NUM)
  96. return -EINVAL;
  97. timer = &mvotg->otg_ctrl.timer[id];
  98. if (timer_pending(timer)) {
  99. dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
  100. return -EBUSY;
  101. }
  102. timer->expires = jiffies + interval;
  103. add_timer(timer);
  104. return 0;
  105. }
  106. static int mv_otg_reset(struct mv_otg *mvotg)
  107. {
  108. unsigned int loops;
  109. u32 tmp;
  110. /* Stop the controller */
  111. tmp = readl(&mvotg->op_regs->usbcmd);
  112. tmp &= ~USBCMD_RUN_STOP;
  113. writel(tmp, &mvotg->op_regs->usbcmd);
  114. /* Reset the controller to get default values */
  115. writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
  116. loops = 500;
  117. while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
  118. if (loops == 0) {
  119. dev_err(&mvotg->pdev->dev,
  120. "Wait for RESET completed TIMEOUT\n");
  121. return -ETIMEDOUT;
  122. }
  123. loops--;
  124. udelay(20);
  125. }
  126. writel(0x0, &mvotg->op_regs->usbintr);
  127. tmp = readl(&mvotg->op_regs->usbsts);
  128. writel(tmp, &mvotg->op_regs->usbsts);
  129. return 0;
  130. }
  131. static void mv_otg_init_irq(struct mv_otg *mvotg)
  132. {
  133. u32 otgsc;
  134. mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
  135. | OTGSC_INTR_A_VBUS_VALID;
  136. mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
  137. | OTGSC_INTSTS_A_VBUS_VALID;
  138. if (mvotg->pdata->vbus == NULL) {
  139. mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
  140. | OTGSC_INTR_B_SESSION_END;
  141. mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
  142. | OTGSC_INTSTS_B_SESSION_END;
  143. }
  144. if (mvotg->pdata->id == NULL) {
  145. mvotg->irq_en |= OTGSC_INTR_USB_ID;
  146. mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
  147. }
  148. otgsc = readl(&mvotg->op_regs->otgsc);
  149. otgsc |= mvotg->irq_en;
  150. writel(otgsc, &mvotg->op_regs->otgsc);
  151. }
  152. static void mv_otg_start_host(struct mv_otg *mvotg, int on)
  153. {
  154. #ifdef CONFIG_USB
  155. struct usb_otg *otg = mvotg->phy.otg;
  156. struct usb_hcd *hcd;
  157. if (!otg->host)
  158. return;
  159. dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
  160. hcd = bus_to_hcd(otg->host);
  161. if (on) {
  162. usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
  163. device_wakeup_enable(hcd->self.controller);
  164. } else {
  165. usb_remove_hcd(hcd);
  166. }
  167. #endif /* CONFIG_USB */
  168. }
  169. static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
  170. {
  171. struct usb_otg *otg = mvotg->phy.otg;
  172. if (!otg->gadget)
  173. return;
  174. dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off");
  175. if (on)
  176. usb_gadget_vbus_connect(otg->gadget);
  177. else
  178. usb_gadget_vbus_disconnect(otg->gadget);
  179. }
  180. static void otg_clock_enable(struct mv_otg *mvotg)
  181. {
  182. clk_prepare_enable(mvotg->clk);
  183. }
  184. static void otg_clock_disable(struct mv_otg *mvotg)
  185. {
  186. clk_disable_unprepare(mvotg->clk);
  187. }
  188. static int mv_otg_enable_internal(struct mv_otg *mvotg)
  189. {
  190. int retval = 0;
  191. if (mvotg->active)
  192. return 0;
  193. dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
  194. otg_clock_enable(mvotg);
  195. if (mvotg->pdata->phy_init) {
  196. retval = mvotg->pdata->phy_init(mvotg->phy_regs);
  197. if (retval) {
  198. dev_err(&mvotg->pdev->dev,
  199. "init phy error %d\n", retval);
  200. otg_clock_disable(mvotg);
  201. return retval;
  202. }
  203. }
  204. mvotg->active = 1;
  205. return 0;
  206. }
  207. static int mv_otg_enable(struct mv_otg *mvotg)
  208. {
  209. if (mvotg->clock_gating)
  210. return mv_otg_enable_internal(mvotg);
  211. return 0;
  212. }
  213. static void mv_otg_disable_internal(struct mv_otg *mvotg)
  214. {
  215. if (mvotg->active) {
  216. dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
  217. if (mvotg->pdata->phy_deinit)
  218. mvotg->pdata->phy_deinit(mvotg->phy_regs);
  219. otg_clock_disable(mvotg);
  220. mvotg->active = 0;
  221. }
  222. }
  223. static void mv_otg_disable(struct mv_otg *mvotg)
  224. {
  225. if (mvotg->clock_gating)
  226. mv_otg_disable_internal(mvotg);
  227. }
  228. static void mv_otg_update_inputs(struct mv_otg *mvotg)
  229. {
  230. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  231. u32 otgsc;
  232. otgsc = readl(&mvotg->op_regs->otgsc);
  233. if (mvotg->pdata->vbus) {
  234. if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
  235. otg_ctrl->b_sess_vld = 1;
  236. otg_ctrl->b_sess_end = 0;
  237. } else {
  238. otg_ctrl->b_sess_vld = 0;
  239. otg_ctrl->b_sess_end = 1;
  240. }
  241. } else {
  242. otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
  243. otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
  244. }
  245. if (mvotg->pdata->id)
  246. otg_ctrl->id = !!mvotg->pdata->id->poll();
  247. else
  248. otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
  249. if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
  250. otg_ctrl->a_bus_req = 1;
  251. otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
  252. otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
  253. dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
  254. dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
  255. dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
  256. dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
  257. dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
  258. dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
  259. }
  260. static void mv_otg_update_state(struct mv_otg *mvotg)
  261. {
  262. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  263. int old_state = mvotg->phy.otg->state;
  264. switch (old_state) {
  265. case OTG_STATE_UNDEFINED:
  266. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  267. /* FALL THROUGH */
  268. case OTG_STATE_B_IDLE:
  269. if (otg_ctrl->id == 0)
  270. mvotg->phy.otg->state = OTG_STATE_A_IDLE;
  271. else if (otg_ctrl->b_sess_vld)
  272. mvotg->phy.otg->state = OTG_STATE_B_PERIPHERAL;
  273. break;
  274. case OTG_STATE_B_PERIPHERAL:
  275. if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
  276. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  277. break;
  278. case OTG_STATE_A_IDLE:
  279. if (otg_ctrl->id)
  280. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  281. else if (!(otg_ctrl->a_bus_drop) &&
  282. (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
  283. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VRISE;
  284. break;
  285. case OTG_STATE_A_WAIT_VRISE:
  286. if (otg_ctrl->a_vbus_vld)
  287. mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
  288. break;
  289. case OTG_STATE_A_WAIT_BCON:
  290. if (otg_ctrl->id || otg_ctrl->a_bus_drop
  291. || otg_ctrl->a_wait_bcon_timeout) {
  292. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  293. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  294. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
  295. otg_ctrl->a_bus_req = 0;
  296. } else if (!otg_ctrl->a_vbus_vld) {
  297. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  298. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  299. mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
  300. } else if (otg_ctrl->b_conn) {
  301. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  302. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  303. mvotg->phy.otg->state = OTG_STATE_A_HOST;
  304. }
  305. break;
  306. case OTG_STATE_A_HOST:
  307. if (otg_ctrl->id || !otg_ctrl->b_conn
  308. || otg_ctrl->a_bus_drop)
  309. mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
  310. else if (!otg_ctrl->a_vbus_vld)
  311. mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
  312. break;
  313. case OTG_STATE_A_WAIT_VFALL:
  314. if (otg_ctrl->id
  315. || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
  316. || otg_ctrl->a_bus_req)
  317. mvotg->phy.otg->state = OTG_STATE_A_IDLE;
  318. break;
  319. case OTG_STATE_A_VBUS_ERR:
  320. if (otg_ctrl->id || otg_ctrl->a_clr_err
  321. || otg_ctrl->a_bus_drop) {
  322. otg_ctrl->a_clr_err = 0;
  323. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
  324. }
  325. break;
  326. default:
  327. break;
  328. }
  329. }
  330. static void mv_otg_work(struct work_struct *work)
  331. {
  332. struct mv_otg *mvotg;
  333. struct usb_phy *phy;
  334. struct usb_otg *otg;
  335. int old_state;
  336. mvotg = container_of(to_delayed_work(work), struct mv_otg, work);
  337. run:
  338. /* work queue is single thread, or we need spin_lock to protect */
  339. phy = &mvotg->phy;
  340. otg = mvotg->phy.otg;
  341. old_state = otg->state;
  342. if (!mvotg->active)
  343. return;
  344. mv_otg_update_inputs(mvotg);
  345. mv_otg_update_state(mvotg);
  346. if (old_state != mvotg->phy.otg->state) {
  347. dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
  348. state_string[old_state],
  349. state_string[mvotg->phy.otg->state]);
  350. switch (mvotg->phy.otg->state) {
  351. case OTG_STATE_B_IDLE:
  352. otg->default_a = 0;
  353. if (old_state == OTG_STATE_B_PERIPHERAL)
  354. mv_otg_start_periphrals(mvotg, 0);
  355. mv_otg_reset(mvotg);
  356. mv_otg_disable(mvotg);
  357. usb_phy_set_event(&mvotg->phy, USB_EVENT_NONE);
  358. break;
  359. case OTG_STATE_B_PERIPHERAL:
  360. mv_otg_enable(mvotg);
  361. mv_otg_start_periphrals(mvotg, 1);
  362. usb_phy_set_event(&mvotg->phy, USB_EVENT_ENUMERATED);
  363. break;
  364. case OTG_STATE_A_IDLE:
  365. otg->default_a = 1;
  366. mv_otg_enable(mvotg);
  367. if (old_state == OTG_STATE_A_WAIT_VFALL)
  368. mv_otg_start_host(mvotg, 0);
  369. mv_otg_reset(mvotg);
  370. break;
  371. case OTG_STATE_A_WAIT_VRISE:
  372. mv_otg_set_vbus(otg, 1);
  373. break;
  374. case OTG_STATE_A_WAIT_BCON:
  375. if (old_state != OTG_STATE_A_HOST)
  376. mv_otg_start_host(mvotg, 1);
  377. mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
  378. T_A_WAIT_BCON);
  379. /*
  380. * Now, we directly enter A_HOST. So set b_conn = 1
  381. * here. In fact, it need host driver to notify us.
  382. */
  383. mvotg->otg_ctrl.b_conn = 1;
  384. break;
  385. case OTG_STATE_A_HOST:
  386. break;
  387. case OTG_STATE_A_WAIT_VFALL:
  388. /*
  389. * Now, we has exited A_HOST. So set b_conn = 0
  390. * here. In fact, it need host driver to notify us.
  391. */
  392. mvotg->otg_ctrl.b_conn = 0;
  393. mv_otg_set_vbus(otg, 0);
  394. break;
  395. case OTG_STATE_A_VBUS_ERR:
  396. break;
  397. default:
  398. break;
  399. }
  400. goto run;
  401. }
  402. }
  403. static irqreturn_t mv_otg_irq(int irq, void *dev)
  404. {
  405. struct mv_otg *mvotg = dev;
  406. u32 otgsc;
  407. otgsc = readl(&mvotg->op_regs->otgsc);
  408. writel(otgsc, &mvotg->op_regs->otgsc);
  409. /*
  410. * if we have vbus, then the vbus detection for B-device
  411. * will be done by mv_otg_inputs_irq().
  412. */
  413. if (mvotg->pdata->vbus)
  414. if ((otgsc & OTGSC_STS_USB_ID) &&
  415. !(otgsc & OTGSC_INTSTS_USB_ID))
  416. return IRQ_NONE;
  417. if ((otgsc & mvotg->irq_status) == 0)
  418. return IRQ_NONE;
  419. mv_otg_run_state_machine(mvotg, 0);
  420. return IRQ_HANDLED;
  421. }
  422. static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
  423. {
  424. struct mv_otg *mvotg = dev;
  425. /* The clock may disabled at this time */
  426. if (!mvotg->active) {
  427. mv_otg_enable(mvotg);
  428. mv_otg_init_irq(mvotg);
  429. }
  430. mv_otg_run_state_machine(mvotg, 0);
  431. return IRQ_HANDLED;
  432. }
  433. static ssize_t
  434. a_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf)
  435. {
  436. struct mv_otg *mvotg = dev_get_drvdata(dev);
  437. return scnprintf(buf, PAGE_SIZE, "%d\n",
  438. mvotg->otg_ctrl.a_bus_req);
  439. }
  440. static ssize_t
  441. a_bus_req_store(struct device *dev, struct device_attribute *attr,
  442. const char *buf, size_t count)
  443. {
  444. struct mv_otg *mvotg = dev_get_drvdata(dev);
  445. if (count > 2)
  446. return -1;
  447. /* We will use this interface to change to A device */
  448. if (mvotg->phy.otg->state != OTG_STATE_B_IDLE
  449. && mvotg->phy.otg->state != OTG_STATE_A_IDLE)
  450. return -1;
  451. /* The clock may disabled and we need to set irq for ID detected */
  452. mv_otg_enable(mvotg);
  453. mv_otg_init_irq(mvotg);
  454. if (buf[0] == '1') {
  455. mvotg->otg_ctrl.a_bus_req = 1;
  456. mvotg->otg_ctrl.a_bus_drop = 0;
  457. dev_dbg(&mvotg->pdev->dev,
  458. "User request: a_bus_req = 1\n");
  459. if (spin_trylock(&mvotg->wq_lock)) {
  460. mv_otg_run_state_machine(mvotg, 0);
  461. spin_unlock(&mvotg->wq_lock);
  462. }
  463. }
  464. return count;
  465. }
  466. static DEVICE_ATTR_RW(a_bus_req);
  467. static ssize_t
  468. a_clr_err_store(struct device *dev, struct device_attribute *attr,
  469. const char *buf, size_t count)
  470. {
  471. struct mv_otg *mvotg = dev_get_drvdata(dev);
  472. if (!mvotg->phy.otg->default_a)
  473. return -1;
  474. if (count > 2)
  475. return -1;
  476. if (buf[0] == '1') {
  477. mvotg->otg_ctrl.a_clr_err = 1;
  478. dev_dbg(&mvotg->pdev->dev,
  479. "User request: a_clr_err = 1\n");
  480. }
  481. if (spin_trylock(&mvotg->wq_lock)) {
  482. mv_otg_run_state_machine(mvotg, 0);
  483. spin_unlock(&mvotg->wq_lock);
  484. }
  485. return count;
  486. }
  487. static DEVICE_ATTR_WO(a_clr_err);
  488. static ssize_t
  489. a_bus_drop_show(struct device *dev, struct device_attribute *attr,
  490. char *buf)
  491. {
  492. struct mv_otg *mvotg = dev_get_drvdata(dev);
  493. return scnprintf(buf, PAGE_SIZE, "%d\n",
  494. mvotg->otg_ctrl.a_bus_drop);
  495. }
  496. static ssize_t
  497. a_bus_drop_store(struct device *dev, struct device_attribute *attr,
  498. const char *buf, size_t count)
  499. {
  500. struct mv_otg *mvotg = dev_get_drvdata(dev);
  501. if (!mvotg->phy.otg->default_a)
  502. return -1;
  503. if (count > 2)
  504. return -1;
  505. if (buf[0] == '0') {
  506. mvotg->otg_ctrl.a_bus_drop = 0;
  507. dev_dbg(&mvotg->pdev->dev,
  508. "User request: a_bus_drop = 0\n");
  509. } else if (buf[0] == '1') {
  510. mvotg->otg_ctrl.a_bus_drop = 1;
  511. mvotg->otg_ctrl.a_bus_req = 0;
  512. dev_dbg(&mvotg->pdev->dev,
  513. "User request: a_bus_drop = 1\n");
  514. dev_dbg(&mvotg->pdev->dev,
  515. "User request: and a_bus_req = 0\n");
  516. }
  517. if (spin_trylock(&mvotg->wq_lock)) {
  518. mv_otg_run_state_machine(mvotg, 0);
  519. spin_unlock(&mvotg->wq_lock);
  520. }
  521. return count;
  522. }
  523. static DEVICE_ATTR_RW(a_bus_drop);
  524. static struct attribute *inputs_attrs[] = {
  525. &dev_attr_a_bus_req.attr,
  526. &dev_attr_a_clr_err.attr,
  527. &dev_attr_a_bus_drop.attr,
  528. NULL,
  529. };
  530. static const struct attribute_group inputs_attr_group = {
  531. .name = "inputs",
  532. .attrs = inputs_attrs,
  533. };
  534. static int mv_otg_remove(struct platform_device *pdev)
  535. {
  536. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  537. sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group);
  538. if (mvotg->qwork) {
  539. flush_workqueue(mvotg->qwork);
  540. destroy_workqueue(mvotg->qwork);
  541. }
  542. mv_otg_disable(mvotg);
  543. usb_remove_phy(&mvotg->phy);
  544. return 0;
  545. }
  546. static int mv_otg_probe(struct platform_device *pdev)
  547. {
  548. struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
  549. struct mv_otg *mvotg;
  550. struct usb_otg *otg;
  551. struct resource *r;
  552. int retval = 0, i;
  553. if (pdata == NULL) {
  554. dev_err(&pdev->dev, "failed to get platform data\n");
  555. return -ENODEV;
  556. }
  557. mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL);
  558. if (!mvotg)
  559. return -ENOMEM;
  560. otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
  561. if (!otg)
  562. return -ENOMEM;
  563. platform_set_drvdata(pdev, mvotg);
  564. mvotg->pdev = pdev;
  565. mvotg->pdata = pdata;
  566. mvotg->clk = devm_clk_get(&pdev->dev, NULL);
  567. if (IS_ERR(mvotg->clk))
  568. return PTR_ERR(mvotg->clk);
  569. mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
  570. if (!mvotg->qwork) {
  571. dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
  572. return -ENOMEM;
  573. }
  574. INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
  575. /* OTG common part */
  576. mvotg->pdev = pdev;
  577. mvotg->phy.dev = &pdev->dev;
  578. mvotg->phy.otg = otg;
  579. mvotg->phy.label = driver_name;
  580. otg->state = OTG_STATE_UNDEFINED;
  581. otg->usb_phy = &mvotg->phy;
  582. otg->set_host = mv_otg_set_host;
  583. otg->set_peripheral = mv_otg_set_peripheral;
  584. otg->set_vbus = mv_otg_set_vbus;
  585. for (i = 0; i < OTG_TIMER_NUM; i++)
  586. timer_setup(&mvotg->otg_ctrl.timer[i],
  587. mv_otg_timer_await_bcon, 0);
  588. r = platform_get_resource_byname(mvotg->pdev,
  589. IORESOURCE_MEM, "phyregs");
  590. if (r == NULL) {
  591. dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
  592. retval = -ENODEV;
  593. goto err_destroy_workqueue;
  594. }
  595. mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  596. if (mvotg->phy_regs == NULL) {
  597. dev_err(&pdev->dev, "failed to map phy I/O memory\n");
  598. retval = -EFAULT;
  599. goto err_destroy_workqueue;
  600. }
  601. r = platform_get_resource_byname(mvotg->pdev,
  602. IORESOURCE_MEM, "capregs");
  603. if (r == NULL) {
  604. dev_err(&pdev->dev, "no I/O memory resource defined\n");
  605. retval = -ENODEV;
  606. goto err_destroy_workqueue;
  607. }
  608. mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  609. if (mvotg->cap_regs == NULL) {
  610. dev_err(&pdev->dev, "failed to map I/O memory\n");
  611. retval = -EFAULT;
  612. goto err_destroy_workqueue;
  613. }
  614. /* we will acces controller register, so enable the udc controller */
  615. retval = mv_otg_enable_internal(mvotg);
  616. if (retval) {
  617. dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
  618. goto err_destroy_workqueue;
  619. }
  620. mvotg->op_regs =
  621. (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
  622. + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
  623. if (pdata->id) {
  624. retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq,
  625. NULL, mv_otg_inputs_irq,
  626. IRQF_ONESHOT, "id", mvotg);
  627. if (retval) {
  628. dev_info(&pdev->dev,
  629. "Failed to request irq for ID\n");
  630. pdata->id = NULL;
  631. }
  632. }
  633. if (pdata->vbus) {
  634. mvotg->clock_gating = 1;
  635. retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq,
  636. NULL, mv_otg_inputs_irq,
  637. IRQF_ONESHOT, "vbus", mvotg);
  638. if (retval) {
  639. dev_info(&pdev->dev,
  640. "Failed to request irq for VBUS, "
  641. "disable clock gating\n");
  642. mvotg->clock_gating = 0;
  643. pdata->vbus = NULL;
  644. }
  645. }
  646. if (pdata->disable_otg_clock_gating)
  647. mvotg->clock_gating = 0;
  648. mv_otg_reset(mvotg);
  649. mv_otg_init_irq(mvotg);
  650. r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
  651. if (r == NULL) {
  652. dev_err(&pdev->dev, "no IRQ resource defined\n");
  653. retval = -ENODEV;
  654. goto err_disable_clk;
  655. }
  656. mvotg->irq = r->start;
  657. if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED,
  658. driver_name, mvotg)) {
  659. dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
  660. mvotg->irq);
  661. mvotg->irq = 0;
  662. retval = -ENODEV;
  663. goto err_disable_clk;
  664. }
  665. retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2);
  666. if (retval < 0) {
  667. dev_err(&pdev->dev, "can't register transceiver, %d\n",
  668. retval);
  669. goto err_disable_clk;
  670. }
  671. retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group);
  672. if (retval < 0) {
  673. dev_dbg(&pdev->dev,
  674. "Can't register sysfs attr group: %d\n", retval);
  675. goto err_remove_phy;
  676. }
  677. spin_lock_init(&mvotg->wq_lock);
  678. if (spin_trylock(&mvotg->wq_lock)) {
  679. mv_otg_run_state_machine(mvotg, 2 * HZ);
  680. spin_unlock(&mvotg->wq_lock);
  681. }
  682. dev_info(&pdev->dev,
  683. "successful probe OTG device %s clock gating.\n",
  684. mvotg->clock_gating ? "with" : "without");
  685. return 0;
  686. err_remove_phy:
  687. usb_remove_phy(&mvotg->phy);
  688. err_disable_clk:
  689. mv_otg_disable_internal(mvotg);
  690. err_destroy_workqueue:
  691. flush_workqueue(mvotg->qwork);
  692. destroy_workqueue(mvotg->qwork);
  693. return retval;
  694. }
  695. #ifdef CONFIG_PM
  696. static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
  697. {
  698. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  699. if (mvotg->phy.otg->state != OTG_STATE_B_IDLE) {
  700. dev_info(&pdev->dev,
  701. "OTG state is not B_IDLE, it is %d!\n",
  702. mvotg->phy.otg->state);
  703. return -EAGAIN;
  704. }
  705. if (!mvotg->clock_gating)
  706. mv_otg_disable_internal(mvotg);
  707. return 0;
  708. }
  709. static int mv_otg_resume(struct platform_device *pdev)
  710. {
  711. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  712. u32 otgsc;
  713. if (!mvotg->clock_gating) {
  714. mv_otg_enable_internal(mvotg);
  715. otgsc = readl(&mvotg->op_regs->otgsc);
  716. otgsc |= mvotg->irq_en;
  717. writel(otgsc, &mvotg->op_regs->otgsc);
  718. if (spin_trylock(&mvotg->wq_lock)) {
  719. mv_otg_run_state_machine(mvotg, 0);
  720. spin_unlock(&mvotg->wq_lock);
  721. }
  722. }
  723. return 0;
  724. }
  725. #endif
  726. static struct platform_driver mv_otg_driver = {
  727. .probe = mv_otg_probe,
  728. .remove = mv_otg_remove,
  729. .driver = {
  730. .name = driver_name,
  731. },
  732. #ifdef CONFIG_PM
  733. .suspend = mv_otg_suspend,
  734. .resume = mv_otg_resume,
  735. #endif
  736. };
  737. module_platform_driver(mv_otg_driver);