mtu3_gadget_ep0.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * mtu3_gadget_ep0.c - MediaTek USB3 DRD peripheral driver ep0 handling
  4. *
  5. * Copyright (c) 2016 MediaTek Inc.
  6. *
  7. * Author: Chunfeng.Yun <chunfeng.yun@mediatek.com>
  8. */
  9. #include <linux/iopoll.h>
  10. #include <linux/usb/composite.h>
  11. #include "mtu3.h"
  12. /* ep0 is always mtu3->in_eps[0] */
  13. #define next_ep0_request(mtu) next_request((mtu)->ep0)
  14. /* for high speed test mode; see USB 2.0 spec 7.1.20 */
  15. static const u8 mtu3_test_packet[53] = {
  16. /* implicit SYNC then DATA0 to start */
  17. /* JKJKJKJK x9 */
  18. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  19. /* JJKKJJKK x8 */
  20. 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
  21. /* JJJJKKKK x8 */
  22. 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
  23. /* JJJJJJJKKKKKKK x8 */
  24. 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  25. /* JJJJJJJK x8 */
  26. 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
  27. /* JKKKKKKK x10, JK */
  28. 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e,
  29. /* implicit CRC16 then EOP to end */
  30. };
  31. static char *decode_ep0_state(struct mtu3 *mtu)
  32. {
  33. switch (mtu->ep0_state) {
  34. case MU3D_EP0_STATE_SETUP:
  35. return "SETUP";
  36. case MU3D_EP0_STATE_TX:
  37. return "IN";
  38. case MU3D_EP0_STATE_RX:
  39. return "OUT";
  40. case MU3D_EP0_STATE_TX_END:
  41. return "TX-END";
  42. case MU3D_EP0_STATE_STALL:
  43. return "STALL";
  44. default:
  45. return "??";
  46. }
  47. }
  48. static void ep0_req_giveback(struct mtu3 *mtu, struct usb_request *req)
  49. {
  50. mtu3_req_complete(mtu->ep0, req, 0);
  51. }
  52. static int
  53. forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
  54. __releases(mtu->lock)
  55. __acquires(mtu->lock)
  56. {
  57. int ret;
  58. if (!mtu->gadget_driver)
  59. return -EOPNOTSUPP;
  60. spin_unlock(&mtu->lock);
  61. ret = mtu->gadget_driver->setup(&mtu->g, setup);
  62. spin_lock(&mtu->lock);
  63. dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret);
  64. return ret;
  65. }
  66. static void ep0_write_fifo(struct mtu3_ep *mep, const u8 *src, u16 len)
  67. {
  68. void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
  69. u16 index = 0;
  70. dev_dbg(mep->mtu->dev, "%s: ep%din, len=%d, buf=%p\n",
  71. __func__, mep->epnum, len, src);
  72. if (len >= 4) {
  73. iowrite32_rep(fifo, src, len >> 2);
  74. index = len & ~0x03;
  75. }
  76. if (len & 0x02) {
  77. writew(*(u16 *)&src[index], fifo);
  78. index += 2;
  79. }
  80. if (len & 0x01)
  81. writeb(src[index], fifo);
  82. }
  83. static void ep0_read_fifo(struct mtu3_ep *mep, u8 *dst, u16 len)
  84. {
  85. void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
  86. u32 value;
  87. u16 index = 0;
  88. dev_dbg(mep->mtu->dev, "%s: ep%dout len=%d buf=%p\n",
  89. __func__, mep->epnum, len, dst);
  90. if (len >= 4) {
  91. ioread32_rep(fifo, dst, len >> 2);
  92. index = len & ~0x03;
  93. }
  94. if (len & 0x3) {
  95. value = readl(fifo);
  96. memcpy(&dst[index], &value, len & 0x3);
  97. }
  98. }
  99. static void ep0_load_test_packet(struct mtu3 *mtu)
  100. {
  101. /*
  102. * because the length of test packet is less than max packet of HS ep0,
  103. * write it into fifo directly.
  104. */
  105. ep0_write_fifo(mtu->ep0, mtu3_test_packet, sizeof(mtu3_test_packet));
  106. }
  107. /*
  108. * A. send STALL for setup transfer without data stage:
  109. * set SENDSTALL and SETUPPKTRDY at the same time;
  110. * B. send STALL for other cases:
  111. * set SENDSTALL only.
  112. */
  113. static void ep0_stall_set(struct mtu3_ep *mep0, bool set, u32 pktrdy)
  114. {
  115. struct mtu3 *mtu = mep0->mtu;
  116. void __iomem *mbase = mtu->mac_base;
  117. u32 csr;
  118. /* EP0_SENTSTALL is W1C */
  119. csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  120. if (set)
  121. csr |= EP0_SENDSTALL | pktrdy;
  122. else
  123. csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
  124. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
  125. mtu->delayed_status = false;
  126. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  127. dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
  128. set ? "SEND" : "CLEAR", decode_ep0_state(mtu));
  129. }
  130. static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq);
  131. static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req)
  132. {}
  133. static void ep0_set_sel_complete(struct usb_ep *ep, struct usb_request *req)
  134. {
  135. struct mtu3_request *mreq;
  136. struct mtu3 *mtu;
  137. struct usb_set_sel_req sel;
  138. memcpy(&sel, req->buf, sizeof(sel));
  139. mreq = to_mtu3_request(req);
  140. mtu = mreq->mtu;
  141. dev_dbg(mtu->dev, "u1sel:%d, u1pel:%d, u2sel:%d, u2pel:%d\n",
  142. sel.u1_sel, sel.u1_pel, sel.u2_sel, sel.u2_pel);
  143. }
  144. /* queue data stage to handle 6 byte SET_SEL request */
  145. static int ep0_set_sel(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  146. {
  147. int ret;
  148. u16 length = le16_to_cpu(setup->wLength);
  149. if (unlikely(length != 6)) {
  150. dev_err(mtu->dev, "%s wrong wLength:%d\n",
  151. __func__, length);
  152. return -EINVAL;
  153. }
  154. mtu->ep0_req.mep = mtu->ep0;
  155. mtu->ep0_req.request.length = 6;
  156. mtu->ep0_req.request.buf = mtu->setup_buf;
  157. mtu->ep0_req.request.complete = ep0_set_sel_complete;
  158. ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
  159. return ret < 0 ? ret : 1;
  160. }
  161. static int
  162. ep0_get_status(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
  163. {
  164. struct mtu3_ep *mep = NULL;
  165. int handled = 1;
  166. u8 result[2] = {0, 0};
  167. u8 epnum = 0;
  168. int is_in;
  169. switch (setup->bRequestType & USB_RECIP_MASK) {
  170. case USB_RECIP_DEVICE:
  171. result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
  172. result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
  173. if (mtu->g.speed >= USB_SPEED_SUPER) {
  174. result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
  175. result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
  176. }
  177. dev_dbg(mtu->dev, "%s result=%x, U1=%x, U2=%x\n", __func__,
  178. result[0], mtu->u1_enable, mtu->u2_enable);
  179. break;
  180. case USB_RECIP_INTERFACE:
  181. break;
  182. case USB_RECIP_ENDPOINT:
  183. epnum = (u8) le16_to_cpu(setup->wIndex);
  184. is_in = epnum & USB_DIR_IN;
  185. epnum &= USB_ENDPOINT_NUMBER_MASK;
  186. if (epnum >= mtu->num_eps) {
  187. handled = -EINVAL;
  188. break;
  189. }
  190. if (!epnum)
  191. break;
  192. mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
  193. if (!mep->desc) {
  194. handled = -EINVAL;
  195. break;
  196. }
  197. if (mep->flags & MTU3_EP_STALL)
  198. result[0] |= 1 << USB_ENDPOINT_HALT;
  199. break;
  200. default:
  201. /* class, vendor, etc ... delegate */
  202. handled = 0;
  203. break;
  204. }
  205. if (handled > 0) {
  206. int ret;
  207. /* prepare a data stage for GET_STATUS */
  208. dev_dbg(mtu->dev, "get_status=%x\n", *(u16 *)result);
  209. memcpy(mtu->setup_buf, result, sizeof(result));
  210. mtu->ep0_req.mep = mtu->ep0;
  211. mtu->ep0_req.request.length = 2;
  212. mtu->ep0_req.request.buf = &mtu->setup_buf;
  213. mtu->ep0_req.request.complete = ep0_dummy_complete;
  214. ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
  215. if (ret < 0)
  216. handled = ret;
  217. }
  218. return handled;
  219. }
  220. static int handle_test_mode(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  221. {
  222. void __iomem *mbase = mtu->mac_base;
  223. int handled = 1;
  224. u32 value;
  225. switch (le16_to_cpu(setup->wIndex) >> 8) {
  226. case TEST_J:
  227. dev_dbg(mtu->dev, "TEST_J\n");
  228. mtu->test_mode_nr = TEST_J_MODE;
  229. break;
  230. case TEST_K:
  231. dev_dbg(mtu->dev, "TEST_K\n");
  232. mtu->test_mode_nr = TEST_K_MODE;
  233. break;
  234. case TEST_SE0_NAK:
  235. dev_dbg(mtu->dev, "TEST_SE0_NAK\n");
  236. mtu->test_mode_nr = TEST_SE0_NAK_MODE;
  237. break;
  238. case TEST_PACKET:
  239. dev_dbg(mtu->dev, "TEST_PACKET\n");
  240. mtu->test_mode_nr = TEST_PACKET_MODE;
  241. break;
  242. default:
  243. handled = -EINVAL;
  244. goto out;
  245. }
  246. mtu->test_mode = true;
  247. /* no TX completion interrupt, and need restart platform after test */
  248. if (mtu->test_mode_nr == TEST_PACKET_MODE)
  249. ep0_load_test_packet(mtu);
  250. /* send status before entering test mode. */
  251. value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  252. mtu3_writel(mbase, U3D_EP0CSR, value | EP0_SETUPPKTRDY | EP0_DATAEND);
  253. /* wait for ACK status sent by host */
  254. readl_poll_timeout_atomic(mbase + U3D_EP0CSR, value,
  255. !(value & EP0_DATAEND), 100, 5000);
  256. mtu3_writel(mbase, U3D_USB2_TEST_MODE, mtu->test_mode_nr);
  257. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  258. out:
  259. return handled;
  260. }
  261. static int ep0_handle_feature_dev(struct mtu3 *mtu,
  262. struct usb_ctrlrequest *setup, bool set)
  263. {
  264. void __iomem *mbase = mtu->mac_base;
  265. int handled = -EINVAL;
  266. u32 lpc;
  267. switch (le16_to_cpu(setup->wValue)) {
  268. case USB_DEVICE_REMOTE_WAKEUP:
  269. mtu->may_wakeup = !!set;
  270. handled = 1;
  271. break;
  272. case USB_DEVICE_TEST_MODE:
  273. if (!set || (mtu->g.speed != USB_SPEED_HIGH) ||
  274. (le16_to_cpu(setup->wIndex) & 0xff))
  275. break;
  276. handled = handle_test_mode(mtu, setup);
  277. break;
  278. case USB_DEVICE_U1_ENABLE:
  279. if (mtu->g.speed < USB_SPEED_SUPER ||
  280. mtu->g.state != USB_STATE_CONFIGURED)
  281. break;
  282. lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
  283. if (set)
  284. lpc |= SW_U1_REQUEST_ENABLE;
  285. else
  286. lpc &= ~SW_U1_REQUEST_ENABLE;
  287. mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
  288. mtu->u1_enable = !!set;
  289. handled = 1;
  290. break;
  291. case USB_DEVICE_U2_ENABLE:
  292. if (mtu->g.speed < USB_SPEED_SUPER ||
  293. mtu->g.state != USB_STATE_CONFIGURED)
  294. break;
  295. lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
  296. if (set)
  297. lpc |= SW_U2_REQUEST_ENABLE;
  298. else
  299. lpc &= ~SW_U2_REQUEST_ENABLE;
  300. mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
  301. mtu->u2_enable = !!set;
  302. handled = 1;
  303. break;
  304. default:
  305. handled = -EINVAL;
  306. break;
  307. }
  308. return handled;
  309. }
  310. static int ep0_handle_feature(struct mtu3 *mtu,
  311. struct usb_ctrlrequest *setup, bool set)
  312. {
  313. struct mtu3_ep *mep;
  314. int handled = -EINVAL;
  315. int is_in;
  316. u16 value;
  317. u16 index;
  318. u8 epnum;
  319. value = le16_to_cpu(setup->wValue);
  320. index = le16_to_cpu(setup->wIndex);
  321. switch (setup->bRequestType & USB_RECIP_MASK) {
  322. case USB_RECIP_DEVICE:
  323. handled = ep0_handle_feature_dev(mtu, setup, set);
  324. break;
  325. case USB_RECIP_INTERFACE:
  326. /* superspeed only */
  327. if (value == USB_INTRF_FUNC_SUSPEND &&
  328. mtu->g.speed >= USB_SPEED_SUPER) {
  329. /*
  330. * forward the request because function drivers
  331. * should handle it
  332. */
  333. handled = 0;
  334. }
  335. break;
  336. case USB_RECIP_ENDPOINT:
  337. epnum = index & USB_ENDPOINT_NUMBER_MASK;
  338. if (epnum == 0 || epnum >= mtu->num_eps ||
  339. value != USB_ENDPOINT_HALT)
  340. break;
  341. is_in = index & USB_DIR_IN;
  342. mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
  343. if (!mep->desc)
  344. break;
  345. handled = 1;
  346. /* ignore request if endpoint is wedged */
  347. if (mep->wedged)
  348. break;
  349. mtu3_ep_stall_set(mep, set);
  350. break;
  351. default:
  352. /* class, vendor, etc ... delegate */
  353. handled = 0;
  354. break;
  355. }
  356. return handled;
  357. }
  358. /*
  359. * handle all control requests can be handled
  360. * returns:
  361. * negative errno - error happened
  362. * zero - need delegate SETUP to gadget driver
  363. * positive - already handled
  364. */
  365. static int handle_standard_request(struct mtu3 *mtu,
  366. struct usb_ctrlrequest *setup)
  367. {
  368. void __iomem *mbase = mtu->mac_base;
  369. enum usb_device_state state = mtu->g.state;
  370. int handled = -EINVAL;
  371. u32 dev_conf;
  372. u16 value;
  373. value = le16_to_cpu(setup->wValue);
  374. /* the gadget driver handles everything except what we must handle */
  375. switch (setup->bRequest) {
  376. case USB_REQ_SET_ADDRESS:
  377. /* change it after the status stage */
  378. mtu->address = (u8) (value & 0x7f);
  379. dev_dbg(mtu->dev, "set address to 0x%x\n", mtu->address);
  380. dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF);
  381. dev_conf &= ~DEV_ADDR_MSK;
  382. dev_conf |= DEV_ADDR(mtu->address);
  383. mtu3_writel(mbase, U3D_DEVICE_CONF, dev_conf);
  384. if (mtu->address)
  385. usb_gadget_set_state(&mtu->g, USB_STATE_ADDRESS);
  386. else
  387. usb_gadget_set_state(&mtu->g, USB_STATE_DEFAULT);
  388. handled = 1;
  389. break;
  390. case USB_REQ_SET_CONFIGURATION:
  391. if (state == USB_STATE_ADDRESS) {
  392. usb_gadget_set_state(&mtu->g,
  393. USB_STATE_CONFIGURED);
  394. } else if (state == USB_STATE_CONFIGURED) {
  395. /*
  396. * USB2 spec sec 9.4.7, if wValue is 0 then dev
  397. * is moved to addressed state
  398. */
  399. if (!value)
  400. usb_gadget_set_state(&mtu->g,
  401. USB_STATE_ADDRESS);
  402. }
  403. handled = 0;
  404. break;
  405. case USB_REQ_CLEAR_FEATURE:
  406. handled = ep0_handle_feature(mtu, setup, 0);
  407. break;
  408. case USB_REQ_SET_FEATURE:
  409. handled = ep0_handle_feature(mtu, setup, 1);
  410. break;
  411. case USB_REQ_GET_STATUS:
  412. handled = ep0_get_status(mtu, setup);
  413. break;
  414. case USB_REQ_SET_SEL:
  415. handled = ep0_set_sel(mtu, setup);
  416. break;
  417. case USB_REQ_SET_ISOCH_DELAY:
  418. handled = 1;
  419. break;
  420. default:
  421. /* delegate SET_CONFIGURATION, etc */
  422. handled = 0;
  423. }
  424. return handled;
  425. }
  426. /* receive an data packet (OUT) */
  427. static void ep0_rx_state(struct mtu3 *mtu)
  428. {
  429. struct mtu3_request *mreq;
  430. struct usb_request *req;
  431. void __iomem *mbase = mtu->mac_base;
  432. u32 maxp;
  433. u32 csr;
  434. u16 count = 0;
  435. dev_dbg(mtu->dev, "%s\n", __func__);
  436. csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  437. mreq = next_ep0_request(mtu);
  438. req = &mreq->request;
  439. /* read packet and ack; or stall because of gadget driver bug */
  440. if (req) {
  441. void *buf = req->buf + req->actual;
  442. unsigned int len = req->length - req->actual;
  443. /* read the buffer */
  444. count = mtu3_readl(mbase, U3D_RXCOUNT0);
  445. if (count > len) {
  446. req->status = -EOVERFLOW;
  447. count = len;
  448. }
  449. ep0_read_fifo(mtu->ep0, buf, count);
  450. req->actual += count;
  451. csr |= EP0_RXPKTRDY;
  452. maxp = mtu->g.ep0->maxpacket;
  453. if (count < maxp || req->actual == req->length) {
  454. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  455. dev_dbg(mtu->dev, "ep0 state: %s\n",
  456. decode_ep0_state(mtu));
  457. csr |= EP0_DATAEND;
  458. } else {
  459. req = NULL;
  460. }
  461. } else {
  462. csr |= EP0_RXPKTRDY | EP0_SENDSTALL;
  463. dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__);
  464. }
  465. mtu3_writel(mbase, U3D_EP0CSR, csr);
  466. /* give back the request if have received all data */
  467. if (req)
  468. ep0_req_giveback(mtu, req);
  469. }
  470. /* transmitting to the host (IN) */
  471. static void ep0_tx_state(struct mtu3 *mtu)
  472. {
  473. struct mtu3_request *mreq = next_ep0_request(mtu);
  474. struct usb_request *req;
  475. u32 csr;
  476. u8 *src;
  477. u32 count;
  478. u32 maxp;
  479. dev_dbg(mtu->dev, "%s\n", __func__);
  480. if (!mreq)
  481. return;
  482. maxp = mtu->g.ep0->maxpacket;
  483. req = &mreq->request;
  484. /* load the data */
  485. src = (u8 *)req->buf + req->actual;
  486. count = min(maxp, req->length - req->actual);
  487. if (count)
  488. ep0_write_fifo(mtu->ep0, src, count);
  489. dev_dbg(mtu->dev, "%s act=%d, len=%d, cnt=%d, maxp=%d zero=%d\n",
  490. __func__, req->actual, req->length, count, maxp, req->zero);
  491. req->actual += count;
  492. if ((count < maxp)
  493. || ((req->actual == req->length) && !req->zero))
  494. mtu->ep0_state = MU3D_EP0_STATE_TX_END;
  495. /* send it out, triggering a "txpktrdy cleared" irq */
  496. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  497. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
  498. dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__,
  499. mtu3_readl(mtu->mac_base, U3D_EP0CSR));
  500. }
  501. static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  502. {
  503. struct mtu3_request *mreq;
  504. u32 count;
  505. u32 csr;
  506. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  507. count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0);
  508. ep0_read_fifo(mtu->ep0, (u8 *)setup, count);
  509. dev_dbg(mtu->dev, "SETUP req%02x.%02x v%04x i%04x l%04x\n",
  510. setup->bRequestType, setup->bRequest,
  511. le16_to_cpu(setup->wValue), le16_to_cpu(setup->wIndex),
  512. le16_to_cpu(setup->wLength));
  513. /* clean up any leftover transfers */
  514. mreq = next_ep0_request(mtu);
  515. if (mreq)
  516. ep0_req_giveback(mtu, &mreq->request);
  517. if (le16_to_cpu(setup->wLength) == 0) {
  518. ; /* no data stage, nothing to do */
  519. } else if (setup->bRequestType & USB_DIR_IN) {
  520. mtu3_writel(mtu->mac_base, U3D_EP0CSR,
  521. csr | EP0_SETUPPKTRDY | EP0_DPHTX);
  522. mtu->ep0_state = MU3D_EP0_STATE_TX;
  523. } else {
  524. mtu3_writel(mtu->mac_base, U3D_EP0CSR,
  525. (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX));
  526. mtu->ep0_state = MU3D_EP0_STATE_RX;
  527. }
  528. }
  529. static int ep0_handle_setup(struct mtu3 *mtu)
  530. __releases(mtu->lock)
  531. __acquires(mtu->lock)
  532. {
  533. struct usb_ctrlrequest setup;
  534. struct mtu3_request *mreq;
  535. void __iomem *mbase = mtu->mac_base;
  536. int handled = 0;
  537. ep0_read_setup(mtu, &setup);
  538. if ((setup.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
  539. handled = handle_standard_request(mtu, &setup);
  540. dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
  541. handled, decode_ep0_state(mtu));
  542. if (handled < 0)
  543. goto stall;
  544. else if (handled > 0)
  545. goto finish;
  546. handled = forward_to_driver(mtu, &setup);
  547. if (handled < 0) {
  548. stall:
  549. dev_dbg(mtu->dev, "%s stall (%d)\n", __func__, handled);
  550. ep0_stall_set(mtu->ep0, true,
  551. le16_to_cpu(setup.wLength) ? 0 : EP0_SETUPPKTRDY);
  552. return 0;
  553. }
  554. finish:
  555. if (mtu->test_mode) {
  556. ; /* nothing to do */
  557. } else if (handled == USB_GADGET_DELAYED_STATUS) {
  558. /* handle the delay STATUS phase till receive ep_queue on ep0 */
  559. mtu->delayed_status = true;
  560. } else if (le16_to_cpu(setup.wLength) == 0) { /* no data stage */
  561. mtu3_writel(mbase, U3D_EP0CSR,
  562. (mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS)
  563. | EP0_SETUPPKTRDY | EP0_DATAEND);
  564. /* complete zlp request directly */
  565. mreq = next_ep0_request(mtu);
  566. if (mreq && !mreq->request.length)
  567. ep0_req_giveback(mtu, &mreq->request);
  568. }
  569. return 0;
  570. }
  571. irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu)
  572. {
  573. void __iomem *mbase = mtu->mac_base;
  574. struct mtu3_request *mreq;
  575. u32 int_status;
  576. irqreturn_t ret = IRQ_NONE;
  577. u32 csr;
  578. u32 len;
  579. int_status = mtu3_readl(mbase, U3D_EPISR);
  580. int_status &= mtu3_readl(mbase, U3D_EPIER);
  581. mtu3_writel(mbase, U3D_EPISR, int_status); /* W1C */
  582. /* only handle ep0's */
  583. if (!(int_status & EP0ISR))
  584. return IRQ_NONE;
  585. csr = mtu3_readl(mbase, U3D_EP0CSR);
  586. dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr);
  587. /* we sent a stall.. need to clear it now.. */
  588. if (csr & EP0_SENTSTALL) {
  589. ep0_stall_set(mtu->ep0, false, 0);
  590. csr = mtu3_readl(mbase, U3D_EP0CSR);
  591. ret = IRQ_HANDLED;
  592. }
  593. dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
  594. switch (mtu->ep0_state) {
  595. case MU3D_EP0_STATE_TX:
  596. /* irq on clearing txpktrdy */
  597. if ((csr & EP0_FIFOFULL) == 0) {
  598. ep0_tx_state(mtu);
  599. ret = IRQ_HANDLED;
  600. }
  601. break;
  602. case MU3D_EP0_STATE_RX:
  603. /* irq on set rxpktrdy */
  604. if (csr & EP0_RXPKTRDY) {
  605. ep0_rx_state(mtu);
  606. ret = IRQ_HANDLED;
  607. }
  608. break;
  609. case MU3D_EP0_STATE_TX_END:
  610. mtu3_writel(mbase, U3D_EP0CSR,
  611. (csr & EP0_W1C_BITS) | EP0_DATAEND);
  612. mreq = next_ep0_request(mtu);
  613. if (mreq)
  614. ep0_req_giveback(mtu, &mreq->request);
  615. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  616. ret = IRQ_HANDLED;
  617. dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
  618. break;
  619. case MU3D_EP0_STATE_SETUP:
  620. if (!(csr & EP0_SETUPPKTRDY))
  621. break;
  622. len = mtu3_readl(mbase, U3D_RXCOUNT0);
  623. if (len != 8) {
  624. dev_err(mtu->dev, "SETUP packet len %d != 8 ?\n", len);
  625. break;
  626. }
  627. ep0_handle_setup(mtu);
  628. ret = IRQ_HANDLED;
  629. break;
  630. default:
  631. /* can't happen */
  632. ep0_stall_set(mtu->ep0, true, 0);
  633. WARN_ON(1);
  634. break;
  635. }
  636. return ret;
  637. }
  638. static int mtu3_ep0_enable(struct usb_ep *ep,
  639. const struct usb_endpoint_descriptor *desc)
  640. {
  641. /* always enabled */
  642. return -EINVAL;
  643. }
  644. static int mtu3_ep0_disable(struct usb_ep *ep)
  645. {
  646. /* always enabled */
  647. return -EINVAL;
  648. }
  649. static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq)
  650. {
  651. struct mtu3 *mtu = mep->mtu;
  652. mreq->mtu = mtu;
  653. mreq->request.actual = 0;
  654. mreq->request.status = -EINPROGRESS;
  655. dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
  656. mep->name, decode_ep0_state(mtu), mreq->request.length);
  657. switch (mtu->ep0_state) {
  658. case MU3D_EP0_STATE_SETUP:
  659. case MU3D_EP0_STATE_RX: /* control-OUT data */
  660. case MU3D_EP0_STATE_TX: /* control-IN data */
  661. break;
  662. default:
  663. dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__,
  664. decode_ep0_state(mtu));
  665. return -EINVAL;
  666. }
  667. if (mtu->delayed_status) {
  668. u32 csr;
  669. mtu->delayed_status = false;
  670. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  671. csr |= EP0_SETUPPKTRDY | EP0_DATAEND;
  672. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
  673. /* needn't giveback the request for handling delay STATUS */
  674. return 0;
  675. }
  676. if (!list_empty(&mep->req_list))
  677. return -EBUSY;
  678. list_add_tail(&mreq->list, &mep->req_list);
  679. /* sequence #1, IN ... start writing the data */
  680. if (mtu->ep0_state == MU3D_EP0_STATE_TX)
  681. ep0_tx_state(mtu);
  682. return 0;
  683. }
  684. static int mtu3_ep0_queue(struct usb_ep *ep,
  685. struct usb_request *req, gfp_t gfp)
  686. {
  687. struct mtu3_ep *mep;
  688. struct mtu3_request *mreq;
  689. struct mtu3 *mtu;
  690. unsigned long flags;
  691. int ret = 0;
  692. if (!ep || !req)
  693. return -EINVAL;
  694. mep = to_mtu3_ep(ep);
  695. mtu = mep->mtu;
  696. mreq = to_mtu3_request(req);
  697. spin_lock_irqsave(&mtu->lock, flags);
  698. ret = ep0_queue(mep, mreq);
  699. spin_unlock_irqrestore(&mtu->lock, flags);
  700. return ret;
  701. }
  702. static int mtu3_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
  703. {
  704. /* we just won't support this */
  705. return -EINVAL;
  706. }
  707. static int mtu3_ep0_halt(struct usb_ep *ep, int value)
  708. {
  709. struct mtu3_ep *mep;
  710. struct mtu3 *mtu;
  711. unsigned long flags;
  712. int ret = 0;
  713. if (!ep || !value)
  714. return -EINVAL;
  715. mep = to_mtu3_ep(ep);
  716. mtu = mep->mtu;
  717. dev_dbg(mtu->dev, "%s\n", __func__);
  718. spin_lock_irqsave(&mtu->lock, flags);
  719. if (!list_empty(&mep->req_list)) {
  720. ret = -EBUSY;
  721. goto cleanup;
  722. }
  723. switch (mtu->ep0_state) {
  724. /*
  725. * stalls are usually issued after parsing SETUP packet, either
  726. * directly in irq context from setup() or else later.
  727. */
  728. case MU3D_EP0_STATE_TX:
  729. case MU3D_EP0_STATE_TX_END:
  730. case MU3D_EP0_STATE_RX:
  731. case MU3D_EP0_STATE_SETUP:
  732. ep0_stall_set(mtu->ep0, true, 0);
  733. break;
  734. default:
  735. dev_dbg(mtu->dev, "ep0 can't halt in state %s\n",
  736. decode_ep0_state(mtu));
  737. ret = -EINVAL;
  738. }
  739. cleanup:
  740. spin_unlock_irqrestore(&mtu->lock, flags);
  741. return ret;
  742. }
  743. const struct usb_ep_ops mtu3_ep0_ops = {
  744. .enable = mtu3_ep0_enable,
  745. .disable = mtu3_ep0_disable,
  746. .alloc_request = mtu3_alloc_request,
  747. .free_request = mtu3_free_request,
  748. .queue = mtu3_ep0_queue,
  749. .dequeue = mtu3_ep0_dequeue,
  750. .set_halt = mtu3_ep0_halt,
  751. };