knav_qmss_acc.c 16 KB

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  1. /*
  2. * Keystone accumulator queue manager
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
  5. * Author: Sandeep Nair <sandeep_n@ti.com>
  6. * Cyril Chemparathy <cyril@ti.com>
  7. * Santosh Shilimkar <santosh.shilimkar@ti.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. */
  18. #include <linux/dma-mapping.h>
  19. #include <linux/io.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/module.h>
  22. #include <linux/of_address.h>
  23. #include <linux/soc/ti/knav_qmss.h>
  24. #include "knav_qmss.h"
  25. #define knav_range_offset_to_inst(kdev, range, q) \
  26. (range->queue_base_inst + (q << kdev->inst_shift))
  27. static void __knav_acc_notify(struct knav_range_info *range,
  28. struct knav_acc_channel *acc)
  29. {
  30. struct knav_device *kdev = range->kdev;
  31. struct knav_queue_inst *inst;
  32. int range_base, queue;
  33. range_base = kdev->base_id + range->queue_base;
  34. if (range->flags & RANGE_MULTI_QUEUE) {
  35. for (queue = 0; queue < range->num_queues; queue++) {
  36. inst = knav_range_offset_to_inst(kdev, range,
  37. queue);
  38. if (inst->notify_needed) {
  39. inst->notify_needed = 0;
  40. dev_dbg(kdev->dev, "acc-irq: notifying %d\n",
  41. range_base + queue);
  42. knav_queue_notify(inst);
  43. }
  44. }
  45. } else {
  46. queue = acc->channel - range->acc_info.start_channel;
  47. inst = knav_range_offset_to_inst(kdev, range, queue);
  48. dev_dbg(kdev->dev, "acc-irq: notifying %d\n",
  49. range_base + queue);
  50. knav_queue_notify(inst);
  51. }
  52. }
  53. static int knav_acc_set_notify(struct knav_range_info *range,
  54. struct knav_queue_inst *kq,
  55. bool enabled)
  56. {
  57. struct knav_pdsp_info *pdsp = range->acc_info.pdsp;
  58. struct knav_device *kdev = range->kdev;
  59. u32 mask, offset;
  60. /*
  61. * when enabling, we need to re-trigger an interrupt if we
  62. * have descriptors pending
  63. */
  64. if (!enabled || atomic_read(&kq->desc_count) <= 0)
  65. return 0;
  66. kq->notify_needed = 1;
  67. atomic_inc(&kq->acc->retrigger_count);
  68. mask = BIT(kq->acc->channel % 32);
  69. offset = ACC_INTD_OFFSET_STATUS(kq->acc->channel);
  70. dev_dbg(kdev->dev, "setup-notify: re-triggering irq for %s\n",
  71. kq->acc->name);
  72. writel_relaxed(mask, pdsp->intd + offset);
  73. return 0;
  74. }
  75. static irqreturn_t knav_acc_int_handler(int irq, void *_instdata)
  76. {
  77. struct knav_acc_channel *acc;
  78. struct knav_queue_inst *kq = NULL;
  79. struct knav_range_info *range;
  80. struct knav_pdsp_info *pdsp;
  81. struct knav_acc_info *info;
  82. struct knav_device *kdev;
  83. u32 *list, *list_cpu, val, idx, notifies;
  84. int range_base, channel, queue = 0;
  85. dma_addr_t list_dma;
  86. range = _instdata;
  87. info = &range->acc_info;
  88. kdev = range->kdev;
  89. pdsp = range->acc_info.pdsp;
  90. acc = range->acc;
  91. range_base = kdev->base_id + range->queue_base;
  92. if ((range->flags & RANGE_MULTI_QUEUE) == 0) {
  93. for (queue = 0; queue < range->num_irqs; queue++)
  94. if (range->irqs[queue].irq == irq)
  95. break;
  96. kq = knav_range_offset_to_inst(kdev, range, queue);
  97. acc += queue;
  98. }
  99. channel = acc->channel;
  100. list_dma = acc->list_dma[acc->list_index];
  101. list_cpu = acc->list_cpu[acc->list_index];
  102. dev_dbg(kdev->dev, "acc-irq: channel %d, list %d, virt %p, dma %pad\n",
  103. channel, acc->list_index, list_cpu, &list_dma);
  104. if (atomic_read(&acc->retrigger_count)) {
  105. atomic_dec(&acc->retrigger_count);
  106. __knav_acc_notify(range, acc);
  107. writel_relaxed(1, pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
  108. /* ack the interrupt */
  109. writel_relaxed(ACC_CHANNEL_INT_BASE + channel,
  110. pdsp->intd + ACC_INTD_OFFSET_EOI);
  111. return IRQ_HANDLED;
  112. }
  113. notifies = readl_relaxed(pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
  114. WARN_ON(!notifies);
  115. dma_sync_single_for_cpu(kdev->dev, list_dma, info->list_size,
  116. DMA_FROM_DEVICE);
  117. for (list = list_cpu; list < list_cpu + (info->list_size / sizeof(u32));
  118. list += ACC_LIST_ENTRY_WORDS) {
  119. if (ACC_LIST_ENTRY_WORDS == 1) {
  120. dev_dbg(kdev->dev,
  121. "acc-irq: list %d, entry @%p, %08x\n",
  122. acc->list_index, list, list[0]);
  123. } else if (ACC_LIST_ENTRY_WORDS == 2) {
  124. dev_dbg(kdev->dev,
  125. "acc-irq: list %d, entry @%p, %08x %08x\n",
  126. acc->list_index, list, list[0], list[1]);
  127. } else if (ACC_LIST_ENTRY_WORDS == 4) {
  128. dev_dbg(kdev->dev,
  129. "acc-irq: list %d, entry @%p, %08x %08x %08x %08x\n",
  130. acc->list_index, list, list[0], list[1],
  131. list[2], list[3]);
  132. }
  133. val = list[ACC_LIST_ENTRY_DESC_IDX];
  134. if (!val)
  135. break;
  136. if (range->flags & RANGE_MULTI_QUEUE) {
  137. queue = list[ACC_LIST_ENTRY_QUEUE_IDX] >> 16;
  138. if (queue < range_base ||
  139. queue >= range_base + range->num_queues) {
  140. dev_err(kdev->dev,
  141. "bad queue %d, expecting %d-%d\n",
  142. queue, range_base,
  143. range_base + range->num_queues);
  144. break;
  145. }
  146. queue -= range_base;
  147. kq = knav_range_offset_to_inst(kdev, range,
  148. queue);
  149. }
  150. if (atomic_inc_return(&kq->desc_count) >= ACC_DESCS_MAX) {
  151. atomic_dec(&kq->desc_count);
  152. dev_err(kdev->dev,
  153. "acc-irq: queue %d full, entry dropped\n",
  154. queue + range_base);
  155. continue;
  156. }
  157. idx = atomic_inc_return(&kq->desc_tail) & ACC_DESCS_MASK;
  158. kq->descs[idx] = val;
  159. kq->notify_needed = 1;
  160. dev_dbg(kdev->dev, "acc-irq: enqueue %08x at %d, queue %d\n",
  161. val, idx, queue + range_base);
  162. }
  163. __knav_acc_notify(range, acc);
  164. memset(list_cpu, 0, info->list_size);
  165. dma_sync_single_for_device(kdev->dev, list_dma, info->list_size,
  166. DMA_TO_DEVICE);
  167. /* flip to the other list */
  168. acc->list_index ^= 1;
  169. /* reset the interrupt counter */
  170. writel_relaxed(1, pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
  171. /* ack the interrupt */
  172. writel_relaxed(ACC_CHANNEL_INT_BASE + channel,
  173. pdsp->intd + ACC_INTD_OFFSET_EOI);
  174. return IRQ_HANDLED;
  175. }
  176. static int knav_range_setup_acc_irq(struct knav_range_info *range,
  177. int queue, bool enabled)
  178. {
  179. struct knav_device *kdev = range->kdev;
  180. struct knav_acc_channel *acc;
  181. struct cpumask *cpu_mask;
  182. int ret = 0, irq;
  183. u32 old, new;
  184. if (range->flags & RANGE_MULTI_QUEUE) {
  185. acc = range->acc;
  186. irq = range->irqs[0].irq;
  187. cpu_mask = range->irqs[0].cpu_mask;
  188. } else {
  189. acc = range->acc + queue;
  190. irq = range->irqs[queue].irq;
  191. cpu_mask = range->irqs[queue].cpu_mask;
  192. }
  193. old = acc->open_mask;
  194. if (enabled)
  195. new = old | BIT(queue);
  196. else
  197. new = old & ~BIT(queue);
  198. acc->open_mask = new;
  199. dev_dbg(kdev->dev,
  200. "setup-acc-irq: open mask old %08x, new %08x, channel %s\n",
  201. old, new, acc->name);
  202. if (likely(new == old))
  203. return 0;
  204. if (new && !old) {
  205. dev_dbg(kdev->dev,
  206. "setup-acc-irq: requesting %s for channel %s\n",
  207. acc->name, acc->name);
  208. ret = request_irq(irq, knav_acc_int_handler, 0, acc->name,
  209. range);
  210. if (!ret && cpu_mask) {
  211. ret = irq_set_affinity_hint(irq, cpu_mask);
  212. if (ret) {
  213. dev_warn(range->kdev->dev,
  214. "Failed to set IRQ affinity\n");
  215. return ret;
  216. }
  217. }
  218. }
  219. if (old && !new) {
  220. dev_dbg(kdev->dev, "setup-acc-irq: freeing %s for channel %s\n",
  221. acc->name, acc->name);
  222. ret = irq_set_affinity_hint(irq, NULL);
  223. if (ret)
  224. dev_warn(range->kdev->dev,
  225. "Failed to set IRQ affinity\n");
  226. free_irq(irq, range);
  227. }
  228. return ret;
  229. }
  230. static const char *knav_acc_result_str(enum knav_acc_result result)
  231. {
  232. static const char * const result_str[] = {
  233. [ACC_RET_IDLE] = "idle",
  234. [ACC_RET_SUCCESS] = "success",
  235. [ACC_RET_INVALID_COMMAND] = "invalid command",
  236. [ACC_RET_INVALID_CHANNEL] = "invalid channel",
  237. [ACC_RET_INACTIVE_CHANNEL] = "inactive channel",
  238. [ACC_RET_ACTIVE_CHANNEL] = "active channel",
  239. [ACC_RET_INVALID_QUEUE] = "invalid queue",
  240. [ACC_RET_INVALID_RET] = "invalid return code",
  241. };
  242. if (result >= ARRAY_SIZE(result_str))
  243. return result_str[ACC_RET_INVALID_RET];
  244. else
  245. return result_str[result];
  246. }
  247. static enum knav_acc_result
  248. knav_acc_write(struct knav_device *kdev, struct knav_pdsp_info *pdsp,
  249. struct knav_reg_acc_command *cmd)
  250. {
  251. u32 result;
  252. dev_dbg(kdev->dev, "acc command %08x %08x %08x %08x %08x\n",
  253. cmd->command, cmd->queue_mask, cmd->list_dma,
  254. cmd->queue_num, cmd->timer_config);
  255. writel_relaxed(cmd->timer_config, &pdsp->acc_command->timer_config);
  256. writel_relaxed(cmd->queue_num, &pdsp->acc_command->queue_num);
  257. writel_relaxed(cmd->list_dma, &pdsp->acc_command->list_dma);
  258. writel_relaxed(cmd->queue_mask, &pdsp->acc_command->queue_mask);
  259. writel_relaxed(cmd->command, &pdsp->acc_command->command);
  260. /* wait for the command to clear */
  261. do {
  262. result = readl_relaxed(&pdsp->acc_command->command);
  263. } while ((result >> 8) & 0xff);
  264. return (result >> 24) & 0xff;
  265. }
  266. static void knav_acc_setup_cmd(struct knav_device *kdev,
  267. struct knav_range_info *range,
  268. struct knav_reg_acc_command *cmd,
  269. int queue)
  270. {
  271. struct knav_acc_info *info = &range->acc_info;
  272. struct knav_acc_channel *acc;
  273. int queue_base;
  274. u32 queue_mask;
  275. if (range->flags & RANGE_MULTI_QUEUE) {
  276. acc = range->acc;
  277. queue_base = range->queue_base;
  278. queue_mask = BIT(range->num_queues) - 1;
  279. } else {
  280. acc = range->acc + queue;
  281. queue_base = range->queue_base + queue;
  282. queue_mask = 0;
  283. }
  284. memset(cmd, 0, sizeof(*cmd));
  285. cmd->command = acc->channel;
  286. cmd->queue_mask = queue_mask;
  287. cmd->list_dma = (u32)acc->list_dma[0];
  288. cmd->queue_num = info->list_entries << 16;
  289. cmd->queue_num |= queue_base;
  290. cmd->timer_config = ACC_LIST_ENTRY_TYPE << 18;
  291. if (range->flags & RANGE_MULTI_QUEUE)
  292. cmd->timer_config |= ACC_CFG_MULTI_QUEUE;
  293. cmd->timer_config |= info->pacing_mode << 16;
  294. cmd->timer_config |= info->timer_count;
  295. }
  296. static void knav_acc_stop(struct knav_device *kdev,
  297. struct knav_range_info *range,
  298. int queue)
  299. {
  300. struct knav_reg_acc_command cmd;
  301. struct knav_acc_channel *acc;
  302. enum knav_acc_result result;
  303. acc = range->acc + queue;
  304. knav_acc_setup_cmd(kdev, range, &cmd, queue);
  305. cmd.command |= ACC_CMD_DISABLE_CHANNEL << 8;
  306. result = knav_acc_write(kdev, range->acc_info.pdsp, &cmd);
  307. dev_dbg(kdev->dev, "stopped acc channel %s, result %s\n",
  308. acc->name, knav_acc_result_str(result));
  309. }
  310. static enum knav_acc_result knav_acc_start(struct knav_device *kdev,
  311. struct knav_range_info *range,
  312. int queue)
  313. {
  314. struct knav_reg_acc_command cmd;
  315. struct knav_acc_channel *acc;
  316. enum knav_acc_result result;
  317. acc = range->acc + queue;
  318. knav_acc_setup_cmd(kdev, range, &cmd, queue);
  319. cmd.command |= ACC_CMD_ENABLE_CHANNEL << 8;
  320. result = knav_acc_write(kdev, range->acc_info.pdsp, &cmd);
  321. dev_dbg(kdev->dev, "started acc channel %s, result %s\n",
  322. acc->name, knav_acc_result_str(result));
  323. return result;
  324. }
  325. static int knav_acc_init_range(struct knav_range_info *range)
  326. {
  327. struct knav_device *kdev = range->kdev;
  328. struct knav_acc_channel *acc;
  329. enum knav_acc_result result;
  330. int queue;
  331. for (queue = 0; queue < range->num_queues; queue++) {
  332. acc = range->acc + queue;
  333. knav_acc_stop(kdev, range, queue);
  334. acc->list_index = 0;
  335. result = knav_acc_start(kdev, range, queue);
  336. if (result != ACC_RET_SUCCESS)
  337. return -EIO;
  338. if (range->flags & RANGE_MULTI_QUEUE)
  339. return 0;
  340. }
  341. return 0;
  342. }
  343. static int knav_acc_init_queue(struct knav_range_info *range,
  344. struct knav_queue_inst *kq)
  345. {
  346. unsigned id = kq->id - range->queue_base;
  347. kq->descs = devm_kcalloc(range->kdev->dev,
  348. ACC_DESCS_MAX, sizeof(u32), GFP_KERNEL);
  349. if (!kq->descs)
  350. return -ENOMEM;
  351. kq->acc = range->acc;
  352. if ((range->flags & RANGE_MULTI_QUEUE) == 0)
  353. kq->acc += id;
  354. return 0;
  355. }
  356. static int knav_acc_open_queue(struct knav_range_info *range,
  357. struct knav_queue_inst *inst, unsigned flags)
  358. {
  359. unsigned id = inst->id - range->queue_base;
  360. return knav_range_setup_acc_irq(range, id, true);
  361. }
  362. static int knav_acc_close_queue(struct knav_range_info *range,
  363. struct knav_queue_inst *inst)
  364. {
  365. unsigned id = inst->id - range->queue_base;
  366. return knav_range_setup_acc_irq(range, id, false);
  367. }
  368. static int knav_acc_free_range(struct knav_range_info *range)
  369. {
  370. struct knav_device *kdev = range->kdev;
  371. struct knav_acc_channel *acc;
  372. struct knav_acc_info *info;
  373. int channel, channels;
  374. info = &range->acc_info;
  375. if (range->flags & RANGE_MULTI_QUEUE)
  376. channels = 1;
  377. else
  378. channels = range->num_queues;
  379. for (channel = 0; channel < channels; channel++) {
  380. acc = range->acc + channel;
  381. if (!acc->list_cpu[0])
  382. continue;
  383. dma_unmap_single(kdev->dev, acc->list_dma[0],
  384. info->mem_size, DMA_BIDIRECTIONAL);
  385. free_pages_exact(acc->list_cpu[0], info->mem_size);
  386. }
  387. devm_kfree(range->kdev->dev, range->acc);
  388. return 0;
  389. }
  390. struct knav_range_ops knav_acc_range_ops = {
  391. .set_notify = knav_acc_set_notify,
  392. .init_queue = knav_acc_init_queue,
  393. .open_queue = knav_acc_open_queue,
  394. .close_queue = knav_acc_close_queue,
  395. .init_range = knav_acc_init_range,
  396. .free_range = knav_acc_free_range,
  397. };
  398. /**
  399. * knav_init_acc_range: Initialise accumulator ranges
  400. *
  401. * @kdev: qmss device
  402. * @node: device node
  403. * @range: qmms range information
  404. *
  405. * Return 0 on success or error
  406. */
  407. int knav_init_acc_range(struct knav_device *kdev,
  408. struct device_node *node,
  409. struct knav_range_info *range)
  410. {
  411. struct knav_acc_channel *acc;
  412. struct knav_pdsp_info *pdsp;
  413. struct knav_acc_info *info;
  414. int ret, channel, channels;
  415. int list_size, mem_size;
  416. dma_addr_t list_dma;
  417. void *list_mem;
  418. u32 config[5];
  419. range->flags |= RANGE_HAS_ACCUMULATOR;
  420. info = &range->acc_info;
  421. ret = of_property_read_u32_array(node, "accumulator", config, 5);
  422. if (ret)
  423. return ret;
  424. info->pdsp_id = config[0];
  425. info->start_channel = config[1];
  426. info->list_entries = config[2];
  427. info->pacing_mode = config[3];
  428. info->timer_count = config[4] / ACC_DEFAULT_PERIOD;
  429. if (info->start_channel > ACC_MAX_CHANNEL) {
  430. dev_err(kdev->dev, "channel %d invalid for range %s\n",
  431. info->start_channel, range->name);
  432. return -EINVAL;
  433. }
  434. if (info->pacing_mode > 3) {
  435. dev_err(kdev->dev, "pacing mode %d invalid for range %s\n",
  436. info->pacing_mode, range->name);
  437. return -EINVAL;
  438. }
  439. pdsp = knav_find_pdsp(kdev, info->pdsp_id);
  440. if (!pdsp) {
  441. dev_err(kdev->dev, "pdsp id %d not found for range %s\n",
  442. info->pdsp_id, range->name);
  443. return -EINVAL;
  444. }
  445. if (!pdsp->started) {
  446. dev_err(kdev->dev, "pdsp id %d not started for range %s\n",
  447. info->pdsp_id, range->name);
  448. return -ENODEV;
  449. }
  450. info->pdsp = pdsp;
  451. channels = range->num_queues;
  452. if (of_get_property(node, "multi-queue", NULL)) {
  453. range->flags |= RANGE_MULTI_QUEUE;
  454. channels = 1;
  455. if (range->queue_base & (32 - 1)) {
  456. dev_err(kdev->dev,
  457. "misaligned multi-queue accumulator range %s\n",
  458. range->name);
  459. return -EINVAL;
  460. }
  461. if (range->num_queues > 32) {
  462. dev_err(kdev->dev,
  463. "too many queues in accumulator range %s\n",
  464. range->name);
  465. return -EINVAL;
  466. }
  467. }
  468. /* figure out list size */
  469. list_size = info->list_entries;
  470. list_size *= ACC_LIST_ENTRY_WORDS * sizeof(u32);
  471. info->list_size = list_size;
  472. mem_size = PAGE_ALIGN(list_size * 2);
  473. info->mem_size = mem_size;
  474. range->acc = devm_kcalloc(kdev->dev, channels, sizeof(*range->acc),
  475. GFP_KERNEL);
  476. if (!range->acc)
  477. return -ENOMEM;
  478. for (channel = 0; channel < channels; channel++) {
  479. acc = range->acc + channel;
  480. acc->channel = info->start_channel + channel;
  481. /* allocate memory for the two lists */
  482. list_mem = alloc_pages_exact(mem_size, GFP_KERNEL | GFP_DMA);
  483. if (!list_mem)
  484. return -ENOMEM;
  485. list_dma = dma_map_single(kdev->dev, list_mem, mem_size,
  486. DMA_BIDIRECTIONAL);
  487. if (dma_mapping_error(kdev->dev, list_dma)) {
  488. free_pages_exact(list_mem, mem_size);
  489. return -ENOMEM;
  490. }
  491. memset(list_mem, 0, mem_size);
  492. dma_sync_single_for_device(kdev->dev, list_dma, mem_size,
  493. DMA_TO_DEVICE);
  494. scnprintf(acc->name, sizeof(acc->name), "hwqueue-acc-%d",
  495. acc->channel);
  496. acc->list_cpu[0] = list_mem;
  497. acc->list_cpu[1] = list_mem + list_size;
  498. acc->list_dma[0] = list_dma;
  499. acc->list_dma[1] = list_dma + list_size;
  500. dev_dbg(kdev->dev, "%s: channel %d, dma %pad, virt %8p\n",
  501. acc->name, acc->channel, &list_dma, list_mem);
  502. }
  503. range->ops = &knav_acc_range_ops;
  504. return 0;
  505. }
  506. EXPORT_SYMBOL_GPL(knav_init_acc_range);