port.c 52 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771
  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * BSD LICENSE
  25. *
  26. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27. * All rights reserved.
  28. *
  29. * Redistribution and use in source and binary forms, with or without
  30. * modification, are permitted provided that the following conditions
  31. * are met:
  32. *
  33. * * Redistributions of source code must retain the above copyright
  34. * notice, this list of conditions and the following disclaimer.
  35. * * Redistributions in binary form must reproduce the above copyright
  36. * notice, this list of conditions and the following disclaimer in
  37. * the documentation and/or other materials provided with the
  38. * distribution.
  39. * * Neither the name of Intel Corporation nor the names of its
  40. * contributors may be used to endorse or promote products derived
  41. * from this software without specific prior written permission.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54. */
  55. #include "isci.h"
  56. #include "port.h"
  57. #include "request.h"
  58. #define SCIC_SDS_PORT_HARD_RESET_TIMEOUT (1000)
  59. #define SCU_DUMMY_INDEX (0xFFFF)
  60. #undef C
  61. #define C(a) (#a)
  62. const char *port_state_name(enum sci_port_states state)
  63. {
  64. static const char * const strings[] = PORT_STATES;
  65. return strings[state];
  66. }
  67. #undef C
  68. static struct device *sciport_to_dev(struct isci_port *iport)
  69. {
  70. int i = iport->physical_port_index;
  71. struct isci_port *table;
  72. struct isci_host *ihost;
  73. if (i == SCIC_SDS_DUMMY_PORT)
  74. i = SCI_MAX_PORTS+1;
  75. table = iport - i;
  76. ihost = container_of(table, typeof(*ihost), ports[0]);
  77. return &ihost->pdev->dev;
  78. }
  79. static void sci_port_get_protocols(struct isci_port *iport, struct sci_phy_proto *proto)
  80. {
  81. u8 index;
  82. proto->all = 0;
  83. for (index = 0; index < SCI_MAX_PHYS; index++) {
  84. struct isci_phy *iphy = iport->phy_table[index];
  85. if (!iphy)
  86. continue;
  87. sci_phy_get_protocols(iphy, proto);
  88. }
  89. }
  90. static u32 sci_port_get_phys(struct isci_port *iport)
  91. {
  92. u32 index;
  93. u32 mask;
  94. mask = 0;
  95. for (index = 0; index < SCI_MAX_PHYS; index++)
  96. if (iport->phy_table[index])
  97. mask |= (1 << index);
  98. return mask;
  99. }
  100. /**
  101. * sci_port_get_properties() - This method simply returns the properties
  102. * regarding the port, such as: physical index, protocols, sas address, etc.
  103. * @port: this parameter specifies the port for which to retrieve the physical
  104. * index.
  105. * @properties: This parameter specifies the properties structure into which to
  106. * copy the requested information.
  107. *
  108. * Indicate if the user specified a valid port. SCI_SUCCESS This value is
  109. * returned if the specified port was valid. SCI_FAILURE_INVALID_PORT This
  110. * value is returned if the specified port is not valid. When this value is
  111. * returned, no data is copied to the properties output parameter.
  112. */
  113. enum sci_status sci_port_get_properties(struct isci_port *iport,
  114. struct sci_port_properties *prop)
  115. {
  116. if (!iport || iport->logical_port_index == SCIC_SDS_DUMMY_PORT)
  117. return SCI_FAILURE_INVALID_PORT;
  118. prop->index = iport->logical_port_index;
  119. prop->phy_mask = sci_port_get_phys(iport);
  120. sci_port_get_sas_address(iport, &prop->local.sas_address);
  121. sci_port_get_protocols(iport, &prop->local.protocols);
  122. sci_port_get_attached_sas_address(iport, &prop->remote.sas_address);
  123. return SCI_SUCCESS;
  124. }
  125. static void sci_port_bcn_enable(struct isci_port *iport)
  126. {
  127. struct isci_phy *iphy;
  128. u32 val;
  129. int i;
  130. for (i = 0; i < ARRAY_SIZE(iport->phy_table); i++) {
  131. iphy = iport->phy_table[i];
  132. if (!iphy)
  133. continue;
  134. val = readl(&iphy->link_layer_registers->link_layer_control);
  135. /* clear the bit by writing 1. */
  136. writel(val, &iphy->link_layer_registers->link_layer_control);
  137. }
  138. }
  139. static void isci_port_bc_change_received(struct isci_host *ihost,
  140. struct isci_port *iport,
  141. struct isci_phy *iphy)
  142. {
  143. dev_dbg(&ihost->pdev->dev,
  144. "%s: isci_phy = %p, sas_phy = %p\n",
  145. __func__, iphy, &iphy->sas_phy);
  146. ihost->sas_ha.notify_port_event(&iphy->sas_phy, PORTE_BROADCAST_RCVD);
  147. sci_port_bcn_enable(iport);
  148. }
  149. static void isci_port_link_up(struct isci_host *isci_host,
  150. struct isci_port *iport,
  151. struct isci_phy *iphy)
  152. {
  153. unsigned long flags;
  154. struct sci_port_properties properties;
  155. unsigned long success = true;
  156. dev_dbg(&isci_host->pdev->dev,
  157. "%s: isci_port = %p\n",
  158. __func__, iport);
  159. spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
  160. sci_port_get_properties(iport, &properties);
  161. if (iphy->protocol == SAS_PROTOCOL_SATA) {
  162. u64 attached_sas_address;
  163. iphy->sas_phy.oob_mode = SATA_OOB_MODE;
  164. iphy->sas_phy.frame_rcvd_size = sizeof(struct dev_to_host_fis);
  165. /*
  166. * For direct-attached SATA devices, the SCI core will
  167. * automagically assign a SAS address to the end device
  168. * for the purpose of creating a port. This SAS address
  169. * will not be the same as assigned to the PHY and needs
  170. * to be obtained from struct sci_port_properties properties.
  171. */
  172. attached_sas_address = properties.remote.sas_address.high;
  173. attached_sas_address <<= 32;
  174. attached_sas_address |= properties.remote.sas_address.low;
  175. swab64s(&attached_sas_address);
  176. memcpy(&iphy->sas_phy.attached_sas_addr,
  177. &attached_sas_address, sizeof(attached_sas_address));
  178. } else if (iphy->protocol == SAS_PROTOCOL_SSP) {
  179. iphy->sas_phy.oob_mode = SAS_OOB_MODE;
  180. iphy->sas_phy.frame_rcvd_size = sizeof(struct sas_identify_frame);
  181. /* Copy the attached SAS address from the IAF */
  182. memcpy(iphy->sas_phy.attached_sas_addr,
  183. iphy->frame_rcvd.iaf.sas_addr, SAS_ADDR_SIZE);
  184. } else {
  185. dev_err(&isci_host->pdev->dev, "%s: unknown target\n", __func__);
  186. success = false;
  187. }
  188. iphy->sas_phy.phy->negotiated_linkrate = sci_phy_linkrate(iphy);
  189. spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
  190. /* Notify libsas that we have an address frame, if indeed
  191. * we've found an SSP, SMP, or STP target */
  192. if (success)
  193. isci_host->sas_ha.notify_port_event(&iphy->sas_phy,
  194. PORTE_BYTES_DMAED);
  195. }
  196. /**
  197. * isci_port_link_down() - This function is called by the sci core when a link
  198. * becomes inactive.
  199. * @isci_host: This parameter specifies the isci host object.
  200. * @phy: This parameter specifies the isci phy with the active link.
  201. * @port: This parameter specifies the isci port with the active link.
  202. *
  203. */
  204. static void isci_port_link_down(struct isci_host *isci_host,
  205. struct isci_phy *isci_phy,
  206. struct isci_port *isci_port)
  207. {
  208. struct isci_remote_device *isci_device;
  209. dev_dbg(&isci_host->pdev->dev,
  210. "%s: isci_port = %p\n", __func__, isci_port);
  211. if (isci_port) {
  212. /* check to see if this is the last phy on this port. */
  213. if (isci_phy->sas_phy.port &&
  214. isci_phy->sas_phy.port->num_phys == 1) {
  215. /* change the state for all devices on this port. The
  216. * next task sent to this device will be returned as
  217. * SAS_TASK_UNDELIVERED, and the scsi mid layer will
  218. * remove the target
  219. */
  220. list_for_each_entry(isci_device,
  221. &isci_port->remote_dev_list,
  222. node) {
  223. dev_dbg(&isci_host->pdev->dev,
  224. "%s: isci_device = %p\n",
  225. __func__, isci_device);
  226. set_bit(IDEV_GONE, &isci_device->flags);
  227. }
  228. }
  229. }
  230. /* Notify libsas of the borken link, this will trigger calls to our
  231. * isci_port_deformed and isci_dev_gone functions.
  232. */
  233. sas_phy_disconnected(&isci_phy->sas_phy);
  234. isci_host->sas_ha.notify_phy_event(&isci_phy->sas_phy,
  235. PHYE_LOSS_OF_SIGNAL);
  236. dev_dbg(&isci_host->pdev->dev,
  237. "%s: isci_port = %p - Done\n", __func__, isci_port);
  238. }
  239. static bool is_port_ready_state(enum sci_port_states state)
  240. {
  241. switch (state) {
  242. case SCI_PORT_READY:
  243. case SCI_PORT_SUB_WAITING:
  244. case SCI_PORT_SUB_OPERATIONAL:
  245. case SCI_PORT_SUB_CONFIGURING:
  246. return true;
  247. default:
  248. return false;
  249. }
  250. }
  251. /* flag dummy rnc hanling when exiting a ready state */
  252. static void port_state_machine_change(struct isci_port *iport,
  253. enum sci_port_states state)
  254. {
  255. struct sci_base_state_machine *sm = &iport->sm;
  256. enum sci_port_states old_state = sm->current_state_id;
  257. if (is_port_ready_state(old_state) && !is_port_ready_state(state))
  258. iport->ready_exit = true;
  259. sci_change_state(sm, state);
  260. iport->ready_exit = false;
  261. }
  262. /**
  263. * isci_port_hard_reset_complete() - This function is called by the sci core
  264. * when the hard reset complete notification has been received.
  265. * @port: This parameter specifies the sci port with the active link.
  266. * @completion_status: This parameter specifies the core status for the reset
  267. * process.
  268. *
  269. */
  270. static void isci_port_hard_reset_complete(struct isci_port *isci_port,
  271. enum sci_status completion_status)
  272. {
  273. struct isci_host *ihost = isci_port->owning_controller;
  274. dev_dbg(&ihost->pdev->dev,
  275. "%s: isci_port = %p, completion_status=%x\n",
  276. __func__, isci_port, completion_status);
  277. /* Save the status of the hard reset from the port. */
  278. isci_port->hard_reset_status = completion_status;
  279. if (completion_status != SCI_SUCCESS) {
  280. /* The reset failed. The port state is now SCI_PORT_FAILED. */
  281. if (isci_port->active_phy_mask == 0) {
  282. int phy_idx = isci_port->last_active_phy;
  283. struct isci_phy *iphy = &ihost->phys[phy_idx];
  284. /* Generate the link down now to the host, since it
  285. * was intercepted by the hard reset state machine when
  286. * it really happened.
  287. */
  288. isci_port_link_down(ihost, iphy, isci_port);
  289. }
  290. /* Advance the port state so that link state changes will be
  291. * noticed.
  292. */
  293. port_state_machine_change(isci_port, SCI_PORT_SUB_WAITING);
  294. }
  295. clear_bit(IPORT_RESET_PENDING, &isci_port->state);
  296. wake_up(&ihost->eventq);
  297. }
  298. /* This method will return a true value if the specified phy can be assigned to
  299. * this port The following is a list of phys for each port that are allowed: -
  300. * Port 0 - 3 2 1 0 - Port 1 - 1 - Port 2 - 3 2 - Port 3 - 3 This method
  301. * doesn't preclude all configurations. It merely ensures that a phy is part
  302. * of the allowable set of phy identifiers for that port. For example, one
  303. * could assign phy 3 to port 0 and no other phys. Please refer to
  304. * sci_port_is_phy_mask_valid() for information regarding whether the
  305. * phy_mask for a port can be supported. bool true if this is a valid phy
  306. * assignment for the port false if this is not a valid phy assignment for the
  307. * port
  308. */
  309. bool sci_port_is_valid_phy_assignment(struct isci_port *iport, u32 phy_index)
  310. {
  311. struct isci_host *ihost = iport->owning_controller;
  312. struct sci_user_parameters *user = &ihost->user_parameters;
  313. /* Initialize to invalid value. */
  314. u32 existing_phy_index = SCI_MAX_PHYS;
  315. u32 index;
  316. if ((iport->physical_port_index == 1) && (phy_index != 1))
  317. return false;
  318. if (iport->physical_port_index == 3 && phy_index != 3)
  319. return false;
  320. if (iport->physical_port_index == 2 &&
  321. (phy_index == 0 || phy_index == 1))
  322. return false;
  323. for (index = 0; index < SCI_MAX_PHYS; index++)
  324. if (iport->phy_table[index] && index != phy_index)
  325. existing_phy_index = index;
  326. /* Ensure that all of the phys in the port are capable of
  327. * operating at the same maximum link rate.
  328. */
  329. if (existing_phy_index < SCI_MAX_PHYS &&
  330. user->phys[phy_index].max_speed_generation !=
  331. user->phys[existing_phy_index].max_speed_generation)
  332. return false;
  333. return true;
  334. }
  335. /**
  336. *
  337. * @sci_port: This is the port object for which to determine if the phy mask
  338. * can be supported.
  339. *
  340. * This method will return a true value if the port's phy mask can be supported
  341. * by the SCU. The following is a list of valid PHY mask configurations for
  342. * each port: - Port 0 - [[3 2] 1] 0 - Port 1 - [1] - Port 2 - [[3] 2]
  343. * - Port 3 - [3] This method returns a boolean indication specifying if the
  344. * phy mask can be supported. true if this is a valid phy assignment for the
  345. * port false if this is not a valid phy assignment for the port
  346. */
  347. static bool sci_port_is_phy_mask_valid(
  348. struct isci_port *iport,
  349. u32 phy_mask)
  350. {
  351. if (iport->physical_port_index == 0) {
  352. if (((phy_mask & 0x0F) == 0x0F)
  353. || ((phy_mask & 0x03) == 0x03)
  354. || ((phy_mask & 0x01) == 0x01)
  355. || (phy_mask == 0))
  356. return true;
  357. } else if (iport->physical_port_index == 1) {
  358. if (((phy_mask & 0x02) == 0x02)
  359. || (phy_mask == 0))
  360. return true;
  361. } else if (iport->physical_port_index == 2) {
  362. if (((phy_mask & 0x0C) == 0x0C)
  363. || ((phy_mask & 0x04) == 0x04)
  364. || (phy_mask == 0))
  365. return true;
  366. } else if (iport->physical_port_index == 3) {
  367. if (((phy_mask & 0x08) == 0x08)
  368. || (phy_mask == 0))
  369. return true;
  370. }
  371. return false;
  372. }
  373. /*
  374. * This method retrieves a currently active (i.e. connected) phy contained in
  375. * the port. Currently, the lowest order phy that is connected is returned.
  376. * This method returns a pointer to a SCIS_SDS_PHY object. NULL This value is
  377. * returned if there are no currently active (i.e. connected to a remote end
  378. * point) phys contained in the port. All other values specify a struct sci_phy
  379. * object that is active in the port.
  380. */
  381. static struct isci_phy *sci_port_get_a_connected_phy(struct isci_port *iport)
  382. {
  383. u32 index;
  384. struct isci_phy *iphy;
  385. for (index = 0; index < SCI_MAX_PHYS; index++) {
  386. /* Ensure that the phy is both part of the port and currently
  387. * connected to the remote end-point.
  388. */
  389. iphy = iport->phy_table[index];
  390. if (iphy && sci_port_active_phy(iport, iphy))
  391. return iphy;
  392. }
  393. return NULL;
  394. }
  395. static enum sci_status sci_port_set_phy(struct isci_port *iport, struct isci_phy *iphy)
  396. {
  397. /* Check to see if we can add this phy to a port
  398. * that means that the phy is not part of a port and that the port does
  399. * not already have a phy assinged to the phy index.
  400. */
  401. if (!iport->phy_table[iphy->phy_index] &&
  402. !phy_get_non_dummy_port(iphy) &&
  403. sci_port_is_valid_phy_assignment(iport, iphy->phy_index)) {
  404. /* Phy is being added in the stopped state so we are in MPC mode
  405. * make logical port index = physical port index
  406. */
  407. iport->logical_port_index = iport->physical_port_index;
  408. iport->phy_table[iphy->phy_index] = iphy;
  409. sci_phy_set_port(iphy, iport);
  410. return SCI_SUCCESS;
  411. }
  412. return SCI_FAILURE;
  413. }
  414. static enum sci_status sci_port_clear_phy(struct isci_port *iport, struct isci_phy *iphy)
  415. {
  416. /* Make sure that this phy is part of this port */
  417. if (iport->phy_table[iphy->phy_index] == iphy &&
  418. phy_get_non_dummy_port(iphy) == iport) {
  419. struct isci_host *ihost = iport->owning_controller;
  420. /* Yep it is assigned to this port so remove it */
  421. sci_phy_set_port(iphy, &ihost->ports[SCI_MAX_PORTS]);
  422. iport->phy_table[iphy->phy_index] = NULL;
  423. return SCI_SUCCESS;
  424. }
  425. return SCI_FAILURE;
  426. }
  427. void sci_port_get_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
  428. {
  429. u32 index;
  430. sas->high = 0;
  431. sas->low = 0;
  432. for (index = 0; index < SCI_MAX_PHYS; index++)
  433. if (iport->phy_table[index])
  434. sci_phy_get_sas_address(iport->phy_table[index], sas);
  435. }
  436. void sci_port_get_attached_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
  437. {
  438. struct isci_phy *iphy;
  439. /*
  440. * Ensure that the phy is both part of the port and currently
  441. * connected to the remote end-point.
  442. */
  443. iphy = sci_port_get_a_connected_phy(iport);
  444. if (iphy) {
  445. if (iphy->protocol != SAS_PROTOCOL_SATA) {
  446. sci_phy_get_attached_sas_address(iphy, sas);
  447. } else {
  448. sci_phy_get_sas_address(iphy, sas);
  449. sas->low += iphy->phy_index;
  450. }
  451. } else {
  452. sas->high = 0;
  453. sas->low = 0;
  454. }
  455. }
  456. /**
  457. * sci_port_construct_dummy_rnc() - create dummy rnc for si workaround
  458. *
  459. * @sci_port: logical port on which we need to create the remote node context
  460. * @rni: remote node index for this remote node context.
  461. *
  462. * This routine will construct a dummy remote node context data structure
  463. * This structure will be posted to the hardware to work around a scheduler
  464. * error in the hardware.
  465. */
  466. static void sci_port_construct_dummy_rnc(struct isci_port *iport, u16 rni)
  467. {
  468. union scu_remote_node_context *rnc;
  469. rnc = &iport->owning_controller->remote_node_context_table[rni];
  470. memset(rnc, 0, sizeof(union scu_remote_node_context));
  471. rnc->ssp.remote_sas_address_hi = 0;
  472. rnc->ssp.remote_sas_address_lo = 0;
  473. rnc->ssp.remote_node_index = rni;
  474. rnc->ssp.remote_node_port_width = 1;
  475. rnc->ssp.logical_port_index = iport->physical_port_index;
  476. rnc->ssp.nexus_loss_timer_enable = false;
  477. rnc->ssp.check_bit = false;
  478. rnc->ssp.is_valid = true;
  479. rnc->ssp.is_remote_node_context = true;
  480. rnc->ssp.function_number = 0;
  481. rnc->ssp.arbitration_wait_time = 0;
  482. }
  483. /*
  484. * construct a dummy task context data structure. This
  485. * structure will be posted to the hardwre to work around a scheduler error
  486. * in the hardware.
  487. */
  488. static void sci_port_construct_dummy_task(struct isci_port *iport, u16 tag)
  489. {
  490. struct isci_host *ihost = iport->owning_controller;
  491. struct scu_task_context *task_context;
  492. task_context = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
  493. memset(task_context, 0, sizeof(struct scu_task_context));
  494. task_context->initiator_request = 1;
  495. task_context->connection_rate = 1;
  496. task_context->logical_port_index = iport->physical_port_index;
  497. task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP;
  498. task_context->task_index = ISCI_TAG_TCI(tag);
  499. task_context->valid = SCU_TASK_CONTEXT_VALID;
  500. task_context->context_type = SCU_TASK_CONTEXT_TYPE;
  501. task_context->remote_node_index = iport->reserved_rni;
  502. task_context->do_not_dma_ssp_good_response = 1;
  503. task_context->task_phase = 0x01;
  504. }
  505. static void sci_port_destroy_dummy_resources(struct isci_port *iport)
  506. {
  507. struct isci_host *ihost = iport->owning_controller;
  508. if (iport->reserved_tag != SCI_CONTROLLER_INVALID_IO_TAG)
  509. isci_free_tag(ihost, iport->reserved_tag);
  510. if (iport->reserved_rni != SCU_DUMMY_INDEX)
  511. sci_remote_node_table_release_remote_node_index(&ihost->available_remote_nodes,
  512. 1, iport->reserved_rni);
  513. iport->reserved_rni = SCU_DUMMY_INDEX;
  514. iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
  515. }
  516. void sci_port_setup_transports(struct isci_port *iport, u32 device_id)
  517. {
  518. u8 index;
  519. for (index = 0; index < SCI_MAX_PHYS; index++) {
  520. if (iport->active_phy_mask & (1 << index))
  521. sci_phy_setup_transport(iport->phy_table[index], device_id);
  522. }
  523. }
  524. static void sci_port_resume_phy(struct isci_port *iport, struct isci_phy *iphy)
  525. {
  526. sci_phy_resume(iphy);
  527. iport->enabled_phy_mask |= 1 << iphy->phy_index;
  528. }
  529. static void sci_port_activate_phy(struct isci_port *iport,
  530. struct isci_phy *iphy,
  531. u8 flags)
  532. {
  533. struct isci_host *ihost = iport->owning_controller;
  534. if (iphy->protocol != SAS_PROTOCOL_SATA && (flags & PF_RESUME))
  535. sci_phy_resume(iphy);
  536. iport->active_phy_mask |= 1 << iphy->phy_index;
  537. sci_controller_clear_invalid_phy(ihost, iphy);
  538. if (flags & PF_NOTIFY)
  539. isci_port_link_up(ihost, iport, iphy);
  540. }
  541. void sci_port_deactivate_phy(struct isci_port *iport, struct isci_phy *iphy,
  542. bool do_notify_user)
  543. {
  544. struct isci_host *ihost = iport->owning_controller;
  545. iport->active_phy_mask &= ~(1 << iphy->phy_index);
  546. iport->enabled_phy_mask &= ~(1 << iphy->phy_index);
  547. if (!iport->active_phy_mask)
  548. iport->last_active_phy = iphy->phy_index;
  549. iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
  550. /* Re-assign the phy back to the LP as if it were a narrow port for APC
  551. * mode. For MPC mode, the phy will remain in the port.
  552. */
  553. if (iport->owning_controller->oem_parameters.controller.mode_type ==
  554. SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE)
  555. writel(iphy->phy_index,
  556. &iport->port_pe_configuration_register[iphy->phy_index]);
  557. if (do_notify_user == true)
  558. isci_port_link_down(ihost, iphy, iport);
  559. }
  560. static void sci_port_invalid_link_up(struct isci_port *iport, struct isci_phy *iphy)
  561. {
  562. struct isci_host *ihost = iport->owning_controller;
  563. /*
  564. * Check to see if we have alreay reported this link as bad and if
  565. * not go ahead and tell the SCI_USER that we have discovered an
  566. * invalid link.
  567. */
  568. if ((ihost->invalid_phy_mask & (1 << iphy->phy_index)) == 0) {
  569. ihost->invalid_phy_mask |= 1 << iphy->phy_index;
  570. dev_warn(&ihost->pdev->dev, "Invalid link up!\n");
  571. }
  572. }
  573. /**
  574. * sci_port_general_link_up_handler - phy can be assigned to port?
  575. * @sci_port: sci_port object for which has a phy that has gone link up.
  576. * @sci_phy: This is the struct isci_phy object that has gone link up.
  577. * @flags: PF_RESUME, PF_NOTIFY to sci_port_activate_phy
  578. *
  579. * Determine if this phy can be assigned to this port . If the phy is
  580. * not a valid PHY for this port then the function will notify the user.
  581. * A PHY can only be part of a port if it's attached SAS ADDRESS is the
  582. * same as all other PHYs in the same port.
  583. */
  584. static void sci_port_general_link_up_handler(struct isci_port *iport,
  585. struct isci_phy *iphy,
  586. u8 flags)
  587. {
  588. struct sci_sas_address port_sas_address;
  589. struct sci_sas_address phy_sas_address;
  590. sci_port_get_attached_sas_address(iport, &port_sas_address);
  591. sci_phy_get_attached_sas_address(iphy, &phy_sas_address);
  592. /* If the SAS address of the new phy matches the SAS address of
  593. * other phys in the port OR this is the first phy in the port,
  594. * then activate the phy and allow it to be used for operations
  595. * in this port.
  596. */
  597. if ((phy_sas_address.high == port_sas_address.high &&
  598. phy_sas_address.low == port_sas_address.low) ||
  599. iport->active_phy_mask == 0) {
  600. struct sci_base_state_machine *sm = &iport->sm;
  601. sci_port_activate_phy(iport, iphy, flags);
  602. if (sm->current_state_id == SCI_PORT_RESETTING)
  603. port_state_machine_change(iport, SCI_PORT_READY);
  604. } else
  605. sci_port_invalid_link_up(iport, iphy);
  606. }
  607. /**
  608. * This method returns false if the port only has a single phy object assigned.
  609. * If there are no phys or more than one phy then the method will return
  610. * true.
  611. * @sci_port: The port for which the wide port condition is to be checked.
  612. *
  613. * bool true Is returned if this is a wide ported port. false Is returned if
  614. * this is a narrow port.
  615. */
  616. static bool sci_port_is_wide(struct isci_port *iport)
  617. {
  618. u32 index;
  619. u32 phy_count = 0;
  620. for (index = 0; index < SCI_MAX_PHYS; index++) {
  621. if (iport->phy_table[index] != NULL) {
  622. phy_count++;
  623. }
  624. }
  625. return phy_count != 1;
  626. }
  627. /**
  628. * This method is called by the PHY object when the link is detected. if the
  629. * port wants the PHY to continue on to the link up state then the port
  630. * layer must return true. If the port object returns false the phy object
  631. * must halt its attempt to go link up.
  632. * @sci_port: The port associated with the phy object.
  633. * @sci_phy: The phy object that is trying to go link up.
  634. *
  635. * true if the phy object can continue to the link up condition. true Is
  636. * returned if this phy can continue to the ready state. false Is returned if
  637. * can not continue on to the ready state. This notification is in place for
  638. * wide ports and direct attached phys. Since there are no wide ported SATA
  639. * devices this could become an invalid port configuration.
  640. */
  641. bool sci_port_link_detected(struct isci_port *iport, struct isci_phy *iphy)
  642. {
  643. if ((iport->logical_port_index != SCIC_SDS_DUMMY_PORT) &&
  644. (iphy->protocol == SAS_PROTOCOL_SATA)) {
  645. if (sci_port_is_wide(iport)) {
  646. sci_port_invalid_link_up(iport, iphy);
  647. return false;
  648. } else {
  649. struct isci_host *ihost = iport->owning_controller;
  650. struct isci_port *dst_port = &(ihost->ports[iphy->phy_index]);
  651. writel(iphy->phy_index,
  652. &dst_port->port_pe_configuration_register[iphy->phy_index]);
  653. }
  654. }
  655. return true;
  656. }
  657. static void port_timeout(struct timer_list *t)
  658. {
  659. struct sci_timer *tmr = from_timer(tmr, t, timer);
  660. struct isci_port *iport = container_of(tmr, typeof(*iport), timer);
  661. struct isci_host *ihost = iport->owning_controller;
  662. unsigned long flags;
  663. u32 current_state;
  664. spin_lock_irqsave(&ihost->scic_lock, flags);
  665. if (tmr->cancel)
  666. goto done;
  667. current_state = iport->sm.current_state_id;
  668. if (current_state == SCI_PORT_RESETTING) {
  669. /* if the port is still in the resetting state then the timeout
  670. * fired before the reset completed.
  671. */
  672. port_state_machine_change(iport, SCI_PORT_FAILED);
  673. } else if (current_state == SCI_PORT_STOPPED) {
  674. /* if the port is stopped then the start request failed In this
  675. * case stay in the stopped state.
  676. */
  677. dev_err(sciport_to_dev(iport),
  678. "%s: SCIC Port 0x%p failed to stop before timeout.\n",
  679. __func__,
  680. iport);
  681. } else if (current_state == SCI_PORT_STOPPING) {
  682. dev_dbg(sciport_to_dev(iport),
  683. "%s: port%d: stop complete timeout\n",
  684. __func__, iport->physical_port_index);
  685. } else {
  686. /* The port is in the ready state and we have a timer
  687. * reporting a timeout this should not happen.
  688. */
  689. dev_err(sciport_to_dev(iport),
  690. "%s: SCIC Port 0x%p is processing a timeout operation "
  691. "in state %d.\n", __func__, iport, current_state);
  692. }
  693. done:
  694. spin_unlock_irqrestore(&ihost->scic_lock, flags);
  695. }
  696. /* --------------------------------------------------------------------------- */
  697. /**
  698. * This function updates the hardwares VIIT entry for this port.
  699. *
  700. *
  701. */
  702. static void sci_port_update_viit_entry(struct isci_port *iport)
  703. {
  704. struct sci_sas_address sas_address;
  705. sci_port_get_sas_address(iport, &sas_address);
  706. writel(sas_address.high,
  707. &iport->viit_registers->initiator_sas_address_hi);
  708. writel(sas_address.low,
  709. &iport->viit_registers->initiator_sas_address_lo);
  710. /* This value get cleared just in case its not already cleared */
  711. writel(0, &iport->viit_registers->reserved);
  712. /* We are required to update the status register last */
  713. writel(SCU_VIIT_ENTRY_ID_VIIT |
  714. SCU_VIIT_IPPT_INITIATOR |
  715. ((1 << iport->physical_port_index) << SCU_VIIT_ENTRY_LPVIE_SHIFT) |
  716. SCU_VIIT_STATUS_ALL_VALID,
  717. &iport->viit_registers->status);
  718. }
  719. enum sas_linkrate sci_port_get_max_allowed_speed(struct isci_port *iport)
  720. {
  721. u16 index;
  722. struct isci_phy *iphy;
  723. enum sas_linkrate max_allowed_speed = SAS_LINK_RATE_6_0_GBPS;
  724. /*
  725. * Loop through all of the phys in this port and find the phy with the
  726. * lowest maximum link rate. */
  727. for (index = 0; index < SCI_MAX_PHYS; index++) {
  728. iphy = iport->phy_table[index];
  729. if (iphy && sci_port_active_phy(iport, iphy) &&
  730. iphy->max_negotiated_speed < max_allowed_speed)
  731. max_allowed_speed = iphy->max_negotiated_speed;
  732. }
  733. return max_allowed_speed;
  734. }
  735. static void sci_port_suspend_port_task_scheduler(struct isci_port *iport)
  736. {
  737. u32 pts_control_value;
  738. pts_control_value = readl(&iport->port_task_scheduler_registers->control);
  739. pts_control_value |= SCU_PTSxCR_GEN_BIT(SUSPEND);
  740. writel(pts_control_value, &iport->port_task_scheduler_registers->control);
  741. }
  742. /**
  743. * sci_port_post_dummy_request() - post dummy/workaround request
  744. * @sci_port: port to post task
  745. *
  746. * Prevent the hardware scheduler from posting new requests to the front
  747. * of the scheduler queue causing a starvation problem for currently
  748. * ongoing requests.
  749. *
  750. */
  751. static void sci_port_post_dummy_request(struct isci_port *iport)
  752. {
  753. struct isci_host *ihost = iport->owning_controller;
  754. u16 tag = iport->reserved_tag;
  755. struct scu_task_context *tc;
  756. u32 command;
  757. tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
  758. tc->abort = 0;
  759. command = SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
  760. iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
  761. ISCI_TAG_TCI(tag);
  762. sci_controller_post_request(ihost, command);
  763. }
  764. /**
  765. * This routine will abort the dummy request. This will alow the hardware to
  766. * power down parts of the silicon to save power.
  767. *
  768. * @sci_port: The port on which the task must be aborted.
  769. *
  770. */
  771. static void sci_port_abort_dummy_request(struct isci_port *iport)
  772. {
  773. struct isci_host *ihost = iport->owning_controller;
  774. u16 tag = iport->reserved_tag;
  775. struct scu_task_context *tc;
  776. u32 command;
  777. tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
  778. tc->abort = 1;
  779. command = SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT |
  780. iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
  781. ISCI_TAG_TCI(tag);
  782. sci_controller_post_request(ihost, command);
  783. }
  784. /**
  785. *
  786. * @sci_port: This is the struct isci_port object to resume.
  787. *
  788. * This method will resume the port task scheduler for this port object. none
  789. */
  790. static void
  791. sci_port_resume_port_task_scheduler(struct isci_port *iport)
  792. {
  793. u32 pts_control_value;
  794. pts_control_value = readl(&iport->port_task_scheduler_registers->control);
  795. pts_control_value &= ~SCU_PTSxCR_GEN_BIT(SUSPEND);
  796. writel(pts_control_value, &iport->port_task_scheduler_registers->control);
  797. }
  798. static void sci_port_ready_substate_waiting_enter(struct sci_base_state_machine *sm)
  799. {
  800. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  801. sci_port_suspend_port_task_scheduler(iport);
  802. iport->not_ready_reason = SCIC_PORT_NOT_READY_NO_ACTIVE_PHYS;
  803. if (iport->active_phy_mask != 0) {
  804. /* At least one of the phys on the port is ready */
  805. port_state_machine_change(iport,
  806. SCI_PORT_SUB_OPERATIONAL);
  807. }
  808. }
  809. static void scic_sds_port_ready_substate_waiting_exit(
  810. struct sci_base_state_machine *sm)
  811. {
  812. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  813. sci_port_resume_port_task_scheduler(iport);
  814. }
  815. static void sci_port_ready_substate_operational_enter(struct sci_base_state_machine *sm)
  816. {
  817. u32 index;
  818. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  819. struct isci_host *ihost = iport->owning_controller;
  820. dev_dbg(&ihost->pdev->dev, "%s: port%d ready\n",
  821. __func__, iport->physical_port_index);
  822. for (index = 0; index < SCI_MAX_PHYS; index++) {
  823. if (iport->phy_table[index]) {
  824. writel(iport->physical_port_index,
  825. &iport->port_pe_configuration_register[
  826. iport->phy_table[index]->phy_index]);
  827. if (((iport->active_phy_mask^iport->enabled_phy_mask) & (1 << index)) != 0)
  828. sci_port_resume_phy(iport, iport->phy_table[index]);
  829. }
  830. }
  831. sci_port_update_viit_entry(iport);
  832. /*
  833. * Post the dummy task for the port so the hardware can schedule
  834. * io correctly
  835. */
  836. sci_port_post_dummy_request(iport);
  837. }
  838. static void sci_port_invalidate_dummy_remote_node(struct isci_port *iport)
  839. {
  840. struct isci_host *ihost = iport->owning_controller;
  841. u8 phys_index = iport->physical_port_index;
  842. union scu_remote_node_context *rnc;
  843. u16 rni = iport->reserved_rni;
  844. u32 command;
  845. rnc = &ihost->remote_node_context_table[rni];
  846. rnc->ssp.is_valid = false;
  847. /* ensure the preceding tc abort request has reached the
  848. * controller and give it ample time to act before posting the rnc
  849. * invalidate
  850. */
  851. readl(&ihost->smu_registers->interrupt_status); /* flush */
  852. udelay(10);
  853. command = SCU_CONTEXT_COMMAND_POST_RNC_INVALIDATE |
  854. phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
  855. sci_controller_post_request(ihost, command);
  856. }
  857. /**
  858. *
  859. * @object: This is the object which is cast to a struct isci_port object.
  860. *
  861. * This method will perform the actions required by the struct isci_port on
  862. * exiting the SCI_PORT_SUB_OPERATIONAL. This function reports
  863. * the port not ready and suspends the port task scheduler. none
  864. */
  865. static void sci_port_ready_substate_operational_exit(struct sci_base_state_machine *sm)
  866. {
  867. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  868. struct isci_host *ihost = iport->owning_controller;
  869. /*
  870. * Kill the dummy task for this port if it has not yet posted
  871. * the hardware will treat this as a NOP and just return abort
  872. * complete.
  873. */
  874. sci_port_abort_dummy_request(iport);
  875. dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
  876. __func__, iport->physical_port_index);
  877. if (iport->ready_exit)
  878. sci_port_invalidate_dummy_remote_node(iport);
  879. }
  880. static void sci_port_ready_substate_configuring_enter(struct sci_base_state_machine *sm)
  881. {
  882. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  883. struct isci_host *ihost = iport->owning_controller;
  884. if (iport->active_phy_mask == 0) {
  885. dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
  886. __func__, iport->physical_port_index);
  887. port_state_machine_change(iport, SCI_PORT_SUB_WAITING);
  888. } else
  889. port_state_machine_change(iport, SCI_PORT_SUB_OPERATIONAL);
  890. }
  891. enum sci_status sci_port_start(struct isci_port *iport)
  892. {
  893. struct isci_host *ihost = iport->owning_controller;
  894. enum sci_status status = SCI_SUCCESS;
  895. enum sci_port_states state;
  896. u32 phy_mask;
  897. state = iport->sm.current_state_id;
  898. if (state != SCI_PORT_STOPPED) {
  899. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  900. __func__, port_state_name(state));
  901. return SCI_FAILURE_INVALID_STATE;
  902. }
  903. if (iport->assigned_device_count > 0) {
  904. /* TODO This is a start failure operation because
  905. * there are still devices assigned to this port.
  906. * There must be no devices assigned to a port on a
  907. * start operation.
  908. */
  909. return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
  910. }
  911. if (iport->reserved_rni == SCU_DUMMY_INDEX) {
  912. u16 rni = sci_remote_node_table_allocate_remote_node(
  913. &ihost->available_remote_nodes, 1);
  914. if (rni != SCU_DUMMY_INDEX)
  915. sci_port_construct_dummy_rnc(iport, rni);
  916. else
  917. status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
  918. iport->reserved_rni = rni;
  919. }
  920. if (iport->reserved_tag == SCI_CONTROLLER_INVALID_IO_TAG) {
  921. u16 tag;
  922. tag = isci_alloc_tag(ihost);
  923. if (tag == SCI_CONTROLLER_INVALID_IO_TAG)
  924. status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
  925. else
  926. sci_port_construct_dummy_task(iport, tag);
  927. iport->reserved_tag = tag;
  928. }
  929. if (status == SCI_SUCCESS) {
  930. phy_mask = sci_port_get_phys(iport);
  931. /*
  932. * There are one or more phys assigned to this port. Make sure
  933. * the port's phy mask is in fact legal and supported by the
  934. * silicon.
  935. */
  936. if (sci_port_is_phy_mask_valid(iport, phy_mask) == true) {
  937. port_state_machine_change(iport,
  938. SCI_PORT_READY);
  939. return SCI_SUCCESS;
  940. }
  941. status = SCI_FAILURE;
  942. }
  943. if (status != SCI_SUCCESS)
  944. sci_port_destroy_dummy_resources(iport);
  945. return status;
  946. }
  947. enum sci_status sci_port_stop(struct isci_port *iport)
  948. {
  949. enum sci_port_states state;
  950. state = iport->sm.current_state_id;
  951. switch (state) {
  952. case SCI_PORT_STOPPED:
  953. return SCI_SUCCESS;
  954. case SCI_PORT_SUB_WAITING:
  955. case SCI_PORT_SUB_OPERATIONAL:
  956. case SCI_PORT_SUB_CONFIGURING:
  957. case SCI_PORT_RESETTING:
  958. port_state_machine_change(iport,
  959. SCI_PORT_STOPPING);
  960. return SCI_SUCCESS;
  961. default:
  962. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  963. __func__, port_state_name(state));
  964. return SCI_FAILURE_INVALID_STATE;
  965. }
  966. }
  967. static enum sci_status sci_port_hard_reset(struct isci_port *iport, u32 timeout)
  968. {
  969. enum sci_status status = SCI_FAILURE_INVALID_PHY;
  970. struct isci_phy *iphy = NULL;
  971. enum sci_port_states state;
  972. u32 phy_index;
  973. state = iport->sm.current_state_id;
  974. if (state != SCI_PORT_SUB_OPERATIONAL) {
  975. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  976. __func__, port_state_name(state));
  977. return SCI_FAILURE_INVALID_STATE;
  978. }
  979. /* Select a phy on which we can send the hard reset request. */
  980. for (phy_index = 0; phy_index < SCI_MAX_PHYS && !iphy; phy_index++) {
  981. iphy = iport->phy_table[phy_index];
  982. if (iphy && !sci_port_active_phy(iport, iphy)) {
  983. /*
  984. * We found a phy but it is not ready select
  985. * different phy
  986. */
  987. iphy = NULL;
  988. }
  989. }
  990. /* If we have a phy then go ahead and start the reset procedure */
  991. if (!iphy)
  992. return status;
  993. status = sci_phy_reset(iphy);
  994. if (status != SCI_SUCCESS)
  995. return status;
  996. sci_mod_timer(&iport->timer, timeout);
  997. iport->not_ready_reason = SCIC_PORT_NOT_READY_HARD_RESET_REQUESTED;
  998. port_state_machine_change(iport, SCI_PORT_RESETTING);
  999. return SCI_SUCCESS;
  1000. }
  1001. /**
  1002. * sci_port_add_phy() -
  1003. * @sci_port: This parameter specifies the port in which the phy will be added.
  1004. * @sci_phy: This parameter is the phy which is to be added to the port.
  1005. *
  1006. * This method will add a PHY to the selected port. This method returns an
  1007. * enum sci_status. SCI_SUCCESS the phy has been added to the port. Any other
  1008. * status is a failure to add the phy to the port.
  1009. */
  1010. enum sci_status sci_port_add_phy(struct isci_port *iport,
  1011. struct isci_phy *iphy)
  1012. {
  1013. enum sci_status status;
  1014. enum sci_port_states state;
  1015. sci_port_bcn_enable(iport);
  1016. state = iport->sm.current_state_id;
  1017. switch (state) {
  1018. case SCI_PORT_STOPPED: {
  1019. struct sci_sas_address port_sas_address;
  1020. /* Read the port assigned SAS Address if there is one */
  1021. sci_port_get_sas_address(iport, &port_sas_address);
  1022. if (port_sas_address.high != 0 && port_sas_address.low != 0) {
  1023. struct sci_sas_address phy_sas_address;
  1024. /* Make sure that the PHY SAS Address matches the SAS Address
  1025. * for this port
  1026. */
  1027. sci_phy_get_sas_address(iphy, &phy_sas_address);
  1028. if (port_sas_address.high != phy_sas_address.high ||
  1029. port_sas_address.low != phy_sas_address.low)
  1030. return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
  1031. }
  1032. return sci_port_set_phy(iport, iphy);
  1033. }
  1034. case SCI_PORT_SUB_WAITING:
  1035. case SCI_PORT_SUB_OPERATIONAL:
  1036. status = sci_port_set_phy(iport, iphy);
  1037. if (status != SCI_SUCCESS)
  1038. return status;
  1039. sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
  1040. iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
  1041. port_state_machine_change(iport, SCI_PORT_SUB_CONFIGURING);
  1042. return status;
  1043. case SCI_PORT_SUB_CONFIGURING:
  1044. status = sci_port_set_phy(iport, iphy);
  1045. if (status != SCI_SUCCESS)
  1046. return status;
  1047. sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY);
  1048. /* Re-enter the configuring state since this may be the last phy in
  1049. * the port.
  1050. */
  1051. port_state_machine_change(iport,
  1052. SCI_PORT_SUB_CONFIGURING);
  1053. return SCI_SUCCESS;
  1054. default:
  1055. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  1056. __func__, port_state_name(state));
  1057. return SCI_FAILURE_INVALID_STATE;
  1058. }
  1059. }
  1060. /**
  1061. * sci_port_remove_phy() -
  1062. * @sci_port: This parameter specifies the port in which the phy will be added.
  1063. * @sci_phy: This parameter is the phy which is to be added to the port.
  1064. *
  1065. * This method will remove the PHY from the selected PORT. This method returns
  1066. * an enum sci_status. SCI_SUCCESS the phy has been removed from the port. Any
  1067. * other status is a failure to add the phy to the port.
  1068. */
  1069. enum sci_status sci_port_remove_phy(struct isci_port *iport,
  1070. struct isci_phy *iphy)
  1071. {
  1072. enum sci_status status;
  1073. enum sci_port_states state;
  1074. state = iport->sm.current_state_id;
  1075. switch (state) {
  1076. case SCI_PORT_STOPPED:
  1077. return sci_port_clear_phy(iport, iphy);
  1078. case SCI_PORT_SUB_OPERATIONAL:
  1079. status = sci_port_clear_phy(iport, iphy);
  1080. if (status != SCI_SUCCESS)
  1081. return status;
  1082. sci_port_deactivate_phy(iport, iphy, true);
  1083. iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
  1084. port_state_machine_change(iport,
  1085. SCI_PORT_SUB_CONFIGURING);
  1086. return SCI_SUCCESS;
  1087. case SCI_PORT_SUB_CONFIGURING:
  1088. status = sci_port_clear_phy(iport, iphy);
  1089. if (status != SCI_SUCCESS)
  1090. return status;
  1091. sci_port_deactivate_phy(iport, iphy, true);
  1092. /* Re-enter the configuring state since this may be the last phy in
  1093. * the port
  1094. */
  1095. port_state_machine_change(iport,
  1096. SCI_PORT_SUB_CONFIGURING);
  1097. return SCI_SUCCESS;
  1098. default:
  1099. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  1100. __func__, port_state_name(state));
  1101. return SCI_FAILURE_INVALID_STATE;
  1102. }
  1103. }
  1104. enum sci_status sci_port_link_up(struct isci_port *iport,
  1105. struct isci_phy *iphy)
  1106. {
  1107. enum sci_port_states state;
  1108. state = iport->sm.current_state_id;
  1109. switch (state) {
  1110. case SCI_PORT_SUB_WAITING:
  1111. /* Since this is the first phy going link up for the port we
  1112. * can just enable it and continue
  1113. */
  1114. sci_port_activate_phy(iport, iphy, PF_NOTIFY|PF_RESUME);
  1115. port_state_machine_change(iport,
  1116. SCI_PORT_SUB_OPERATIONAL);
  1117. return SCI_SUCCESS;
  1118. case SCI_PORT_SUB_OPERATIONAL:
  1119. sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
  1120. return SCI_SUCCESS;
  1121. case SCI_PORT_RESETTING:
  1122. /* TODO We should make sure that the phy that has gone
  1123. * link up is the same one on which we sent the reset. It is
  1124. * possible that the phy on which we sent the reset is not the
  1125. * one that has gone link up and we want to make sure that
  1126. * phy being reset comes back. Consider the case where a
  1127. * reset is sent but before the hardware processes the reset it
  1128. * get a link up on the port because of a hot plug event.
  1129. * because of the reset request this phy will go link down
  1130. * almost immediately.
  1131. */
  1132. /* In the resetting state we don't notify the user regarding
  1133. * link up and link down notifications.
  1134. */
  1135. sci_port_general_link_up_handler(iport, iphy, PF_RESUME);
  1136. return SCI_SUCCESS;
  1137. default:
  1138. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  1139. __func__, port_state_name(state));
  1140. return SCI_FAILURE_INVALID_STATE;
  1141. }
  1142. }
  1143. enum sci_status sci_port_link_down(struct isci_port *iport,
  1144. struct isci_phy *iphy)
  1145. {
  1146. enum sci_port_states state;
  1147. state = iport->sm.current_state_id;
  1148. switch (state) {
  1149. case SCI_PORT_SUB_OPERATIONAL:
  1150. sci_port_deactivate_phy(iport, iphy, true);
  1151. /* If there are no active phys left in the port, then
  1152. * transition the port to the WAITING state until such time
  1153. * as a phy goes link up
  1154. */
  1155. if (iport->active_phy_mask == 0)
  1156. port_state_machine_change(iport,
  1157. SCI_PORT_SUB_WAITING);
  1158. return SCI_SUCCESS;
  1159. case SCI_PORT_RESETTING:
  1160. /* In the resetting state we don't notify the user regarding
  1161. * link up and link down notifications. */
  1162. sci_port_deactivate_phy(iport, iphy, false);
  1163. return SCI_SUCCESS;
  1164. default:
  1165. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  1166. __func__, port_state_name(state));
  1167. return SCI_FAILURE_INVALID_STATE;
  1168. }
  1169. }
  1170. enum sci_status sci_port_start_io(struct isci_port *iport,
  1171. struct isci_remote_device *idev,
  1172. struct isci_request *ireq)
  1173. {
  1174. enum sci_port_states state;
  1175. state = iport->sm.current_state_id;
  1176. switch (state) {
  1177. case SCI_PORT_SUB_WAITING:
  1178. return SCI_FAILURE_INVALID_STATE;
  1179. case SCI_PORT_SUB_OPERATIONAL:
  1180. iport->started_request_count++;
  1181. return SCI_SUCCESS;
  1182. default:
  1183. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  1184. __func__, port_state_name(state));
  1185. return SCI_FAILURE_INVALID_STATE;
  1186. }
  1187. }
  1188. enum sci_status sci_port_complete_io(struct isci_port *iport,
  1189. struct isci_remote_device *idev,
  1190. struct isci_request *ireq)
  1191. {
  1192. enum sci_port_states state;
  1193. state = iport->sm.current_state_id;
  1194. switch (state) {
  1195. case SCI_PORT_STOPPED:
  1196. dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
  1197. __func__, port_state_name(state));
  1198. return SCI_FAILURE_INVALID_STATE;
  1199. case SCI_PORT_STOPPING:
  1200. sci_port_decrement_request_count(iport);
  1201. if (iport->started_request_count == 0)
  1202. port_state_machine_change(iport,
  1203. SCI_PORT_STOPPED);
  1204. break;
  1205. case SCI_PORT_READY:
  1206. case SCI_PORT_RESETTING:
  1207. case SCI_PORT_FAILED:
  1208. case SCI_PORT_SUB_WAITING:
  1209. case SCI_PORT_SUB_OPERATIONAL:
  1210. sci_port_decrement_request_count(iport);
  1211. break;
  1212. case SCI_PORT_SUB_CONFIGURING:
  1213. sci_port_decrement_request_count(iport);
  1214. if (iport->started_request_count == 0) {
  1215. port_state_machine_change(iport,
  1216. SCI_PORT_SUB_OPERATIONAL);
  1217. }
  1218. break;
  1219. }
  1220. return SCI_SUCCESS;
  1221. }
  1222. static void sci_port_enable_port_task_scheduler(struct isci_port *iport)
  1223. {
  1224. u32 pts_control_value;
  1225. /* enable the port task scheduler in a suspended state */
  1226. pts_control_value = readl(&iport->port_task_scheduler_registers->control);
  1227. pts_control_value |= SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND);
  1228. writel(pts_control_value, &iport->port_task_scheduler_registers->control);
  1229. }
  1230. static void sci_port_disable_port_task_scheduler(struct isci_port *iport)
  1231. {
  1232. u32 pts_control_value;
  1233. pts_control_value = readl(&iport->port_task_scheduler_registers->control);
  1234. pts_control_value &=
  1235. ~(SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND));
  1236. writel(pts_control_value, &iport->port_task_scheduler_registers->control);
  1237. }
  1238. static void sci_port_post_dummy_remote_node(struct isci_port *iport)
  1239. {
  1240. struct isci_host *ihost = iport->owning_controller;
  1241. u8 phys_index = iport->physical_port_index;
  1242. union scu_remote_node_context *rnc;
  1243. u16 rni = iport->reserved_rni;
  1244. u32 command;
  1245. rnc = &ihost->remote_node_context_table[rni];
  1246. rnc->ssp.is_valid = true;
  1247. command = SCU_CONTEXT_COMMAND_POST_RNC_32 |
  1248. phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
  1249. sci_controller_post_request(ihost, command);
  1250. /* ensure hardware has seen the post rnc command and give it
  1251. * ample time to act before sending the suspend
  1252. */
  1253. readl(&ihost->smu_registers->interrupt_status); /* flush */
  1254. udelay(10);
  1255. command = SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX_RX |
  1256. phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
  1257. sci_controller_post_request(ihost, command);
  1258. }
  1259. static void sci_port_stopped_state_enter(struct sci_base_state_machine *sm)
  1260. {
  1261. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  1262. if (iport->sm.previous_state_id == SCI_PORT_STOPPING) {
  1263. /*
  1264. * If we enter this state becasuse of a request to stop
  1265. * the port then we want to disable the hardwares port
  1266. * task scheduler. */
  1267. sci_port_disable_port_task_scheduler(iport);
  1268. }
  1269. }
  1270. static void sci_port_stopped_state_exit(struct sci_base_state_machine *sm)
  1271. {
  1272. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  1273. /* Enable and suspend the port task scheduler */
  1274. sci_port_enable_port_task_scheduler(iport);
  1275. }
  1276. static void sci_port_ready_state_enter(struct sci_base_state_machine *sm)
  1277. {
  1278. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  1279. struct isci_host *ihost = iport->owning_controller;
  1280. u32 prev_state;
  1281. prev_state = iport->sm.previous_state_id;
  1282. if (prev_state == SCI_PORT_RESETTING)
  1283. isci_port_hard_reset_complete(iport, SCI_SUCCESS);
  1284. else
  1285. dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
  1286. __func__, iport->physical_port_index);
  1287. /* Post and suspend the dummy remote node context for this port. */
  1288. sci_port_post_dummy_remote_node(iport);
  1289. /* Start the ready substate machine */
  1290. port_state_machine_change(iport,
  1291. SCI_PORT_SUB_WAITING);
  1292. }
  1293. static void sci_port_resetting_state_exit(struct sci_base_state_machine *sm)
  1294. {
  1295. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  1296. sci_del_timer(&iport->timer);
  1297. }
  1298. static void sci_port_stopping_state_exit(struct sci_base_state_machine *sm)
  1299. {
  1300. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  1301. sci_del_timer(&iport->timer);
  1302. sci_port_destroy_dummy_resources(iport);
  1303. }
  1304. static void sci_port_failed_state_enter(struct sci_base_state_machine *sm)
  1305. {
  1306. struct isci_port *iport = container_of(sm, typeof(*iport), sm);
  1307. isci_port_hard_reset_complete(iport, SCI_FAILURE_TIMEOUT);
  1308. }
  1309. void sci_port_set_hang_detection_timeout(struct isci_port *iport, u32 timeout)
  1310. {
  1311. int phy_index;
  1312. u32 phy_mask = iport->active_phy_mask;
  1313. if (timeout)
  1314. ++iport->hang_detect_users;
  1315. else if (iport->hang_detect_users > 1)
  1316. --iport->hang_detect_users;
  1317. else
  1318. iport->hang_detect_users = 0;
  1319. if (timeout || (iport->hang_detect_users == 0)) {
  1320. for (phy_index = 0; phy_index < SCI_MAX_PHYS; phy_index++) {
  1321. if ((phy_mask >> phy_index) & 1) {
  1322. writel(timeout,
  1323. &iport->phy_table[phy_index]
  1324. ->link_layer_registers
  1325. ->link_layer_hang_detection_timeout);
  1326. }
  1327. }
  1328. }
  1329. }
  1330. /* --------------------------------------------------------------------------- */
  1331. static const struct sci_base_state sci_port_state_table[] = {
  1332. [SCI_PORT_STOPPED] = {
  1333. .enter_state = sci_port_stopped_state_enter,
  1334. .exit_state = sci_port_stopped_state_exit
  1335. },
  1336. [SCI_PORT_STOPPING] = {
  1337. .exit_state = sci_port_stopping_state_exit
  1338. },
  1339. [SCI_PORT_READY] = {
  1340. .enter_state = sci_port_ready_state_enter,
  1341. },
  1342. [SCI_PORT_SUB_WAITING] = {
  1343. .enter_state = sci_port_ready_substate_waiting_enter,
  1344. .exit_state = scic_sds_port_ready_substate_waiting_exit,
  1345. },
  1346. [SCI_PORT_SUB_OPERATIONAL] = {
  1347. .enter_state = sci_port_ready_substate_operational_enter,
  1348. .exit_state = sci_port_ready_substate_operational_exit
  1349. },
  1350. [SCI_PORT_SUB_CONFIGURING] = {
  1351. .enter_state = sci_port_ready_substate_configuring_enter
  1352. },
  1353. [SCI_PORT_RESETTING] = {
  1354. .exit_state = sci_port_resetting_state_exit
  1355. },
  1356. [SCI_PORT_FAILED] = {
  1357. .enter_state = sci_port_failed_state_enter,
  1358. }
  1359. };
  1360. void sci_port_construct(struct isci_port *iport, u8 index,
  1361. struct isci_host *ihost)
  1362. {
  1363. sci_init_sm(&iport->sm, sci_port_state_table, SCI_PORT_STOPPED);
  1364. iport->logical_port_index = SCIC_SDS_DUMMY_PORT;
  1365. iport->physical_port_index = index;
  1366. iport->active_phy_mask = 0;
  1367. iport->enabled_phy_mask = 0;
  1368. iport->last_active_phy = 0;
  1369. iport->ready_exit = false;
  1370. iport->owning_controller = ihost;
  1371. iport->started_request_count = 0;
  1372. iport->assigned_device_count = 0;
  1373. iport->hang_detect_users = 0;
  1374. iport->reserved_rni = SCU_DUMMY_INDEX;
  1375. iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
  1376. sci_init_timer(&iport->timer, port_timeout);
  1377. iport->port_task_scheduler_registers = NULL;
  1378. for (index = 0; index < SCI_MAX_PHYS; index++)
  1379. iport->phy_table[index] = NULL;
  1380. }
  1381. void sci_port_broadcast_change_received(struct isci_port *iport, struct isci_phy *iphy)
  1382. {
  1383. struct isci_host *ihost = iport->owning_controller;
  1384. /* notify the user. */
  1385. isci_port_bc_change_received(ihost, iport, iphy);
  1386. }
  1387. static void wait_port_reset(struct isci_host *ihost, struct isci_port *iport)
  1388. {
  1389. wait_event(ihost->eventq, !test_bit(IPORT_RESET_PENDING, &iport->state));
  1390. }
  1391. int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *iport,
  1392. struct isci_phy *iphy)
  1393. {
  1394. unsigned long flags;
  1395. enum sci_status status;
  1396. int ret = TMF_RESP_FUNC_COMPLETE;
  1397. dev_dbg(&ihost->pdev->dev, "%s: iport = %p\n",
  1398. __func__, iport);
  1399. spin_lock_irqsave(&ihost->scic_lock, flags);
  1400. set_bit(IPORT_RESET_PENDING, &iport->state);
  1401. #define ISCI_PORT_RESET_TIMEOUT SCIC_SDS_SIGNATURE_FIS_TIMEOUT
  1402. status = sci_port_hard_reset(iport, ISCI_PORT_RESET_TIMEOUT);
  1403. spin_unlock_irqrestore(&ihost->scic_lock, flags);
  1404. if (status == SCI_SUCCESS) {
  1405. wait_port_reset(ihost, iport);
  1406. dev_dbg(&ihost->pdev->dev,
  1407. "%s: iport = %p; hard reset completion\n",
  1408. __func__, iport);
  1409. if (iport->hard_reset_status != SCI_SUCCESS) {
  1410. ret = TMF_RESP_FUNC_FAILED;
  1411. dev_err(&ihost->pdev->dev,
  1412. "%s: iport = %p; hard reset failed (0x%x)\n",
  1413. __func__, iport, iport->hard_reset_status);
  1414. }
  1415. } else {
  1416. clear_bit(IPORT_RESET_PENDING, &iport->state);
  1417. wake_up(&ihost->eventq);
  1418. ret = TMF_RESP_FUNC_FAILED;
  1419. dev_err(&ihost->pdev->dev,
  1420. "%s: iport = %p; sci_port_hard_reset call"
  1421. " failed 0x%x\n",
  1422. __func__, iport, status);
  1423. }
  1424. return ret;
  1425. }
  1426. int isci_ata_check_ready(struct domain_device *dev)
  1427. {
  1428. struct isci_port *iport = dev->port->lldd_port;
  1429. struct isci_host *ihost = dev_to_ihost(dev);
  1430. struct isci_remote_device *idev;
  1431. unsigned long flags;
  1432. int rc = 0;
  1433. spin_lock_irqsave(&ihost->scic_lock, flags);
  1434. idev = isci_lookup_device(dev);
  1435. spin_unlock_irqrestore(&ihost->scic_lock, flags);
  1436. if (!idev)
  1437. goto out;
  1438. if (test_bit(IPORT_RESET_PENDING, &iport->state))
  1439. goto out;
  1440. rc = !!iport->active_phy_mask;
  1441. out:
  1442. isci_put_device(idev);
  1443. return rc;
  1444. }
  1445. void isci_port_deformed(struct asd_sas_phy *phy)
  1446. {
  1447. struct isci_host *ihost = phy->ha->lldd_ha;
  1448. struct isci_port *iport = phy->port->lldd_port;
  1449. unsigned long flags;
  1450. int i;
  1451. /* we got a port notification on a port that was subsequently
  1452. * torn down and libsas is just now catching up
  1453. */
  1454. if (!iport)
  1455. return;
  1456. spin_lock_irqsave(&ihost->scic_lock, flags);
  1457. for (i = 0; i < SCI_MAX_PHYS; i++) {
  1458. if (iport->active_phy_mask & 1 << i)
  1459. break;
  1460. }
  1461. spin_unlock_irqrestore(&ihost->scic_lock, flags);
  1462. if (i >= SCI_MAX_PHYS)
  1463. dev_dbg(&ihost->pdev->dev, "%s: port: %ld\n",
  1464. __func__, (long) (iport - &ihost->ports[0]));
  1465. }
  1466. void isci_port_formed(struct asd_sas_phy *phy)
  1467. {
  1468. struct isci_host *ihost = phy->ha->lldd_ha;
  1469. struct isci_phy *iphy = to_iphy(phy);
  1470. struct asd_sas_port *port = phy->port;
  1471. struct isci_port *iport = NULL;
  1472. unsigned long flags;
  1473. int i;
  1474. /* initial ports are formed as the driver is still initializing,
  1475. * wait for that process to complete
  1476. */
  1477. wait_for_start(ihost);
  1478. spin_lock_irqsave(&ihost->scic_lock, flags);
  1479. for (i = 0; i < SCI_MAX_PORTS; i++) {
  1480. iport = &ihost->ports[i];
  1481. if (iport->active_phy_mask & 1 << iphy->phy_index)
  1482. break;
  1483. }
  1484. spin_unlock_irqrestore(&ihost->scic_lock, flags);
  1485. if (i >= SCI_MAX_PORTS)
  1486. iport = NULL;
  1487. port->lldd_port = iport;
  1488. }