hisi_sas.h 13 KB

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  1. /*
  2. * Copyright (c) 2015 Linaro Ltd.
  3. * Copyright (c) 2015 Hisilicon Limited.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. */
  11. #ifndef _HISI_SAS_H_
  12. #define _HISI_SAS_H_
  13. #include <linux/acpi.h>
  14. #include <linux/clk.h>
  15. #include <linux/dmapool.h>
  16. #include <linux/iopoll.h>
  17. #include <linux/lcm.h>
  18. #include <linux/mfd/syscon.h>
  19. #include <linux/module.h>
  20. #include <linux/of_address.h>
  21. #include <linux/pci.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/property.h>
  24. #include <linux/regmap.h>
  25. #include <scsi/sas_ata.h>
  26. #include <scsi/libsas.h>
  27. #define HISI_SAS_MAX_PHYS 9
  28. #define HISI_SAS_MAX_QUEUES 32
  29. #define HISI_SAS_QUEUE_SLOTS 512
  30. #define HISI_SAS_MAX_ITCT_ENTRIES 1024
  31. #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
  32. #define HISI_SAS_RESET_BIT 0
  33. #define HISI_SAS_REJECT_CMD_BIT 1
  34. #define HISI_SAS_RESERVED_IPTT_CNT 96
  35. #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
  36. #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
  37. #define hisi_sas_status_buf_addr(buf) \
  38. (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
  39. #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
  40. #define hisi_sas_status_buf_addr_dma(slot) \
  41. hisi_sas_status_buf_addr(slot->buf_dma)
  42. #define hisi_sas_cmd_hdr_addr(buf) \
  43. (buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
  44. #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
  45. #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)
  46. #define hisi_sas_sge_addr(buf) \
  47. (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
  48. #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
  49. #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)
  50. #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
  51. #define HISI_SAS_MAX_SMP_RESP_SZ 1028
  52. #define HISI_SAS_MAX_STP_RESP_SZ 28
  53. #define DEV_IS_EXPANDER(type) \
  54. ((type == SAS_EDGE_EXPANDER_DEVICE) || \
  55. (type == SAS_FANOUT_EXPANDER_DEVICE))
  56. #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
  57. #define HISI_SAS_SATA_PROTOCOL_PIO 0x2
  58. #define HISI_SAS_SATA_PROTOCOL_DMA 0x4
  59. #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
  60. #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
  61. struct hisi_hba;
  62. enum {
  63. PORT_TYPE_SAS = (1U << 1),
  64. PORT_TYPE_SATA = (1U << 0),
  65. };
  66. enum dev_status {
  67. HISI_SAS_DEV_NORMAL,
  68. HISI_SAS_DEV_EH,
  69. };
  70. enum {
  71. HISI_SAS_INT_ABT_CMD = 0,
  72. HISI_SAS_INT_ABT_DEV = 1,
  73. };
  74. enum hisi_sas_dev_type {
  75. HISI_SAS_DEV_TYPE_STP = 0,
  76. HISI_SAS_DEV_TYPE_SSP,
  77. HISI_SAS_DEV_TYPE_SATA,
  78. };
  79. struct hisi_sas_hw_error {
  80. u32 irq_msk;
  81. u32 msk;
  82. int shift;
  83. const char *msg;
  84. int reg;
  85. const struct hisi_sas_hw_error *sub;
  86. };
  87. struct hisi_sas_rst {
  88. struct hisi_hba *hisi_hba;
  89. struct completion *completion;
  90. struct work_struct work;
  91. bool done;
  92. };
  93. #define HISI_SAS_RST_WORK_INIT(r, c) \
  94. { .hisi_hba = hisi_hba, \
  95. .completion = &c, \
  96. .work = __WORK_INITIALIZER(r.work, \
  97. hisi_sas_sync_rst_work_handler), \
  98. .done = false, \
  99. }
  100. #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \
  101. DECLARE_COMPLETION_ONSTACK(c); \
  102. DECLARE_WORK(w, hisi_sas_sync_rst_work_handler); \
  103. struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c)
  104. enum hisi_sas_bit_err_type {
  105. HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0,
  106. HISI_SAS_ERR_MULTI_BIT_ECC = 0x1,
  107. };
  108. enum hisi_sas_phy_event {
  109. HISI_PHYE_PHY_UP = 0U,
  110. HISI_PHYE_LINK_RESET,
  111. HISI_PHYES_NUM,
  112. };
  113. struct hisi_sas_phy {
  114. struct work_struct works[HISI_PHYES_NUM];
  115. struct hisi_hba *hisi_hba;
  116. struct hisi_sas_port *port;
  117. struct asd_sas_phy sas_phy;
  118. struct sas_identify identify;
  119. struct completion *reset_completion;
  120. spinlock_t lock;
  121. u64 port_id; /* from hw */
  122. u64 frame_rcvd_size;
  123. u8 frame_rcvd[32];
  124. u8 phy_attached;
  125. u8 in_reset;
  126. u8 reserved[2];
  127. u32 phy_type;
  128. enum sas_linkrate minimum_linkrate;
  129. enum sas_linkrate maximum_linkrate;
  130. };
  131. struct hisi_sas_port {
  132. struct asd_sas_port sas_port;
  133. u8 port_attached;
  134. u8 id; /* from hw */
  135. };
  136. struct hisi_sas_cq {
  137. struct hisi_hba *hisi_hba;
  138. struct tasklet_struct tasklet;
  139. int rd_point;
  140. int id;
  141. };
  142. struct hisi_sas_dq {
  143. struct hisi_hba *hisi_hba;
  144. struct list_head list;
  145. spinlock_t lock;
  146. int wr_point;
  147. int id;
  148. };
  149. struct hisi_sas_device {
  150. struct hisi_hba *hisi_hba;
  151. struct domain_device *sas_device;
  152. struct completion *completion;
  153. struct hisi_sas_dq *dq;
  154. struct list_head list;
  155. enum sas_device_type dev_type;
  156. int device_id;
  157. int sata_idx;
  158. u8 dev_status;
  159. };
  160. struct hisi_sas_tmf_task {
  161. int force_phy;
  162. int phy_id;
  163. u8 tmf;
  164. u16 tag_of_task_to_be_managed;
  165. };
  166. struct hisi_sas_slot {
  167. struct list_head entry;
  168. struct list_head delivery;
  169. struct sas_task *task;
  170. struct hisi_sas_port *port;
  171. u64 n_elem;
  172. int dlvry_queue;
  173. int dlvry_queue_slot;
  174. int cmplt_queue;
  175. int cmplt_queue_slot;
  176. int abort;
  177. int ready;
  178. void *cmd_hdr;
  179. dma_addr_t cmd_hdr_dma;
  180. struct timer_list internal_abort_timer;
  181. bool is_internal;
  182. struct hisi_sas_tmf_task *tmf;
  183. /* Do not reorder/change members after here */
  184. void *buf;
  185. dma_addr_t buf_dma;
  186. u16 idx;
  187. };
  188. struct hisi_sas_hw {
  189. int (*hw_init)(struct hisi_hba *hisi_hba);
  190. void (*setup_itct)(struct hisi_hba *hisi_hba,
  191. struct hisi_sas_device *device);
  192. int (*slot_index_alloc)(struct hisi_hba *hisi_hba,
  193. struct domain_device *device);
  194. struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
  195. void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no);
  196. int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
  197. void (*start_delivery)(struct hisi_sas_dq *dq);
  198. void (*prep_ssp)(struct hisi_hba *hisi_hba,
  199. struct hisi_sas_slot *slot);
  200. void (*prep_smp)(struct hisi_hba *hisi_hba,
  201. struct hisi_sas_slot *slot);
  202. void (*prep_stp)(struct hisi_hba *hisi_hba,
  203. struct hisi_sas_slot *slot);
  204. void (*prep_abort)(struct hisi_hba *hisi_hba,
  205. struct hisi_sas_slot *slot,
  206. int device_id, int abort_flag, int tag_to_abort);
  207. int (*slot_complete)(struct hisi_hba *hisi_hba,
  208. struct hisi_sas_slot *slot);
  209. void (*phys_init)(struct hisi_hba *hisi_hba);
  210. void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no);
  211. void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
  212. void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
  213. void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
  214. void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
  215. struct sas_phy_linkrates *linkrates);
  216. enum sas_linkrate (*phy_get_max_linkrate)(void);
  217. void (*clear_itct)(struct hisi_hba *hisi_hba,
  218. struct hisi_sas_device *dev);
  219. void (*free_device)(struct hisi_sas_device *sas_dev);
  220. int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
  221. void (*dereg_device)(struct hisi_hba *hisi_hba,
  222. struct domain_device *device);
  223. int (*soft_reset)(struct hisi_hba *hisi_hba);
  224. u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
  225. int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type,
  226. u8 reg_index, u8 reg_count, u8 *write_data);
  227. void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba,
  228. int delay_ms, int timeout_ms);
  229. int max_command_entries;
  230. int complete_hdr_size;
  231. struct scsi_host_template *sht;
  232. };
  233. struct hisi_hba {
  234. /* This must be the first element, used by SHOST_TO_SAS_HA */
  235. struct sas_ha_struct *p;
  236. struct platform_device *platform_dev;
  237. struct pci_dev *pci_dev;
  238. struct device *dev;
  239. void __iomem *regs;
  240. void __iomem *sgpio_regs;
  241. struct regmap *ctrl;
  242. u32 ctrl_reset_reg;
  243. u32 ctrl_reset_sts_reg;
  244. u32 ctrl_clock_ena_reg;
  245. u32 refclk_frequency_mhz;
  246. u8 sas_addr[SAS_ADDR_SIZE];
  247. int n_phy;
  248. spinlock_t lock;
  249. struct semaphore sem;
  250. struct timer_list timer;
  251. struct workqueue_struct *wq;
  252. int slot_index_count;
  253. int last_slot_index;
  254. int last_dev_id;
  255. unsigned long *slot_index_tags;
  256. unsigned long reject_stp_links_msk;
  257. /* SCSI/SAS glue */
  258. struct sas_ha_struct sha;
  259. struct Scsi_Host *shost;
  260. struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
  261. struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
  262. struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
  263. struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
  264. int queue_count;
  265. struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
  266. struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
  267. dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
  268. void *complete_hdr[HISI_SAS_MAX_QUEUES];
  269. dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
  270. struct hisi_sas_initial_fis *initial_fis;
  271. dma_addr_t initial_fis_dma;
  272. struct hisi_sas_itct *itct;
  273. dma_addr_t itct_dma;
  274. struct hisi_sas_iost *iost;
  275. dma_addr_t iost_dma;
  276. struct hisi_sas_breakpoint *breakpoint;
  277. dma_addr_t breakpoint_dma;
  278. struct hisi_sas_breakpoint *sata_breakpoint;
  279. dma_addr_t sata_breakpoint_dma;
  280. struct hisi_sas_slot *slot_info;
  281. unsigned long flags;
  282. const struct hisi_sas_hw *hw; /* Low level hw interface */
  283. unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
  284. struct work_struct rst_work;
  285. u32 phy_state;
  286. u32 intr_coal_ticks; /* Time of interrupt coalesce in us */
  287. u32 intr_coal_count; /* Interrupt count to coalesce */
  288. };
  289. /* Generic HW DMA host memory structures */
  290. /* Delivery queue header */
  291. struct hisi_sas_cmd_hdr {
  292. /* dw0 */
  293. __le32 dw0;
  294. /* dw1 */
  295. __le32 dw1;
  296. /* dw2 */
  297. __le32 dw2;
  298. /* dw3 */
  299. __le32 transfer_tags;
  300. /* dw4 */
  301. __le32 data_transfer_len;
  302. /* dw5 */
  303. __le32 first_burst_num;
  304. /* dw6 */
  305. __le32 sg_len;
  306. /* dw7 */
  307. __le32 dw7;
  308. /* dw8-9 */
  309. __le64 cmd_table_addr;
  310. /* dw10-11 */
  311. __le64 sts_buffer_addr;
  312. /* dw12-13 */
  313. __le64 prd_table_addr;
  314. /* dw14-15 */
  315. __le64 dif_prd_table_addr;
  316. };
  317. struct hisi_sas_itct {
  318. __le64 qw0;
  319. __le64 sas_addr;
  320. __le64 qw2;
  321. __le64 qw3;
  322. __le64 qw4_15[12];
  323. };
  324. struct hisi_sas_iost {
  325. __le64 qw0;
  326. __le64 qw1;
  327. __le64 qw2;
  328. __le64 qw3;
  329. };
  330. struct hisi_sas_err_record {
  331. u32 data[4];
  332. };
  333. struct hisi_sas_initial_fis {
  334. struct hisi_sas_err_record err_record;
  335. struct dev_to_host_fis fis;
  336. u32 rsvd[3];
  337. };
  338. struct hisi_sas_breakpoint {
  339. u8 data[128];
  340. };
  341. struct hisi_sas_sata_breakpoint {
  342. struct hisi_sas_breakpoint tag[32];
  343. };
  344. struct hisi_sas_sge {
  345. __le64 addr;
  346. __le32 page_ctrl_0;
  347. __le32 page_ctrl_1;
  348. __le32 data_len;
  349. __le32 data_off;
  350. };
  351. struct hisi_sas_command_table_smp {
  352. u8 bytes[44];
  353. };
  354. struct hisi_sas_command_table_stp {
  355. struct host_to_dev_fis command_fis;
  356. u8 dummy[12];
  357. u8 atapi_cdb[ATAPI_CDB_LEN];
  358. };
  359. #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
  360. struct hisi_sas_sge_page {
  361. struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
  362. } __aligned(16);
  363. struct hisi_sas_command_table_ssp {
  364. struct ssp_frame_hdr hdr;
  365. union {
  366. struct {
  367. struct ssp_command_iu task;
  368. u32 prot[7];
  369. };
  370. struct ssp_tmf_iu ssp_task;
  371. struct xfer_rdy_iu xfer_rdy;
  372. struct ssp_response_iu ssp_res;
  373. } u;
  374. };
  375. union hisi_sas_command_table {
  376. struct hisi_sas_command_table_ssp ssp;
  377. struct hisi_sas_command_table_smp smp;
  378. struct hisi_sas_command_table_stp stp;
  379. } __aligned(16);
  380. struct hisi_sas_status_buffer {
  381. struct hisi_sas_err_record err;
  382. u8 iu[1024];
  383. } __aligned(16);
  384. struct hisi_sas_slot_buf_table {
  385. struct hisi_sas_status_buffer status_buffer;
  386. union hisi_sas_command_table command_header;
  387. struct hisi_sas_sge_page sge_page;
  388. };
  389. extern struct scsi_transport_template *hisi_sas_stt;
  390. extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
  391. extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost);
  392. extern void hisi_sas_free(struct hisi_hba *hisi_hba);
  393. extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis,
  394. int direction);
  395. extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
  396. extern void hisi_sas_sata_done(struct sas_task *task,
  397. struct hisi_sas_slot *slot);
  398. extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag);
  399. extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
  400. extern int hisi_sas_probe(struct platform_device *pdev,
  401. const struct hisi_sas_hw *ops);
  402. extern int hisi_sas_remove(struct platform_device *pdev);
  403. extern int hisi_sas_slave_configure(struct scsi_device *sdev);
  404. extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time);
  405. extern void hisi_sas_scan_start(struct Scsi_Host *shost);
  406. extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type);
  407. extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
  408. extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
  409. struct sas_task *task,
  410. struct hisi_sas_slot *slot);
  411. extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
  412. extern void hisi_sas_rst_work_handler(struct work_struct *work);
  413. extern void hisi_sas_sync_rst_work_handler(struct work_struct *work);
  414. extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba);
  415. extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
  416. enum hisi_sas_phy_event event);
  417. extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
  418. extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max);
  419. extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba);
  420. extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba);
  421. #endif