rtc-hym8563.c 14 KB

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  1. /*
  2. * Haoyu HYM8563 RTC driver
  3. *
  4. * Copyright (C) 2013 MundoReader S.L.
  5. * Author: Heiko Stuebner <heiko@sntech.de>
  6. *
  7. * based on rtc-HYM8563
  8. * Copyright (C) 2010 ROCKCHIP, Inc.
  9. *
  10. * This software is licensed under the terms of the GNU General Public
  11. * License version 2, as published by the Free Software Foundation, and
  12. * may be copied, distributed, and modified under those terms.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/clk-provider.h>
  21. #include <linux/i2c.h>
  22. #include <linux/bcd.h>
  23. #include <linux/rtc.h>
  24. #define HYM8563_CTL1 0x00
  25. #define HYM8563_CTL1_TEST BIT(7)
  26. #define HYM8563_CTL1_STOP BIT(5)
  27. #define HYM8563_CTL1_TESTC BIT(3)
  28. #define HYM8563_CTL2 0x01
  29. #define HYM8563_CTL2_TI_TP BIT(4)
  30. #define HYM8563_CTL2_AF BIT(3)
  31. #define HYM8563_CTL2_TF BIT(2)
  32. #define HYM8563_CTL2_AIE BIT(1)
  33. #define HYM8563_CTL2_TIE BIT(0)
  34. #define HYM8563_SEC 0x02
  35. #define HYM8563_SEC_VL BIT(7)
  36. #define HYM8563_SEC_MASK 0x7f
  37. #define HYM8563_MIN 0x03
  38. #define HYM8563_MIN_MASK 0x7f
  39. #define HYM8563_HOUR 0x04
  40. #define HYM8563_HOUR_MASK 0x3f
  41. #define HYM8563_DAY 0x05
  42. #define HYM8563_DAY_MASK 0x3f
  43. #define HYM8563_WEEKDAY 0x06
  44. #define HYM8563_WEEKDAY_MASK 0x07
  45. #define HYM8563_MONTH 0x07
  46. #define HYM8563_MONTH_CENTURY BIT(7)
  47. #define HYM8563_MONTH_MASK 0x1f
  48. #define HYM8563_YEAR 0x08
  49. #define HYM8563_ALM_MIN 0x09
  50. #define HYM8563_ALM_HOUR 0x0a
  51. #define HYM8563_ALM_DAY 0x0b
  52. #define HYM8563_ALM_WEEK 0x0c
  53. /* Each alarm check can be disabled by setting this bit in the register */
  54. #define HYM8563_ALM_BIT_DISABLE BIT(7)
  55. #define HYM8563_CLKOUT 0x0d
  56. #define HYM8563_CLKOUT_ENABLE BIT(7)
  57. #define HYM8563_CLKOUT_32768 0
  58. #define HYM8563_CLKOUT_1024 1
  59. #define HYM8563_CLKOUT_32 2
  60. #define HYM8563_CLKOUT_1 3
  61. #define HYM8563_CLKOUT_MASK 3
  62. #define HYM8563_TMR_CTL 0x0e
  63. #define HYM8563_TMR_CTL_ENABLE BIT(7)
  64. #define HYM8563_TMR_CTL_4096 0
  65. #define HYM8563_TMR_CTL_64 1
  66. #define HYM8563_TMR_CTL_1 2
  67. #define HYM8563_TMR_CTL_1_60 3
  68. #define HYM8563_TMR_CTL_MASK 3
  69. #define HYM8563_TMR_CNT 0x0f
  70. struct hym8563 {
  71. struct i2c_client *client;
  72. struct rtc_device *rtc;
  73. bool valid;
  74. #ifdef CONFIG_COMMON_CLK
  75. struct clk_hw clkout_hw;
  76. #endif
  77. };
  78. /*
  79. * RTC handling
  80. */
  81. static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
  82. {
  83. struct i2c_client *client = to_i2c_client(dev);
  84. struct hym8563 *hym8563 = i2c_get_clientdata(client);
  85. u8 buf[7];
  86. int ret;
  87. if (!hym8563->valid) {
  88. dev_warn(&client->dev, "no valid clock/calendar values available\n");
  89. return -EINVAL;
  90. }
  91. ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
  92. tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
  93. tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
  94. tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
  95. tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
  96. tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
  97. tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
  98. tm->tm_year = bcd2bin(buf[6]) + 100;
  99. return 0;
  100. }
  101. static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
  102. {
  103. struct i2c_client *client = to_i2c_client(dev);
  104. struct hym8563 *hym8563 = i2c_get_clientdata(client);
  105. u8 buf[7];
  106. int ret;
  107. /* Years >= 2100 are to far in the future, 19XX is to early */
  108. if (tm->tm_year < 100 || tm->tm_year >= 200)
  109. return -EINVAL;
  110. buf[0] = bin2bcd(tm->tm_sec);
  111. buf[1] = bin2bcd(tm->tm_min);
  112. buf[2] = bin2bcd(tm->tm_hour);
  113. buf[3] = bin2bcd(tm->tm_mday);
  114. buf[4] = bin2bcd(tm->tm_wday);
  115. buf[5] = bin2bcd(tm->tm_mon + 1);
  116. /*
  117. * While the HYM8563 has a century flag in the month register,
  118. * it does not seem to carry it over a subsequent write/read.
  119. * So we'll limit ourself to 100 years, starting at 2000 for now.
  120. */
  121. buf[6] = bin2bcd(tm->tm_year - 100);
  122. /*
  123. * CTL1 only contains TEST-mode bits apart from stop,
  124. * so no need to read the value first
  125. */
  126. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
  127. HYM8563_CTL1_STOP);
  128. if (ret < 0)
  129. return ret;
  130. ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
  131. if (ret < 0)
  132. return ret;
  133. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
  134. if (ret < 0)
  135. return ret;
  136. hym8563->valid = true;
  137. return 0;
  138. }
  139. static int hym8563_rtc_alarm_irq_enable(struct device *dev,
  140. unsigned int enabled)
  141. {
  142. struct i2c_client *client = to_i2c_client(dev);
  143. int data;
  144. data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  145. if (data < 0)
  146. return data;
  147. if (enabled)
  148. data |= HYM8563_CTL2_AIE;
  149. else
  150. data &= ~HYM8563_CTL2_AIE;
  151. return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
  152. };
  153. static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  154. {
  155. struct i2c_client *client = to_i2c_client(dev);
  156. struct rtc_time *alm_tm = &alm->time;
  157. u8 buf[4];
  158. int ret;
  159. ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
  160. if (ret < 0)
  161. return ret;
  162. /* The alarm only has a minute accuracy */
  163. alm_tm->tm_sec = 0;
  164. alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
  165. -1 :
  166. bcd2bin(buf[0] & HYM8563_MIN_MASK);
  167. alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
  168. -1 :
  169. bcd2bin(buf[1] & HYM8563_HOUR_MASK);
  170. alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
  171. -1 :
  172. bcd2bin(buf[2] & HYM8563_DAY_MASK);
  173. alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
  174. -1 :
  175. bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
  176. ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  177. if (ret < 0)
  178. return ret;
  179. if (ret & HYM8563_CTL2_AIE)
  180. alm->enabled = 1;
  181. return 0;
  182. }
  183. static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  184. {
  185. struct i2c_client *client = to_i2c_client(dev);
  186. struct rtc_time *alm_tm = &alm->time;
  187. u8 buf[4];
  188. int ret;
  189. /*
  190. * The alarm has no seconds so deal with it
  191. */
  192. if (alm_tm->tm_sec) {
  193. alm_tm->tm_sec = 0;
  194. alm_tm->tm_min++;
  195. if (alm_tm->tm_min >= 60) {
  196. alm_tm->tm_min = 0;
  197. alm_tm->tm_hour++;
  198. if (alm_tm->tm_hour >= 24) {
  199. alm_tm->tm_hour = 0;
  200. alm_tm->tm_mday++;
  201. if (alm_tm->tm_mday > 31)
  202. alm_tm->tm_mday = 0;
  203. }
  204. }
  205. }
  206. ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  207. if (ret < 0)
  208. return ret;
  209. ret &= ~HYM8563_CTL2_AIE;
  210. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
  211. if (ret < 0)
  212. return ret;
  213. buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
  214. bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
  215. buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
  216. bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
  217. buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
  218. bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
  219. buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
  220. bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
  221. ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
  222. if (ret < 0)
  223. return ret;
  224. return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
  225. }
  226. static const struct rtc_class_ops hym8563_rtc_ops = {
  227. .read_time = hym8563_rtc_read_time,
  228. .set_time = hym8563_rtc_set_time,
  229. .alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
  230. .read_alarm = hym8563_rtc_read_alarm,
  231. .set_alarm = hym8563_rtc_set_alarm,
  232. };
  233. /*
  234. * Handling of the clkout
  235. */
  236. #ifdef CONFIG_COMMON_CLK
  237. #define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
  238. static int clkout_rates[] = {
  239. 32768,
  240. 1024,
  241. 32,
  242. 1,
  243. };
  244. static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
  245. unsigned long parent_rate)
  246. {
  247. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  248. struct i2c_client *client = hym8563->client;
  249. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  250. if (ret < 0)
  251. return 0;
  252. ret &= HYM8563_CLKOUT_MASK;
  253. return clkout_rates[ret];
  254. }
  255. static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
  256. unsigned long *prate)
  257. {
  258. int i;
  259. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  260. if (clkout_rates[i] <= rate)
  261. return clkout_rates[i];
  262. return 0;
  263. }
  264. static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
  265. unsigned long parent_rate)
  266. {
  267. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  268. struct i2c_client *client = hym8563->client;
  269. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  270. int i;
  271. if (ret < 0)
  272. return ret;
  273. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  274. if (clkout_rates[i] == rate) {
  275. ret &= ~HYM8563_CLKOUT_MASK;
  276. ret |= i;
  277. return i2c_smbus_write_byte_data(client,
  278. HYM8563_CLKOUT, ret);
  279. }
  280. return -EINVAL;
  281. }
  282. static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
  283. {
  284. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  285. struct i2c_client *client = hym8563->client;
  286. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  287. if (ret < 0)
  288. return ret;
  289. if (enable)
  290. ret |= HYM8563_CLKOUT_ENABLE;
  291. else
  292. ret &= ~HYM8563_CLKOUT_ENABLE;
  293. return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
  294. }
  295. static int hym8563_clkout_prepare(struct clk_hw *hw)
  296. {
  297. return hym8563_clkout_control(hw, 1);
  298. }
  299. static void hym8563_clkout_unprepare(struct clk_hw *hw)
  300. {
  301. hym8563_clkout_control(hw, 0);
  302. }
  303. static int hym8563_clkout_is_prepared(struct clk_hw *hw)
  304. {
  305. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  306. struct i2c_client *client = hym8563->client;
  307. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  308. if (ret < 0)
  309. return ret;
  310. return !!(ret & HYM8563_CLKOUT_ENABLE);
  311. }
  312. static const struct clk_ops hym8563_clkout_ops = {
  313. .prepare = hym8563_clkout_prepare,
  314. .unprepare = hym8563_clkout_unprepare,
  315. .is_prepared = hym8563_clkout_is_prepared,
  316. .recalc_rate = hym8563_clkout_recalc_rate,
  317. .round_rate = hym8563_clkout_round_rate,
  318. .set_rate = hym8563_clkout_set_rate,
  319. };
  320. static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
  321. {
  322. struct i2c_client *client = hym8563->client;
  323. struct device_node *node = client->dev.of_node;
  324. struct clk *clk;
  325. struct clk_init_data init;
  326. int ret;
  327. ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
  328. 0);
  329. if (ret < 0)
  330. return ERR_PTR(ret);
  331. init.name = "hym8563-clkout";
  332. init.ops = &hym8563_clkout_ops;
  333. init.flags = 0;
  334. init.parent_names = NULL;
  335. init.num_parents = 0;
  336. hym8563->clkout_hw.init = &init;
  337. /* optional override of the clockname */
  338. of_property_read_string(node, "clock-output-names", &init.name);
  339. /* register the clock */
  340. clk = clk_register(&client->dev, &hym8563->clkout_hw);
  341. if (!IS_ERR(clk))
  342. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  343. return clk;
  344. }
  345. #endif
  346. /*
  347. * The alarm interrupt is implemented as a level-low interrupt in the
  348. * hym8563, while the timer interrupt uses a falling edge.
  349. * We don't use the timer at all, so the interrupt is requested to
  350. * use the level-low trigger.
  351. */
  352. static irqreturn_t hym8563_irq(int irq, void *dev_id)
  353. {
  354. struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
  355. struct i2c_client *client = hym8563->client;
  356. struct mutex *lock = &hym8563->rtc->ops_lock;
  357. int data, ret;
  358. mutex_lock(lock);
  359. /* Clear the alarm flag */
  360. data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  361. if (data < 0) {
  362. dev_err(&client->dev, "%s: error reading i2c data %d\n",
  363. __func__, data);
  364. goto out;
  365. }
  366. data &= ~HYM8563_CTL2_AF;
  367. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
  368. if (ret < 0) {
  369. dev_err(&client->dev, "%s: error writing i2c data %d\n",
  370. __func__, ret);
  371. }
  372. out:
  373. mutex_unlock(lock);
  374. return IRQ_HANDLED;
  375. }
  376. static int hym8563_init_device(struct i2c_client *client)
  377. {
  378. int ret;
  379. /* Clear stop flag if present */
  380. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
  381. if (ret < 0)
  382. return ret;
  383. ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  384. if (ret < 0)
  385. return ret;
  386. /* Disable alarm and timer interrupts */
  387. ret &= ~HYM8563_CTL2_AIE;
  388. ret &= ~HYM8563_CTL2_TIE;
  389. /* Clear any pending alarm and timer flags */
  390. if (ret & HYM8563_CTL2_AF)
  391. ret &= ~HYM8563_CTL2_AF;
  392. if (ret & HYM8563_CTL2_TF)
  393. ret &= ~HYM8563_CTL2_TF;
  394. ret &= ~HYM8563_CTL2_TI_TP;
  395. return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
  396. }
  397. #ifdef CONFIG_PM_SLEEP
  398. static int hym8563_suspend(struct device *dev)
  399. {
  400. struct i2c_client *client = to_i2c_client(dev);
  401. int ret;
  402. if (device_may_wakeup(dev)) {
  403. ret = enable_irq_wake(client->irq);
  404. if (ret) {
  405. dev_err(dev, "enable_irq_wake failed, %d\n", ret);
  406. return ret;
  407. }
  408. }
  409. return 0;
  410. }
  411. static int hym8563_resume(struct device *dev)
  412. {
  413. struct i2c_client *client = to_i2c_client(dev);
  414. if (device_may_wakeup(dev))
  415. disable_irq_wake(client->irq);
  416. return 0;
  417. }
  418. #endif
  419. static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
  420. static int hym8563_probe(struct i2c_client *client,
  421. const struct i2c_device_id *id)
  422. {
  423. struct hym8563 *hym8563;
  424. int ret;
  425. hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
  426. if (!hym8563)
  427. return -ENOMEM;
  428. hym8563->client = client;
  429. i2c_set_clientdata(client, hym8563);
  430. device_set_wakeup_capable(&client->dev, true);
  431. ret = hym8563_init_device(client);
  432. if (ret) {
  433. dev_err(&client->dev, "could not init device, %d\n", ret);
  434. return ret;
  435. }
  436. if (client->irq > 0) {
  437. ret = devm_request_threaded_irq(&client->dev, client->irq,
  438. NULL, hym8563_irq,
  439. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  440. client->name, hym8563);
  441. if (ret < 0) {
  442. dev_err(&client->dev, "irq %d request failed, %d\n",
  443. client->irq, ret);
  444. return ret;
  445. }
  446. }
  447. /* check state of calendar information */
  448. ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
  449. if (ret < 0)
  450. return ret;
  451. hym8563->valid = !(ret & HYM8563_SEC_VL);
  452. dev_dbg(&client->dev, "rtc information is %s\n",
  453. hym8563->valid ? "valid" : "invalid");
  454. hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
  455. &hym8563_rtc_ops, THIS_MODULE);
  456. if (IS_ERR(hym8563->rtc))
  457. return PTR_ERR(hym8563->rtc);
  458. /* the hym8563 alarm only supports a minute accuracy */
  459. hym8563->rtc->uie_unsupported = 1;
  460. #ifdef CONFIG_COMMON_CLK
  461. hym8563_clkout_register_clk(hym8563);
  462. #endif
  463. return 0;
  464. }
  465. static const struct i2c_device_id hym8563_id[] = {
  466. { "hym8563", 0 },
  467. {},
  468. };
  469. MODULE_DEVICE_TABLE(i2c, hym8563_id);
  470. static const struct of_device_id hym8563_dt_idtable[] = {
  471. { .compatible = "haoyu,hym8563" },
  472. {},
  473. };
  474. MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
  475. static struct i2c_driver hym8563_driver = {
  476. .driver = {
  477. .name = "rtc-hym8563",
  478. .pm = &hym8563_pm_ops,
  479. .of_match_table = hym8563_dt_idtable,
  480. },
  481. .probe = hym8563_probe,
  482. .id_table = hym8563_id,
  483. };
  484. module_i2c_driver(hym8563_driver);
  485. MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
  486. MODULE_DESCRIPTION("HYM8563 RTC driver");
  487. MODULE_LICENSE("GPL");