cros_ec_lpc.c 12 KB

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  1. /*
  2. * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller
  3. *
  4. * Copyright (C) 2012-2015 Google, Inc
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * This driver uses the Chrome OS EC byte-level message-based protocol for
  16. * communicating the keyboard state (which keys are pressed) from a keyboard EC
  17. * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
  18. * but everything else (including deghosting) is done here. The main
  19. * motivation for this is to keep the EC firmware as simple as possible, since
  20. * it cannot be easily upgraded and EC flash/IRAM space is relatively
  21. * expensive.
  22. */
  23. #include <linux/acpi.h>
  24. #include <linux/dmi.h>
  25. #include <linux/delay.h>
  26. #include <linux/io.h>
  27. #include <linux/mfd/cros_ec.h>
  28. #include <linux/mfd/cros_ec_commands.h>
  29. #include <linux/mfd/cros_ec_lpc_reg.h>
  30. #include <linux/module.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/printk.h>
  33. #include <linux/suspend.h>
  34. #define DRV_NAME "cros_ec_lpcs"
  35. #define ACPI_DRV_NAME "GOOG0004"
  36. /* True if ACPI device is present */
  37. static bool cros_ec_lpc_acpi_device_found;
  38. static int ec_response_timed_out(void)
  39. {
  40. unsigned long one_second = jiffies + HZ;
  41. u8 data;
  42. usleep_range(200, 300);
  43. do {
  44. if (!(cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_CMD, 1, &data) &
  45. EC_LPC_STATUS_BUSY_MASK))
  46. return 0;
  47. usleep_range(100, 200);
  48. } while (time_before(jiffies, one_second));
  49. return 1;
  50. }
  51. static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
  52. struct cros_ec_command *msg)
  53. {
  54. struct ec_host_response response;
  55. u8 sum;
  56. int ret = 0;
  57. u8 *dout;
  58. ret = cros_ec_prepare_tx(ec, msg);
  59. /* Write buffer */
  60. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
  61. /* Here we go */
  62. sum = EC_COMMAND_PROTOCOL_3;
  63. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
  64. if (ec_response_timed_out()) {
  65. dev_warn(ec->dev, "EC responsed timed out\n");
  66. ret = -EIO;
  67. goto done;
  68. }
  69. /* Check result */
  70. msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
  71. ret = cros_ec_check_result(ec, msg);
  72. if (ret)
  73. goto done;
  74. /* Read back response */
  75. dout = (u8 *)&response;
  76. sum = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
  77. dout);
  78. msg->result = response.result;
  79. if (response.data_len > msg->insize) {
  80. dev_err(ec->dev,
  81. "packet too long (%d bytes, expected %d)",
  82. response.data_len, msg->insize);
  83. ret = -EMSGSIZE;
  84. goto done;
  85. }
  86. /* Read response and process checksum */
  87. sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET +
  88. sizeof(response), response.data_len,
  89. msg->data);
  90. if (sum) {
  91. dev_err(ec->dev,
  92. "bad packet checksum %02x\n",
  93. response.checksum);
  94. ret = -EBADMSG;
  95. goto done;
  96. }
  97. /* Return actual amount of data received */
  98. ret = response.data_len;
  99. done:
  100. return ret;
  101. }
  102. static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
  103. struct cros_ec_command *msg)
  104. {
  105. struct ec_lpc_host_args args;
  106. u8 sum;
  107. int ret = 0;
  108. if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
  109. msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
  110. dev_err(ec->dev,
  111. "invalid buffer sizes (out %d, in %d)\n",
  112. msg->outsize, msg->insize);
  113. return -EINVAL;
  114. }
  115. /* Now actually send the command to the EC and get the result */
  116. args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
  117. args.command_version = msg->version;
  118. args.data_size = msg->outsize;
  119. /* Initialize checksum */
  120. sum = msg->command + args.flags + args.command_version + args.data_size;
  121. /* Copy data and update checksum */
  122. sum += cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
  123. msg->data);
  124. /* Finalize checksum and write args */
  125. args.checksum = sum;
  126. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
  127. (u8 *)&args);
  128. /* Here we go */
  129. sum = msg->command;
  130. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
  131. if (ec_response_timed_out()) {
  132. dev_warn(ec->dev, "EC responsed timed out\n");
  133. ret = -EIO;
  134. goto done;
  135. }
  136. /* Check result */
  137. msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
  138. ret = cros_ec_check_result(ec, msg);
  139. if (ret)
  140. goto done;
  141. /* Read back args */
  142. cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
  143. (u8 *)&args);
  144. if (args.data_size > msg->insize) {
  145. dev_err(ec->dev,
  146. "packet too long (%d bytes, expected %d)",
  147. args.data_size, msg->insize);
  148. ret = -ENOSPC;
  149. goto done;
  150. }
  151. /* Start calculating response checksum */
  152. sum = msg->command + args.flags + args.command_version + args.data_size;
  153. /* Read response and update checksum */
  154. sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PARAM, args.data_size,
  155. msg->data);
  156. /* Verify checksum */
  157. if (args.checksum != sum) {
  158. dev_err(ec->dev,
  159. "bad packet checksum, expected %02x, got %02x\n",
  160. args.checksum, sum);
  161. ret = -EBADMSG;
  162. goto done;
  163. }
  164. /* Return actual amount of data received */
  165. ret = args.data_size;
  166. done:
  167. return ret;
  168. }
  169. /* Returns num bytes read, or negative on error. Doesn't need locking. */
  170. static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
  171. unsigned int bytes, void *dest)
  172. {
  173. int i = offset;
  174. char *s = dest;
  175. int cnt = 0;
  176. if (offset >= EC_MEMMAP_SIZE - bytes)
  177. return -EINVAL;
  178. /* fixed length */
  179. if (bytes) {
  180. cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
  181. return bytes;
  182. }
  183. /* string */
  184. for (; i < EC_MEMMAP_SIZE; i++, s++) {
  185. cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + i, 1, s);
  186. cnt++;
  187. if (!*s)
  188. break;
  189. }
  190. return cnt;
  191. }
  192. static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
  193. {
  194. struct cros_ec_device *ec_dev = data;
  195. if (ec_dev->mkbp_event_supported &&
  196. cros_ec_get_next_event(ec_dev, NULL) > 0)
  197. blocking_notifier_call_chain(&ec_dev->event_notifier, 0,
  198. ec_dev);
  199. if (value == ACPI_NOTIFY_DEVICE_WAKE)
  200. pm_system_wakeup();
  201. }
  202. static int cros_ec_lpc_probe(struct platform_device *pdev)
  203. {
  204. struct device *dev = &pdev->dev;
  205. struct acpi_device *adev;
  206. acpi_status status;
  207. struct cros_ec_device *ec_dev;
  208. u8 buf[2];
  209. int ret;
  210. if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
  211. dev_name(dev))) {
  212. dev_err(dev, "couldn't reserve memmap region\n");
  213. return -EBUSY;
  214. }
  215. cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
  216. if (buf[0] != 'E' || buf[1] != 'C') {
  217. dev_err(dev, "EC ID not detected\n");
  218. return -ENODEV;
  219. }
  220. if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
  221. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  222. dev_err(dev, "couldn't reserve region0\n");
  223. return -EBUSY;
  224. }
  225. if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
  226. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  227. dev_err(dev, "couldn't reserve region1\n");
  228. return -EBUSY;
  229. }
  230. ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
  231. if (!ec_dev)
  232. return -ENOMEM;
  233. platform_set_drvdata(pdev, ec_dev);
  234. ec_dev->dev = dev;
  235. ec_dev->phys_name = dev_name(dev);
  236. ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
  237. ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
  238. ec_dev->cmd_readmem = cros_ec_lpc_readmem;
  239. ec_dev->din_size = sizeof(struct ec_host_response) +
  240. sizeof(struct ec_response_get_protocol_info);
  241. ec_dev->dout_size = sizeof(struct ec_host_request);
  242. ret = cros_ec_register(ec_dev);
  243. if (ret) {
  244. dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
  245. return ret;
  246. }
  247. /*
  248. * Connect a notify handler to process MKBP messages if we have a
  249. * companion ACPI device.
  250. */
  251. adev = ACPI_COMPANION(dev);
  252. if (adev) {
  253. status = acpi_install_notify_handler(adev->handle,
  254. ACPI_ALL_NOTIFY,
  255. cros_ec_lpc_acpi_notify,
  256. ec_dev);
  257. if (ACPI_FAILURE(status))
  258. dev_warn(dev, "Failed to register notifier %08x\n",
  259. status);
  260. }
  261. return 0;
  262. }
  263. static int cros_ec_lpc_remove(struct platform_device *pdev)
  264. {
  265. struct cros_ec_device *ec_dev;
  266. struct acpi_device *adev;
  267. adev = ACPI_COMPANION(&pdev->dev);
  268. if (adev)
  269. acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
  270. cros_ec_lpc_acpi_notify);
  271. ec_dev = platform_get_drvdata(pdev);
  272. cros_ec_remove(ec_dev);
  273. return 0;
  274. }
  275. static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
  276. { ACPI_DRV_NAME, 0 },
  277. { }
  278. };
  279. MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
  280. static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
  281. {
  282. /*
  283. * Today all Chromebooks/boxes ship with Google_* as version and
  284. * coreboot as bios vendor. No other systems with this
  285. * combination are known to date.
  286. */
  287. .matches = {
  288. DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
  289. DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
  290. },
  291. },
  292. {
  293. /*
  294. * If the box is running custom coreboot firmware then the
  295. * DMI BIOS version string will not be matched by "Google_",
  296. * but the system vendor string will still be matched by
  297. * "GOOGLE".
  298. */
  299. .matches = {
  300. DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
  301. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  302. },
  303. },
  304. {
  305. /* x86-link, the Chromebook Pixel. */
  306. .matches = {
  307. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  308. DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
  309. },
  310. },
  311. {
  312. /* x86-samus, the Chromebook Pixel 2. */
  313. .matches = {
  314. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  315. DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
  316. },
  317. },
  318. {
  319. /* x86-peppy, the Acer C720 Chromebook. */
  320. .matches = {
  321. DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
  322. DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
  323. },
  324. },
  325. {
  326. /* x86-glimmer, the Lenovo Thinkpad Yoga 11e. */
  327. .matches = {
  328. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  329. DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
  330. },
  331. },
  332. { /* sentinel */ }
  333. };
  334. MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
  335. #ifdef CONFIG_PM_SLEEP
  336. static int cros_ec_lpc_suspend(struct device *dev)
  337. {
  338. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  339. return cros_ec_suspend(ec_dev);
  340. }
  341. static int cros_ec_lpc_resume(struct device *dev)
  342. {
  343. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  344. return cros_ec_resume(ec_dev);
  345. }
  346. #endif
  347. const struct dev_pm_ops cros_ec_lpc_pm_ops = {
  348. SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
  349. };
  350. static struct platform_driver cros_ec_lpc_driver = {
  351. .driver = {
  352. .name = DRV_NAME,
  353. .acpi_match_table = cros_ec_lpc_acpi_device_ids,
  354. .pm = &cros_ec_lpc_pm_ops,
  355. },
  356. .probe = cros_ec_lpc_probe,
  357. .remove = cros_ec_lpc_remove,
  358. };
  359. static struct platform_device cros_ec_lpc_device = {
  360. .name = DRV_NAME
  361. };
  362. static acpi_status cros_ec_lpc_parse_device(acpi_handle handle, u32 level,
  363. void *context, void **retval)
  364. {
  365. *(bool *)context = true;
  366. return AE_CTRL_TERMINATE;
  367. }
  368. static int __init cros_ec_lpc_init(void)
  369. {
  370. int ret;
  371. acpi_status status;
  372. status = acpi_get_devices(ACPI_DRV_NAME, cros_ec_lpc_parse_device,
  373. &cros_ec_lpc_acpi_device_found, NULL);
  374. if (ACPI_FAILURE(status))
  375. pr_warn(DRV_NAME ": Looking for %s failed\n", ACPI_DRV_NAME);
  376. if (!cros_ec_lpc_acpi_device_found &&
  377. !dmi_check_system(cros_ec_lpc_dmi_table)) {
  378. pr_err(DRV_NAME ": unsupported system.\n");
  379. return -ENODEV;
  380. }
  381. cros_ec_lpc_reg_init();
  382. /* Register the driver */
  383. ret = platform_driver_register(&cros_ec_lpc_driver);
  384. if (ret) {
  385. pr_err(DRV_NAME ": can't register driver: %d\n", ret);
  386. cros_ec_lpc_reg_destroy();
  387. return ret;
  388. }
  389. if (!cros_ec_lpc_acpi_device_found) {
  390. /* Register the device, and it'll get hooked up automatically */
  391. ret = platform_device_register(&cros_ec_lpc_device);
  392. if (ret) {
  393. pr_err(DRV_NAME ": can't register device: %d\n", ret);
  394. platform_driver_unregister(&cros_ec_lpc_driver);
  395. cros_ec_lpc_reg_destroy();
  396. }
  397. }
  398. return ret;
  399. }
  400. static void __exit cros_ec_lpc_exit(void)
  401. {
  402. if (!cros_ec_lpc_acpi_device_found)
  403. platform_device_unregister(&cros_ec_lpc_device);
  404. platform_driver_unregister(&cros_ec_lpc_driver);
  405. cros_ec_lpc_reg_destroy();
  406. }
  407. module_init(cros_ec_lpc_init);
  408. module_exit(cros_ec_lpc_exit);
  409. MODULE_LICENSE("GPL");
  410. MODULE_DESCRIPTION("ChromeOS EC LPC driver");