trx.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../stats.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "phy.h"
  32. #include "trx.h"
  33. #include "led.h"
  34. static u8 _rtl92ce_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  35. {
  36. __le16 fc = rtl_get_fc(skb);
  37. if (unlikely(ieee80211_is_beacon(fc)))
  38. return QSLT_BEACON;
  39. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  40. return QSLT_MGNT;
  41. return skb->priority;
  42. }
  43. static u8 _rtl92c_query_rxpwrpercentage(s8 antpower)
  44. {
  45. if ((antpower <= -100) || (antpower >= 20))
  46. return 0;
  47. else if (antpower >= 0)
  48. return 100;
  49. else
  50. return 100 + antpower;
  51. }
  52. static u8 _rtl92c_evm_db_to_percentage(s8 value)
  53. {
  54. s8 ret_val;
  55. ret_val = value;
  56. if (ret_val >= 0)
  57. ret_val = 0;
  58. if (ret_val <= -33)
  59. ret_val = -33;
  60. ret_val = 0 - ret_val;
  61. ret_val *= 3;
  62. if (ret_val == 99)
  63. ret_val = 100;
  64. return ret_val;
  65. }
  66. static long _rtl92ce_signal_scale_mapping(struct ieee80211_hw *hw,
  67. long currsig)
  68. {
  69. long retsig;
  70. if (currsig >= 61 && currsig <= 100)
  71. retsig = 90 + ((currsig - 60) / 4);
  72. else if (currsig >= 41 && currsig <= 60)
  73. retsig = 78 + ((currsig - 40) / 2);
  74. else if (currsig >= 31 && currsig <= 40)
  75. retsig = 66 + (currsig - 30);
  76. else if (currsig >= 21 && currsig <= 30)
  77. retsig = 54 + (currsig - 20);
  78. else if (currsig >= 5 && currsig <= 20)
  79. retsig = 42 + (((currsig - 5) * 2) / 3);
  80. else if (currsig == 4)
  81. retsig = 36;
  82. else if (currsig == 3)
  83. retsig = 27;
  84. else if (currsig == 2)
  85. retsig = 18;
  86. else if (currsig == 1)
  87. retsig = 9;
  88. else
  89. retsig = currsig;
  90. return retsig;
  91. }
  92. static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
  93. struct rtl_stats *pstats,
  94. struct rx_desc_92c *pdesc,
  95. struct rx_fwinfo_92c *p_drvinfo,
  96. bool packet_match_bssid,
  97. bool packet_toself,
  98. bool packet_beacon)
  99. {
  100. struct rtl_priv *rtlpriv = rtl_priv(hw);
  101. struct phy_sts_cck_8192s_t *cck_buf;
  102. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  103. s8 rx_pwr_all = 0, rx_pwr[4];
  104. u8 evm, pwdb_all, rf_rx_num = 0;
  105. u8 i, max_spatial_stream;
  106. u32 rssi, total_rssi = 0;
  107. bool is_cck_rate;
  108. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc->rxmcs);
  109. pstats->packet_matchbssid = packet_match_bssid;
  110. pstats->packet_toself = packet_toself;
  111. pstats->is_cck = is_cck_rate;
  112. pstats->packet_beacon = packet_beacon;
  113. pstats->rx_mimo_sig_qual[0] = -1;
  114. pstats->rx_mimo_sig_qual[1] = -1;
  115. if (is_cck_rate) {
  116. u8 report, cck_highpwr;
  117. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  118. if (ppsc->rfpwr_state == ERFON)
  119. cck_highpwr = (u8) rtl_get_bbreg(hw,
  120. RFPGA0_XA_HSSIPARAMETER2,
  121. BIT(9));
  122. else
  123. cck_highpwr = false;
  124. if (!cck_highpwr) {
  125. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  126. report = cck_buf->cck_agc_rpt & 0xc0;
  127. report = report >> 6;
  128. switch (report) {
  129. case 0x3:
  130. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  131. break;
  132. case 0x2:
  133. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  134. break;
  135. case 0x1:
  136. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  137. break;
  138. case 0x0:
  139. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  140. break;
  141. }
  142. } else {
  143. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  144. report = p_drvinfo->cfosho[0] & 0x60;
  145. report = report >> 5;
  146. switch (report) {
  147. case 0x3:
  148. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  149. break;
  150. case 0x2:
  151. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  152. break;
  153. case 0x1:
  154. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  155. break;
  156. case 0x0:
  157. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  158. break;
  159. }
  160. }
  161. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  162. /* CCK gain is smaller than OFDM/MCS gain,
  163. * so we add gain diff by experiences,
  164. * the val is 6
  165. */
  166. pwdb_all += 6;
  167. if (pwdb_all > 100)
  168. pwdb_all = 100;
  169. /* modify the offset to make the same
  170. * gain index with OFDM.
  171. */
  172. if (pwdb_all > 34 && pwdb_all <= 42)
  173. pwdb_all -= 2;
  174. else if (pwdb_all > 26 && pwdb_all <= 34)
  175. pwdb_all -= 6;
  176. else if (pwdb_all > 14 && pwdb_all <= 26)
  177. pwdb_all -= 8;
  178. else if (pwdb_all > 4 && pwdb_all <= 14)
  179. pwdb_all -= 4;
  180. pstats->rx_pwdb_all = pwdb_all;
  181. pstats->recvsignalpower = rx_pwr_all;
  182. /* (3) Get Signal Quality (EVM) */
  183. if (packet_match_bssid) {
  184. u8 sq;
  185. if (pstats->rx_pwdb_all > 40)
  186. sq = 100;
  187. else {
  188. sq = cck_buf->sq_rpt;
  189. if (sq > 64)
  190. sq = 0;
  191. else if (sq < 20)
  192. sq = 100;
  193. else
  194. sq = ((64 - sq) * 100) / 44;
  195. }
  196. pstats->signalquality = sq;
  197. pstats->rx_mimo_sig_qual[0] = sq;
  198. pstats->rx_mimo_sig_qual[1] = -1;
  199. }
  200. } else {
  201. rtlpriv->dm.rfpath_rxenable[0] =
  202. rtlpriv->dm.rfpath_rxenable[1] = true;
  203. /* (1)Get RSSI for HT rate */
  204. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  205. /* we will judge RF RX path now. */
  206. if (rtlpriv->dm.rfpath_rxenable[i])
  207. rf_rx_num++;
  208. rx_pwr[i] =
  209. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  210. /* Translate DBM to percentage. */
  211. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  212. total_rssi += rssi;
  213. /* Get Rx snr value in DB */
  214. rtlpriv->stats.rx_snr_db[i] =
  215. (long)(p_drvinfo->rxsnr[i] / 2);
  216. /* Record Signal Strength for next packet */
  217. if (packet_match_bssid)
  218. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  219. }
  220. /* (2)PWDB, Average PWDB cacluated by
  221. * hardware (for rate adaptive)
  222. */
  223. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  224. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  225. pstats->rx_pwdb_all = pwdb_all;
  226. pstats->rxpower = rx_pwr_all;
  227. pstats->recvsignalpower = rx_pwr_all;
  228. /* (3)EVM of HT rate */
  229. if (pstats->is_ht && pstats->rate >= DESC_RATEMCS8 &&
  230. pstats->rate <= DESC_RATEMCS15)
  231. max_spatial_stream = 2;
  232. else
  233. max_spatial_stream = 1;
  234. for (i = 0; i < max_spatial_stream; i++) {
  235. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  236. if (packet_match_bssid) {
  237. /* Fill value in RFD, Get the first
  238. * spatial stream only
  239. */
  240. if (i == 0)
  241. pstats->signalquality =
  242. (u8) (evm & 0xff);
  243. pstats->rx_mimo_sig_qual[i] = (u8) (evm & 0xff);
  244. }
  245. }
  246. }
  247. /* UI BSS List signal strength(in percentage),
  248. * make it good looking, from 0~100.
  249. */
  250. if (is_cck_rate)
  251. pstats->signalstrength =
  252. (u8) (_rtl92ce_signal_scale_mapping(hw, pwdb_all));
  253. else if (rf_rx_num != 0)
  254. pstats->signalstrength =
  255. (u8) (_rtl92ce_signal_scale_mapping
  256. (hw, total_rssi /= rf_rx_num));
  257. }
  258. static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  259. struct sk_buff *skb,
  260. struct rtl_stats *pstats,
  261. struct rx_desc_92c *pdesc,
  262. struct rx_fwinfo_92c *p_drvinfo)
  263. {
  264. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  265. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  266. struct ieee80211_hdr *hdr;
  267. u8 *tmp_buf;
  268. u8 *praddr;
  269. __le16 fc;
  270. u16 type, c_fc;
  271. bool packet_matchbssid, packet_toself, packet_beacon = false;
  272. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  273. hdr = (struct ieee80211_hdr *)tmp_buf;
  274. fc = hdr->frame_control;
  275. c_fc = le16_to_cpu(fc);
  276. type = WLAN_FC_GET_TYPE(fc);
  277. praddr = hdr->addr1;
  278. packet_matchbssid =
  279. ((IEEE80211_FTYPE_CTL != type) &&
  280. ether_addr_equal(mac->bssid,
  281. (c_fc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
  282. (c_fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
  283. hdr->addr3) &&
  284. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  285. packet_toself = packet_matchbssid &&
  286. ether_addr_equal(praddr, rtlefuse->dev_addr);
  287. if (ieee80211_is_beacon(fc))
  288. packet_beacon = true;
  289. _rtl92ce_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  290. packet_matchbssid, packet_toself,
  291. packet_beacon);
  292. rtl_process_phyinfo(hw, tmp_buf, pstats);
  293. }
  294. bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw,
  295. struct rtl_stats *stats,
  296. struct ieee80211_rx_status *rx_status,
  297. u8 *p_desc, struct sk_buff *skb)
  298. {
  299. struct rx_fwinfo_92c *p_drvinfo;
  300. struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
  301. struct ieee80211_hdr *hdr;
  302. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  303. stats->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
  304. stats->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  305. RX_DRV_INFO_SIZE_UNIT;
  306. stats->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
  307. stats->icv = (u16) GET_RX_DESC_ICV(pdesc);
  308. stats->crc = (u16) GET_RX_DESC_CRC32(pdesc);
  309. stats->hwerror = (stats->crc | stats->icv);
  310. stats->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  311. stats->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
  312. stats->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
  313. stats->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
  314. stats->isfirst_ampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
  315. && (GET_RX_DESC_FAGGR(pdesc) == 1));
  316. stats->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  317. stats->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
  318. stats->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
  319. stats->is_cck = RX_HAL_IS_CCK_RATE(pdesc->rxmcs);
  320. rx_status->freq = hw->conf.chandef.chan->center_freq;
  321. rx_status->band = hw->conf.chandef.chan->band;
  322. hdr = (struct ieee80211_hdr *)(skb->data + stats->rx_drvinfo_size
  323. + stats->rx_bufshift);
  324. if (stats->crc)
  325. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  326. if (stats->rx_is40Mhzpacket)
  327. rx_status->bw = RATE_INFO_BW_40;
  328. if (stats->is_ht)
  329. rx_status->encoding = RX_ENC_HT;
  330. rx_status->flag |= RX_FLAG_MACTIME_START;
  331. /* hw will set stats->decrypted true, if it finds the
  332. * frame is open data frame or mgmt frame.
  333. * So hw will not decryption robust managment frame
  334. * for IEEE80211w but still set status->decrypted
  335. * true, so here we should set it back to undecrypted
  336. * for IEEE80211w frame, and mac80211 sw will help
  337. * to decrypt it
  338. */
  339. if (stats->decrypted) {
  340. if ((_ieee80211_is_robust_mgmt_frame(hdr)) &&
  341. (ieee80211_has_protected(hdr->frame_control)))
  342. rx_status->flag &= ~RX_FLAG_DECRYPTED;
  343. else
  344. rx_status->flag |= RX_FLAG_DECRYPTED;
  345. }
  346. /* rate_idx: index of data rate into band's
  347. * supported rates or MCS index if HT rates
  348. * are use (RX_FLAG_HT)
  349. * Notice: this is diff with windows define
  350. */
  351. rx_status->rate_idx = rtlwifi_rate_mapping(hw, stats->is_ht,
  352. false, stats->rate);
  353. rx_status->mactime = stats->timestamp_low;
  354. if (phystatus) {
  355. p_drvinfo = (struct rx_fwinfo_92c *)(skb->data +
  356. stats->rx_bufshift);
  357. _rtl92ce_translate_rx_signal_stuff(hw,
  358. skb, stats, pdesc,
  359. p_drvinfo);
  360. }
  361. /*rx_status->qual = stats->signal; */
  362. rx_status->signal = stats->recvsignalpower + 10;
  363. return true;
  364. }
  365. void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
  366. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  367. u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
  368. struct ieee80211_sta *sta,
  369. struct sk_buff *skb,
  370. u8 hw_queue, struct rtl_tcb_desc *tcb_desc)
  371. {
  372. struct rtl_priv *rtlpriv = rtl_priv(hw);
  373. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  374. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  375. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  376. bool defaultadapter = true;
  377. u8 *pdesc = pdesc_tx;
  378. u16 seq_number;
  379. __le16 fc = hdr->frame_control;
  380. u8 fw_qsel = _rtl92ce_map_hwqueue_to_fwqueue(skb, hw_queue);
  381. bool firstseg = ((hdr->seq_ctrl &
  382. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  383. bool lastseg = ((hdr->frame_control &
  384. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  385. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  386. skb->data, skb->len,
  387. PCI_DMA_TODEVICE);
  388. u8 bw_40 = 0;
  389. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  390. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  391. "DMA mapping error\n");
  392. return;
  393. }
  394. rcu_read_lock();
  395. sta = get_sta(hw, mac->vif, mac->bssid);
  396. if (mac->opmode == NL80211_IFTYPE_STATION) {
  397. bw_40 = mac->bw_40;
  398. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  399. mac->opmode == NL80211_IFTYPE_ADHOC ||
  400. mac->opmode == NL80211_IFTYPE_MESH_POINT) {
  401. if (sta)
  402. bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40;
  403. }
  404. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  405. rtl_get_tcb_desc(hw, info, sta, skb, tcb_desc);
  406. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_92c));
  407. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  408. firstseg = true;
  409. lastseg = true;
  410. }
  411. if (firstseg) {
  412. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  413. SET_TX_DESC_TX_RATE(pdesc, tcb_desc->hw_rate);
  414. if (tcb_desc->use_shortgi || tcb_desc->use_shortpreamble)
  415. SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
  416. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  417. SET_TX_DESC_AGG_BREAK(pdesc, 1);
  418. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
  419. }
  420. SET_TX_DESC_SEQ(pdesc, seq_number);
  421. SET_TX_DESC_RTS_ENABLE(pdesc, ((tcb_desc->rts_enable &&
  422. !tcb_desc->
  423. cts_enable) ? 1 : 0));
  424. SET_TX_DESC_HW_RTS_ENABLE(pdesc,
  425. ((tcb_desc->rts_enable
  426. || tcb_desc->cts_enable) ? 1 : 0));
  427. SET_TX_DESC_CTS2SELF(pdesc, ((tcb_desc->cts_enable) ? 1 : 0));
  428. SET_TX_DESC_RTS_STBC(pdesc, ((tcb_desc->rts_stbc) ? 1 : 0));
  429. SET_TX_DESC_RTS_RATE(pdesc, tcb_desc->rts_rate);
  430. SET_TX_DESC_RTS_BW(pdesc, 0);
  431. SET_TX_DESC_RTS_SC(pdesc, tcb_desc->rts_sc);
  432. SET_TX_DESC_RTS_SHORT(pdesc,
  433. ((tcb_desc->rts_rate <= DESC_RATE54M) ?
  434. (tcb_desc->rts_use_shortpreamble ? 1 : 0)
  435. : (tcb_desc->rts_use_shortgi ? 1 : 0)));
  436. if (bw_40) {
  437. if (tcb_desc->packet_bw) {
  438. SET_TX_DESC_DATA_BW(pdesc, 1);
  439. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
  440. } else {
  441. SET_TX_DESC_DATA_BW(pdesc, 0);
  442. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  443. mac->cur_40_prime_sc);
  444. }
  445. } else {
  446. SET_TX_DESC_DATA_BW(pdesc, 0);
  447. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  448. }
  449. SET_TX_DESC_LINIP(pdesc, 0);
  450. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
  451. if (sta) {
  452. u8 ampdu_density = sta->ht_cap.ampdu_density;
  453. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  454. }
  455. if (info->control.hw_key) {
  456. struct ieee80211_key_conf *keyconf =
  457. info->control.hw_key;
  458. switch (keyconf->cipher) {
  459. case WLAN_CIPHER_SUITE_WEP40:
  460. case WLAN_CIPHER_SUITE_WEP104:
  461. case WLAN_CIPHER_SUITE_TKIP:
  462. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  463. break;
  464. case WLAN_CIPHER_SUITE_CCMP:
  465. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  466. break;
  467. default:
  468. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  469. break;
  470. }
  471. }
  472. SET_TX_DESC_PKT_ID(pdesc, 0);
  473. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  474. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  475. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  476. SET_TX_DESC_DISABLE_FB(pdesc, 0);
  477. SET_TX_DESC_USE_RATE(pdesc, tcb_desc->use_driver_rate ? 1 : 0);
  478. if (ieee80211_is_data_qos(fc)) {
  479. if (mac->rdg_en) {
  480. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  481. "Enable RDG function\n");
  482. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  483. SET_TX_DESC_HTC(pdesc, 1);
  484. }
  485. }
  486. }
  487. rcu_read_unlock();
  488. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  489. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  490. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
  491. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  492. if (rtlpriv->dm.useramask) {
  493. SET_TX_DESC_RATE_ID(pdesc, tcb_desc->ratr_index);
  494. SET_TX_DESC_MACID(pdesc, tcb_desc->mac_id);
  495. } else {
  496. SET_TX_DESC_RATE_ID(pdesc, 0xC + tcb_desc->ratr_index);
  497. SET_TX_DESC_MACID(pdesc, tcb_desc->ratr_index);
  498. }
  499. if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
  500. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  501. SET_TX_DESC_PKT_ID(pdesc, 8);
  502. if (!defaultadapter)
  503. SET_TX_DESC_QOS(pdesc, 1);
  504. }
  505. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  506. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
  507. is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
  508. SET_TX_DESC_BMC(pdesc, 1);
  509. }
  510. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  511. }
  512. void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
  513. u8 *pdesc, bool firstseg,
  514. bool lastseg, struct sk_buff *skb)
  515. {
  516. struct rtl_priv *rtlpriv = rtl_priv(hw);
  517. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  518. u8 fw_queue = QSLT_BEACON;
  519. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  520. skb->data, skb->len,
  521. PCI_DMA_TODEVICE);
  522. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
  523. __le16 fc = hdr->frame_control;
  524. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  525. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  526. "DMA mapping error\n");
  527. return;
  528. }
  529. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  530. if (firstseg)
  531. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  532. SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M);
  533. SET_TX_DESC_SEQ(pdesc, 0);
  534. SET_TX_DESC_LINIP(pdesc, 0);
  535. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  536. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  537. SET_TX_DESC_LAST_SEG(pdesc, 1);
  538. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
  539. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  540. SET_TX_DESC_RATE_ID(pdesc, 7);
  541. SET_TX_DESC_MACID(pdesc, 0);
  542. SET_TX_DESC_OWN(pdesc, 1);
  543. SET_TX_DESC_PKT_SIZE(pdesc, (u16) (skb->len));
  544. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  545. SET_TX_DESC_LAST_SEG(pdesc, 1);
  546. SET_TX_DESC_OFFSET(pdesc, 0x20);
  547. SET_TX_DESC_USE_RATE(pdesc, 1);
  548. if (!ieee80211_is_data_qos(fc)) {
  549. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  550. SET_TX_DESC_PKT_ID(pdesc, 8);
  551. }
  552. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  553. "H2C Tx Cmd Content", pdesc, TX_DESC_SIZE);
  554. }
  555. void rtl92ce_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
  556. u8 desc_name, u8 *val)
  557. {
  558. if (istx) {
  559. switch (desc_name) {
  560. case HW_DESC_OWN:
  561. wmb();
  562. SET_TX_DESC_OWN(pdesc, 1);
  563. break;
  564. case HW_DESC_TX_NEXTDESC_ADDR:
  565. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
  566. break;
  567. default:
  568. WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n",
  569. desc_name);
  570. break;
  571. }
  572. } else {
  573. switch (desc_name) {
  574. case HW_DESC_RXOWN:
  575. wmb();
  576. SET_RX_DESC_OWN(pdesc, 1);
  577. break;
  578. case HW_DESC_RXBUFF_ADDR:
  579. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
  580. break;
  581. case HW_DESC_RXPKT_LEN:
  582. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
  583. break;
  584. case HW_DESC_RXERO:
  585. SET_RX_DESC_EOR(pdesc, 1);
  586. break;
  587. default:
  588. WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n",
  589. desc_name);
  590. break;
  591. }
  592. }
  593. }
  594. u64 rtl92ce_get_desc(struct ieee80211_hw *hw, u8 *p_desc,
  595. bool istx, u8 desc_name)
  596. {
  597. u32 ret = 0;
  598. if (istx) {
  599. switch (desc_name) {
  600. case HW_DESC_OWN:
  601. ret = GET_TX_DESC_OWN(p_desc);
  602. break;
  603. case HW_DESC_TXBUFF_ADDR:
  604. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc);
  605. break;
  606. default:
  607. WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n",
  608. desc_name);
  609. break;
  610. }
  611. } else {
  612. switch (desc_name) {
  613. case HW_DESC_OWN:
  614. ret = GET_RX_DESC_OWN(p_desc);
  615. break;
  616. case HW_DESC_RXPKT_LEN:
  617. ret = GET_RX_DESC_PKT_LEN(p_desc);
  618. break;
  619. case HW_DESC_RXBUFF_ADDR:
  620. ret = GET_RX_DESC_BUFF_ADDR(p_desc);
  621. break;
  622. default:
  623. WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n",
  624. desc_name);
  625. break;
  626. }
  627. }
  628. return ret;
  629. }
  630. bool rtl92ce_is_tx_desc_closed(struct ieee80211_hw *hw,
  631. u8 hw_queue, u16 index)
  632. {
  633. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  634. struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
  635. u8 *entry = (u8 *)(&ring->desc[ring->idx]);
  636. u8 own = (u8)rtl92ce_get_desc(hw, entry, true, HW_DESC_OWN);
  637. /*beacon packet will only use the first
  638. *descriptor defautly,and the own may not
  639. *be cleared by the hardware
  640. */
  641. if (own)
  642. return false;
  643. return true;
  644. }
  645. void rtl92ce_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  646. {
  647. struct rtl_priv *rtlpriv = rtl_priv(hw);
  648. if (hw_queue == BEACON_QUEUE) {
  649. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  650. } else {
  651. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  652. BIT(0) << (hw_queue));
  653. }
  654. }