sa2400.c 5.8 KB

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  1. /*
  2. * Radio tuning for Philips SA2400 on RTL8180
  3. *
  4. * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
  5. *
  6. * Code from the BSD driver and the rtl8181 project have been
  7. * very useful to understand certain things
  8. *
  9. * I want to thanks the Authors of such projects and the Ndiswrapper
  10. * project Authors.
  11. *
  12. * A special Big Thanks also is for all people who donated me cards,
  13. * making possible the creation of the original rtl8180 driver
  14. * from which this code is derived!
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License version 2 as
  18. * published by the Free Software Foundation.
  19. */
  20. #include <linux/pci.h>
  21. #include <linux/delay.h>
  22. #include <net/mac80211.h>
  23. #include "rtl8180.h"
  24. #include "sa2400.h"
  25. static const u32 sa2400_chan[] = {
  26. 0x00096c, /* ch1 */
  27. 0x080970,
  28. 0x100974,
  29. 0x180978,
  30. 0x000980,
  31. 0x080984,
  32. 0x100988,
  33. 0x18098c,
  34. 0x000994,
  35. 0x080998,
  36. 0x10099c,
  37. 0x1809a0,
  38. 0x0009a8,
  39. 0x0009b4, /* ch 14 */
  40. };
  41. static void write_sa2400(struct ieee80211_hw *dev, u8 addr, u32 data)
  42. {
  43. struct rtl8180_priv *priv = dev->priv;
  44. u32 phy_config;
  45. /* MAC will bang bits to the sa2400. sw 3-wire is NOT used */
  46. phy_config = 0xb0000000;
  47. phy_config |= ((u32)(addr & 0xf)) << 24;
  48. phy_config |= data & 0xffffff;
  49. rtl818x_iowrite32(priv,
  50. (__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
  51. msleep(3);
  52. }
  53. static void sa2400_write_phy_antenna(struct ieee80211_hw *dev, short chan)
  54. {
  55. struct rtl8180_priv *priv = dev->priv;
  56. u8 ant = SA2400_ANTENNA;
  57. if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
  58. ant |= BB_ANTENNA_B;
  59. if (chan == 14)
  60. ant |= BB_ANTATTEN_CHAN14;
  61. rtl8180_write_phy(dev, 0x10, ant);
  62. }
  63. static u8 sa2400_rf_rssi_map[] = {
  64. 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
  65. 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
  66. 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
  67. 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
  68. 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
  69. 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
  70. 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
  71. 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
  72. 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
  73. 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02,
  74. };
  75. static u8 sa2400_rf_calc_rssi(u8 agc, u8 sq)
  76. {
  77. if (sq == 0x80)
  78. return 1;
  79. if (sq > 78)
  80. return 32;
  81. /* TODO: recalc sa2400_rf_rssi_map to avoid mult / div */
  82. return 65 * sa2400_rf_rssi_map[sq] / 100;
  83. }
  84. static void sa2400_rf_set_channel(struct ieee80211_hw *dev,
  85. struct ieee80211_conf *conf)
  86. {
  87. struct rtl8180_priv *priv = dev->priv;
  88. int channel =
  89. ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
  90. u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
  91. u32 chan = sa2400_chan[channel - 1];
  92. write_sa2400(dev, 7, txpw);
  93. sa2400_write_phy_antenna(dev, channel);
  94. write_sa2400(dev, 0, chan);
  95. write_sa2400(dev, 1, 0xbb50);
  96. write_sa2400(dev, 2, 0x80);
  97. write_sa2400(dev, 3, 0);
  98. }
  99. static void sa2400_rf_stop(struct ieee80211_hw *dev)
  100. {
  101. write_sa2400(dev, 4, 0);
  102. }
  103. static void sa2400_rf_init(struct ieee80211_hw *dev)
  104. {
  105. struct rtl8180_priv *priv = dev->priv;
  106. u32 anaparam, txconf;
  107. u8 firdac;
  108. int analogphy = priv->rfparam & RF_PARAM_ANALOGPHY;
  109. anaparam = priv->anaparam;
  110. anaparam &= ~(1 << ANAPARAM_TXDACOFF_SHIFT);
  111. anaparam &= ~ANAPARAM_PWR1_MASK;
  112. anaparam &= ~ANAPARAM_PWR0_MASK;
  113. if (analogphy) {
  114. anaparam |= SA2400_ANA_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT;
  115. firdac = 0;
  116. } else {
  117. anaparam |= (SA2400_DIG_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT);
  118. anaparam |= (SA2400_ANAPARAM_PWR0_ON << ANAPARAM_PWR0_SHIFT);
  119. firdac = 1 << SA2400_REG4_FIRDAC_SHIFT;
  120. }
  121. rtl8180_set_anaparam(priv, anaparam);
  122. write_sa2400(dev, 0, sa2400_chan[0]);
  123. write_sa2400(dev, 1, 0xbb50);
  124. write_sa2400(dev, 2, 0x80);
  125. write_sa2400(dev, 3, 0);
  126. write_sa2400(dev, 4, 0x19340 | firdac);
  127. write_sa2400(dev, 5, 0x1dfb | (SA2400_MAX_SENS - 54) << 15);
  128. write_sa2400(dev, 4, 0x19348 | firdac); /* calibrate VCO */
  129. if (!analogphy)
  130. write_sa2400(dev, 4, 0x1938c); /*???*/
  131. write_sa2400(dev, 4, 0x19340 | firdac);
  132. write_sa2400(dev, 0, sa2400_chan[0]);
  133. write_sa2400(dev, 1, 0xbb50);
  134. write_sa2400(dev, 2, 0x80);
  135. write_sa2400(dev, 3, 0);
  136. write_sa2400(dev, 4, 0x19344 | firdac); /* calibrate filter */
  137. /* new from rtl8180 embedded driver (rtl8181 project) */
  138. write_sa2400(dev, 6, 0x13ff | (1 << 23)); /* MANRX */
  139. write_sa2400(dev, 8, 0); /* VCO */
  140. if (analogphy) {
  141. rtl8180_set_anaparam(priv, anaparam |
  142. (1 << ANAPARAM_TXDACOFF_SHIFT));
  143. txconf = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  144. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  145. txconf | RTL818X_TX_CONF_LOOPBACK_CONT);
  146. write_sa2400(dev, 4, 0x19341); /* calibrates DC */
  147. /* a 5us sleep is required here,
  148. * we rely on the 3ms delay introduced in write_sa2400 */
  149. write_sa2400(dev, 4, 0x19345);
  150. /* a 20us sleep is required here,
  151. * we rely on the 3ms delay introduced in write_sa2400 */
  152. rtl818x_iowrite32(priv, &priv->map->TX_CONF, txconf);
  153. rtl8180_set_anaparam(priv, anaparam);
  154. }
  155. /* end new code */
  156. write_sa2400(dev, 4, 0x19341 | firdac); /* RTX MODE */
  157. /* baseband configuration */
  158. rtl8180_write_phy(dev, 0, 0x98);
  159. rtl8180_write_phy(dev, 3, 0x38);
  160. rtl8180_write_phy(dev, 4, 0xe0);
  161. rtl8180_write_phy(dev, 5, 0x90);
  162. rtl8180_write_phy(dev, 6, 0x1a);
  163. rtl8180_write_phy(dev, 7, 0x64);
  164. sa2400_write_phy_antenna(dev, 1);
  165. rtl8180_write_phy(dev, 0x11, 0x80);
  166. if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
  167. RTL818X_CONFIG2_ANTENNA_DIV)
  168. rtl8180_write_phy(dev, 0x12, 0xc7); /* enable ant diversity */
  169. else
  170. rtl8180_write_phy(dev, 0x12, 0x47); /* disable ant diversity */
  171. rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
  172. rtl8180_write_phy(dev, 0x19, 0x0);
  173. rtl8180_write_phy(dev, 0x1a, 0xa0);
  174. }
  175. const struct rtl818x_rf_ops sa2400_rf_ops = {
  176. .name = "Philips",
  177. .init = sa2400_rf_init,
  178. .stop = sa2400_rf_stop,
  179. .set_chan = sa2400_rf_set_channel,
  180. .calc_rssi = sa2400_rf_calc_rssi,
  181. };