mvmdio.c 11 KB

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  1. /*
  2. * Driver for the MDIO interface of Marvell network interfaces.
  3. *
  4. * Since the MDIO interface of Marvell network interfaces is shared
  5. * between all network interfaces, having a single driver allows to
  6. * handle concurrent accesses properly (you may have four Ethernet
  7. * ports, but they in fact share the same SMI interface to access
  8. * the MDIO bus). This driver is currently used by the mvneta and
  9. * mv643xx_eth drivers.
  10. *
  11. * Copyright (C) 2012 Marvell
  12. *
  13. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  14. *
  15. * This file is licensed under the terms of the GNU General Public
  16. * License version 2. This program is licensed "as is" without any
  17. * warranty of any kind, whether express or implied.
  18. */
  19. #include <linux/clk.h>
  20. #include <linux/delay.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/io.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/of_device.h>
  26. #include <linux/of_mdio.h>
  27. #include <linux/phy.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/sched.h>
  30. #include <linux/wait.h>
  31. #define MVMDIO_SMI_DATA_SHIFT 0
  32. #define MVMDIO_SMI_PHY_ADDR_SHIFT 16
  33. #define MVMDIO_SMI_PHY_REG_SHIFT 21
  34. #define MVMDIO_SMI_READ_OPERATION BIT(26)
  35. #define MVMDIO_SMI_WRITE_OPERATION 0
  36. #define MVMDIO_SMI_READ_VALID BIT(27)
  37. #define MVMDIO_SMI_BUSY BIT(28)
  38. #define MVMDIO_ERR_INT_CAUSE 0x007C
  39. #define MVMDIO_ERR_INT_SMI_DONE 0x00000010
  40. #define MVMDIO_ERR_INT_MASK 0x0080
  41. #define MVMDIO_XSMI_MGNT_REG 0x0
  42. #define MVMDIO_XSMI_PHYADDR_SHIFT 16
  43. #define MVMDIO_XSMI_DEVADDR_SHIFT 21
  44. #define MVMDIO_XSMI_WRITE_OPERATION (0x5 << 26)
  45. #define MVMDIO_XSMI_READ_OPERATION (0x7 << 26)
  46. #define MVMDIO_XSMI_READ_VALID BIT(29)
  47. #define MVMDIO_XSMI_BUSY BIT(30)
  48. #define MVMDIO_XSMI_ADDR_REG 0x8
  49. /*
  50. * SMI Timeout measurements:
  51. * - Kirkwood 88F6281 (Globalscale Dreamplug): 45us to 95us (Interrupt)
  52. * - Armada 370 (Globalscale Mirabox): 41us to 43us (Polled)
  53. */
  54. #define MVMDIO_SMI_TIMEOUT 1000 /* 1000us = 1ms */
  55. #define MVMDIO_SMI_POLL_INTERVAL_MIN 45
  56. #define MVMDIO_SMI_POLL_INTERVAL_MAX 55
  57. #define MVMDIO_XSMI_POLL_INTERVAL_MIN 150
  58. #define MVMDIO_XSMI_POLL_INTERVAL_MAX 160
  59. struct orion_mdio_dev {
  60. void __iomem *regs;
  61. struct clk *clk[4];
  62. /*
  63. * If we have access to the error interrupt pin (which is
  64. * somewhat misnamed as it not only reflects internal errors
  65. * but also reflects SMI completion), use that to wait for
  66. * SMI access completion instead of polling the SMI busy bit.
  67. */
  68. int err_interrupt;
  69. wait_queue_head_t smi_busy_wait;
  70. };
  71. enum orion_mdio_bus_type {
  72. BUS_TYPE_SMI,
  73. BUS_TYPE_XSMI
  74. };
  75. struct orion_mdio_ops {
  76. int (*is_done)(struct orion_mdio_dev *);
  77. unsigned int poll_interval_min;
  78. unsigned int poll_interval_max;
  79. };
  80. /* Wait for the SMI unit to be ready for another operation
  81. */
  82. static int orion_mdio_wait_ready(const struct orion_mdio_ops *ops,
  83. struct mii_bus *bus)
  84. {
  85. struct orion_mdio_dev *dev = bus->priv;
  86. unsigned long timeout = usecs_to_jiffies(MVMDIO_SMI_TIMEOUT);
  87. unsigned long end = jiffies + timeout;
  88. int timedout = 0;
  89. while (1) {
  90. if (ops->is_done(dev))
  91. return 0;
  92. else if (timedout)
  93. break;
  94. if (dev->err_interrupt <= 0) {
  95. usleep_range(ops->poll_interval_min,
  96. ops->poll_interval_max);
  97. if (time_is_before_jiffies(end))
  98. ++timedout;
  99. } else {
  100. /* wait_event_timeout does not guarantee a delay of at
  101. * least one whole jiffie, so timeout must be no less
  102. * than two.
  103. */
  104. if (timeout < 2)
  105. timeout = 2;
  106. wait_event_timeout(dev->smi_busy_wait,
  107. ops->is_done(dev), timeout);
  108. ++timedout;
  109. }
  110. }
  111. dev_err(bus->parent, "Timeout: SMI busy for too long\n");
  112. return -ETIMEDOUT;
  113. }
  114. static int orion_mdio_smi_is_done(struct orion_mdio_dev *dev)
  115. {
  116. return !(readl(dev->regs) & MVMDIO_SMI_BUSY);
  117. }
  118. static const struct orion_mdio_ops orion_mdio_smi_ops = {
  119. .is_done = orion_mdio_smi_is_done,
  120. .poll_interval_min = MVMDIO_SMI_POLL_INTERVAL_MIN,
  121. .poll_interval_max = MVMDIO_SMI_POLL_INTERVAL_MAX,
  122. };
  123. static int orion_mdio_smi_read(struct mii_bus *bus, int mii_id,
  124. int regnum)
  125. {
  126. struct orion_mdio_dev *dev = bus->priv;
  127. u32 val;
  128. int ret;
  129. if (regnum & MII_ADDR_C45)
  130. return -EOPNOTSUPP;
  131. ret = orion_mdio_wait_ready(&orion_mdio_smi_ops, bus);
  132. if (ret < 0)
  133. return ret;
  134. writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
  135. (regnum << MVMDIO_SMI_PHY_REG_SHIFT) |
  136. MVMDIO_SMI_READ_OPERATION),
  137. dev->regs);
  138. ret = orion_mdio_wait_ready(&orion_mdio_smi_ops, bus);
  139. if (ret < 0)
  140. return ret;
  141. val = readl(dev->regs);
  142. if (!(val & MVMDIO_SMI_READ_VALID)) {
  143. dev_err(bus->parent, "SMI bus read not valid\n");
  144. return -ENODEV;
  145. }
  146. return val & GENMASK(15, 0);
  147. }
  148. static int orion_mdio_smi_write(struct mii_bus *bus, int mii_id,
  149. int regnum, u16 value)
  150. {
  151. struct orion_mdio_dev *dev = bus->priv;
  152. int ret;
  153. if (regnum & MII_ADDR_C45)
  154. return -EOPNOTSUPP;
  155. ret = orion_mdio_wait_ready(&orion_mdio_smi_ops, bus);
  156. if (ret < 0)
  157. return ret;
  158. writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
  159. (regnum << MVMDIO_SMI_PHY_REG_SHIFT) |
  160. MVMDIO_SMI_WRITE_OPERATION |
  161. (value << MVMDIO_SMI_DATA_SHIFT)),
  162. dev->regs);
  163. return 0;
  164. }
  165. static int orion_mdio_xsmi_is_done(struct orion_mdio_dev *dev)
  166. {
  167. return !(readl(dev->regs + MVMDIO_XSMI_MGNT_REG) & MVMDIO_XSMI_BUSY);
  168. }
  169. static const struct orion_mdio_ops orion_mdio_xsmi_ops = {
  170. .is_done = orion_mdio_xsmi_is_done,
  171. .poll_interval_min = MVMDIO_XSMI_POLL_INTERVAL_MIN,
  172. .poll_interval_max = MVMDIO_XSMI_POLL_INTERVAL_MAX,
  173. };
  174. static int orion_mdio_xsmi_read(struct mii_bus *bus, int mii_id,
  175. int regnum)
  176. {
  177. struct orion_mdio_dev *dev = bus->priv;
  178. u16 dev_addr = (regnum >> 16) & GENMASK(4, 0);
  179. int ret;
  180. if (!(regnum & MII_ADDR_C45))
  181. return -EOPNOTSUPP;
  182. ret = orion_mdio_wait_ready(&orion_mdio_xsmi_ops, bus);
  183. if (ret < 0)
  184. return ret;
  185. writel(regnum & GENMASK(15, 0), dev->regs + MVMDIO_XSMI_ADDR_REG);
  186. writel((mii_id << MVMDIO_XSMI_PHYADDR_SHIFT) |
  187. (dev_addr << MVMDIO_XSMI_DEVADDR_SHIFT) |
  188. MVMDIO_XSMI_READ_OPERATION,
  189. dev->regs + MVMDIO_XSMI_MGNT_REG);
  190. ret = orion_mdio_wait_ready(&orion_mdio_xsmi_ops, bus);
  191. if (ret < 0)
  192. return ret;
  193. if (!(readl(dev->regs + MVMDIO_XSMI_MGNT_REG) &
  194. MVMDIO_XSMI_READ_VALID)) {
  195. dev_err(bus->parent, "XSMI bus read not valid\n");
  196. return -ENODEV;
  197. }
  198. return readl(dev->regs + MVMDIO_XSMI_MGNT_REG) & GENMASK(15, 0);
  199. }
  200. static int orion_mdio_xsmi_write(struct mii_bus *bus, int mii_id,
  201. int regnum, u16 value)
  202. {
  203. struct orion_mdio_dev *dev = bus->priv;
  204. u16 dev_addr = (regnum >> 16) & GENMASK(4, 0);
  205. int ret;
  206. if (!(regnum & MII_ADDR_C45))
  207. return -EOPNOTSUPP;
  208. ret = orion_mdio_wait_ready(&orion_mdio_xsmi_ops, bus);
  209. if (ret < 0)
  210. return ret;
  211. writel(regnum & GENMASK(15, 0), dev->regs + MVMDIO_XSMI_ADDR_REG);
  212. writel((mii_id << MVMDIO_XSMI_PHYADDR_SHIFT) |
  213. (dev_addr << MVMDIO_XSMI_DEVADDR_SHIFT) |
  214. MVMDIO_XSMI_WRITE_OPERATION | value,
  215. dev->regs + MVMDIO_XSMI_MGNT_REG);
  216. return 0;
  217. }
  218. static irqreturn_t orion_mdio_err_irq(int irq, void *dev_id)
  219. {
  220. struct orion_mdio_dev *dev = dev_id;
  221. if (readl(dev->regs + MVMDIO_ERR_INT_CAUSE) &
  222. MVMDIO_ERR_INT_SMI_DONE) {
  223. writel(~MVMDIO_ERR_INT_SMI_DONE,
  224. dev->regs + MVMDIO_ERR_INT_CAUSE);
  225. wake_up(&dev->smi_busy_wait);
  226. return IRQ_HANDLED;
  227. }
  228. return IRQ_NONE;
  229. }
  230. static int orion_mdio_probe(struct platform_device *pdev)
  231. {
  232. enum orion_mdio_bus_type type;
  233. struct resource *r;
  234. struct mii_bus *bus;
  235. struct orion_mdio_dev *dev;
  236. int i, ret;
  237. type = (enum orion_mdio_bus_type)of_device_get_match_data(&pdev->dev);
  238. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  239. if (!r) {
  240. dev_err(&pdev->dev, "No SMI register address given\n");
  241. return -ENODEV;
  242. }
  243. bus = devm_mdiobus_alloc_size(&pdev->dev,
  244. sizeof(struct orion_mdio_dev));
  245. if (!bus)
  246. return -ENOMEM;
  247. switch (type) {
  248. case BUS_TYPE_SMI:
  249. bus->read = orion_mdio_smi_read;
  250. bus->write = orion_mdio_smi_write;
  251. break;
  252. case BUS_TYPE_XSMI:
  253. bus->read = orion_mdio_xsmi_read;
  254. bus->write = orion_mdio_xsmi_write;
  255. break;
  256. }
  257. bus->name = "orion_mdio_bus";
  258. snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii",
  259. dev_name(&pdev->dev));
  260. bus->parent = &pdev->dev;
  261. dev = bus->priv;
  262. dev->regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  263. if (!dev->regs) {
  264. dev_err(&pdev->dev, "Unable to remap SMI register\n");
  265. return -ENODEV;
  266. }
  267. init_waitqueue_head(&dev->smi_busy_wait);
  268. for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {
  269. dev->clk[i] = of_clk_get(pdev->dev.of_node, i);
  270. if (PTR_ERR(dev->clk[i]) == -EPROBE_DEFER) {
  271. ret = -EPROBE_DEFER;
  272. goto out_clk;
  273. }
  274. if (IS_ERR(dev->clk[i]))
  275. break;
  276. clk_prepare_enable(dev->clk[i]);
  277. }
  278. dev->err_interrupt = platform_get_irq(pdev, 0);
  279. if (dev->err_interrupt > 0 &&
  280. resource_size(r) < MVMDIO_ERR_INT_MASK + 4) {
  281. dev_err(&pdev->dev,
  282. "disabling interrupt, resource size is too small\n");
  283. dev->err_interrupt = 0;
  284. }
  285. if (dev->err_interrupt > 0) {
  286. ret = devm_request_irq(&pdev->dev, dev->err_interrupt,
  287. orion_mdio_err_irq,
  288. IRQF_SHARED, pdev->name, dev);
  289. if (ret)
  290. goto out_mdio;
  291. writel(MVMDIO_ERR_INT_SMI_DONE,
  292. dev->regs + MVMDIO_ERR_INT_MASK);
  293. } else if (dev->err_interrupt == -EPROBE_DEFER) {
  294. ret = -EPROBE_DEFER;
  295. goto out_mdio;
  296. }
  297. ret = of_mdiobus_register(bus, pdev->dev.of_node);
  298. if (ret < 0) {
  299. dev_err(&pdev->dev, "Cannot register MDIO bus (%d)\n", ret);
  300. goto out_mdio;
  301. }
  302. platform_set_drvdata(pdev, bus);
  303. return 0;
  304. out_mdio:
  305. if (dev->err_interrupt > 0)
  306. writel(0, dev->regs + MVMDIO_ERR_INT_MASK);
  307. out_clk:
  308. for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {
  309. if (IS_ERR(dev->clk[i]))
  310. break;
  311. clk_disable_unprepare(dev->clk[i]);
  312. clk_put(dev->clk[i]);
  313. }
  314. return ret;
  315. }
  316. static int orion_mdio_remove(struct platform_device *pdev)
  317. {
  318. struct mii_bus *bus = platform_get_drvdata(pdev);
  319. struct orion_mdio_dev *dev = bus->priv;
  320. int i;
  321. if (dev->err_interrupt > 0)
  322. writel(0, dev->regs + MVMDIO_ERR_INT_MASK);
  323. mdiobus_unregister(bus);
  324. for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {
  325. if (IS_ERR(dev->clk[i]))
  326. break;
  327. clk_disable_unprepare(dev->clk[i]);
  328. clk_put(dev->clk[i]);
  329. }
  330. return 0;
  331. }
  332. static const struct of_device_id orion_mdio_match[] = {
  333. { .compatible = "marvell,orion-mdio", .data = (void *)BUS_TYPE_SMI },
  334. { .compatible = "marvell,xmdio", .data = (void *)BUS_TYPE_XSMI },
  335. { }
  336. };
  337. MODULE_DEVICE_TABLE(of, orion_mdio_match);
  338. static struct platform_driver orion_mdio_driver = {
  339. .probe = orion_mdio_probe,
  340. .remove = orion_mdio_remove,
  341. .driver = {
  342. .name = "orion-mdio",
  343. .of_match_table = orion_mdio_match,
  344. },
  345. };
  346. module_platform_driver(orion_mdio_driver);
  347. MODULE_DESCRIPTION("Marvell MDIO interface driver");
  348. MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
  349. MODULE_LICENSE("GPL");
  350. MODULE_ALIAS("platform:orion-mdio");