hns_dsaf_xgmac.c 32 KB

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  1. /*
  2. * Copyright (c) 2014-2015 Hisilicon Limited.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. */
  9. #include <linux/io-64-nonatomic-hi-lo.h>
  10. #include <linux/of_mdio.h>
  11. #include "hns_dsaf_main.h"
  12. #include "hns_dsaf_mac.h"
  13. #include "hns_dsaf_xgmac.h"
  14. #include "hns_dsaf_reg.h"
  15. static const struct mac_stats_string g_xgmac_stats_string[] = {
  16. {"xgmac_tx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(tx_fragment_err)},
  17. {"xgmac_tx_good_pkts_minto64", MAC_STATS_FIELD_OFF(tx_undersize)},
  18. {"xgmac_tx_total_pkts_minto64", MAC_STATS_FIELD_OFF(tx_under_min_pkts)},
  19. {"xgmac_tx_pkts_64", MAC_STATS_FIELD_OFF(tx_64bytes)},
  20. {"xgmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)},
  21. {"xgmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)},
  22. {"xgmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)},
  23. {"xgmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)},
  24. {"xgmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)},
  25. {"xgmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)},
  26. {"xgmac_tx_good_pkts_1519tomax",
  27. MAC_STATS_FIELD_OFF(tx_1519tomax_good)},
  28. {"xgmac_tx_good_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_oversize)},
  29. {"xgmac_tx_bad_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_jabber_err)},
  30. {"xgmac_tx_good_pkts_all", MAC_STATS_FIELD_OFF(tx_good_pkts)},
  31. {"xgmac_tx_good_byte_all", MAC_STATS_FIELD_OFF(tx_good_bytes)},
  32. {"xgmac_tx_total_pkt", MAC_STATS_FIELD_OFF(tx_total_pkts)},
  33. {"xgmac_tx_total_byt", MAC_STATS_FIELD_OFF(tx_total_bytes)},
  34. {"xgmac_tx_uc_pkt", MAC_STATS_FIELD_OFF(tx_uc_pkts)},
  35. {"xgmac_tx_mc_pkt", MAC_STATS_FIELD_OFF(tx_mc_pkts)},
  36. {"xgmac_tx_bc_pkt", MAC_STATS_FIELD_OFF(tx_bc_pkts)},
  37. {"xgmac_tx_pause_frame_num", MAC_STATS_FIELD_OFF(tx_pfc_tc0)},
  38. {"xgmac_tx_pfc_per_1pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc1)},
  39. {"xgmac_tx_pfc_per_2pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc2)},
  40. {"xgmac_tx_pfc_per_3pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc3)},
  41. {"xgmac_tx_pfc_per_4pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc4)},
  42. {"xgmac_tx_pfc_per_5pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc5)},
  43. {"xgmac_tx_pfc_per_6pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc6)},
  44. {"xgmac_tx_pfc_per_7pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc7)},
  45. {"xgmac_tx_mac_ctrol_frame", MAC_STATS_FIELD_OFF(tx_ctrl)},
  46. {"xgmac_tx_1731_pkts", MAC_STATS_FIELD_OFF(tx_1731_pkts)},
  47. {"xgmac_tx_1588_pkts", MAC_STATS_FIELD_OFF(tx_1588_pkts)},
  48. {"xgmac_rx_good_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_good_from_sw)},
  49. {"xgmac_rx_bad_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_bad_from_sw)},
  50. {"xgmac_tx_bad_pkt_64tomax", MAC_STATS_FIELD_OFF(tx_bad_pkts)},
  51. {"xgmac_rx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(rx_fragment_err)},
  52. {"xgmac_rx_good_pkts_minto64", MAC_STATS_FIELD_OFF(rx_undersize)},
  53. {"xgmac_rx_total_pkts_minto64", MAC_STATS_FIELD_OFF(rx_under_min)},
  54. {"xgmac_rx_pkt_64", MAC_STATS_FIELD_OFF(rx_64bytes)},
  55. {"xgmac_rx_pkt_65to127", MAC_STATS_FIELD_OFF(rx_65to127)},
  56. {"xgmac_rx_pkt_128to255", MAC_STATS_FIELD_OFF(rx_128to255)},
  57. {"xgmac_rx_pkt_256to511", MAC_STATS_FIELD_OFF(rx_256to511)},
  58. {"xgmac_rx_pkt_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)},
  59. {"xgmac_rx_pkt_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)},
  60. {"xgmac_rx_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)},
  61. {"xgmac_rx_good_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax_good)},
  62. {"xgmac_rx_good_pkt_untramax", MAC_STATS_FIELD_OFF(rx_oversize)},
  63. {"xgmac_rx_bad_pkt_untramax", MAC_STATS_FIELD_OFF(rx_jabber_err)},
  64. {"xgmac_rx_good_pkt", MAC_STATS_FIELD_OFF(rx_good_pkts)},
  65. {"xgmac_rx_good_byt", MAC_STATS_FIELD_OFF(rx_good_bytes)},
  66. {"xgmac_rx_pkt", MAC_STATS_FIELD_OFF(rx_total_pkts)},
  67. {"xgmac_rx_byt", MAC_STATS_FIELD_OFF(rx_total_bytes)},
  68. {"xgmac_rx_uc_pkt", MAC_STATS_FIELD_OFF(rx_uc_pkts)},
  69. {"xgmac_rx_mc_pkt", MAC_STATS_FIELD_OFF(rx_mc_pkts)},
  70. {"xgmac_rx_bc_pkt", MAC_STATS_FIELD_OFF(rx_bc_pkts)},
  71. {"xgmac_rx_pause_frame_num", MAC_STATS_FIELD_OFF(rx_pfc_tc0)},
  72. {"xgmac_rx_pfc_per_1pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc1)},
  73. {"xgmac_rx_pfc_per_2pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc2)},
  74. {"xgmac_rx_pfc_per_3pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc3)},
  75. {"xgmac_rx_pfc_per_4pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc4)},
  76. {"xgmac_rx_pfc_per_5pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc5)},
  77. {"xgmac_rx_pfc_per_6pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc6)},
  78. {"xgmac_rx_pfc_per_7pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc7)},
  79. {"xgmac_rx_mac_control", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)},
  80. {"xgmac_tx_good_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_good_to_sw)},
  81. {"xgmac_tx_bad_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_bad_to_sw)},
  82. {"xgmac_rx_1731_pkt", MAC_STATS_FIELD_OFF(rx_1731_pkts)},
  83. {"xgmac_rx_symbol_err_pkt", MAC_STATS_FIELD_OFF(rx_symbol_err)},
  84. {"xgmac_rx_fcs_pkt", MAC_STATS_FIELD_OFF(rx_fcs_err)}
  85. };
  86. /**
  87. *hns_xgmac_tx_enable - xgmac port tx enable
  88. *@drv: mac driver
  89. *@value: value of enable
  90. */
  91. static void hns_xgmac_tx_enable(struct mac_driver *drv, u32 value)
  92. {
  93. dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_TX_B, !!value);
  94. }
  95. /**
  96. *hns_xgmac_rx_enable - xgmac port rx enable
  97. *@drv: mac driver
  98. *@value: value of enable
  99. */
  100. static void hns_xgmac_rx_enable(struct mac_driver *drv, u32 value)
  101. {
  102. dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_RX_B, !!value);
  103. }
  104. /**
  105. * hns_xgmac_tx_lf_rf_insert - insert lf rf control about xgmac
  106. * @mac_drv: mac driver
  107. * @mode: inserf rf or lf
  108. */
  109. static void hns_xgmac_lf_rf_insert(struct mac_driver *mac_drv, u32 mode)
  110. {
  111. dsaf_set_dev_field(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG,
  112. XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, mode);
  113. }
  114. /**
  115. * hns_xgmac__lf_rf_control_init - initial the lf rf control register
  116. * @mac_drv: mac driver
  117. */
  118. static void hns_xgmac_lf_rf_control_init(struct mac_driver *mac_drv)
  119. {
  120. u32 val = 0;
  121. dsaf_set_bit(val, XGMAC_UNIDIR_EN_B, 0);
  122. dsaf_set_bit(val, XGMAC_RF_TX_EN_B, 1);
  123. dsaf_set_field(val, XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, 0);
  124. dsaf_write_dev(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG, val);
  125. }
  126. /**
  127. *hns_xgmac_enable - enable xgmac port
  128. *@drv: mac driver
  129. *@mode: mode of mac port
  130. */
  131. static void hns_xgmac_enable(void *mac_drv, enum mac_commom_mode mode)
  132. {
  133. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  134. hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_NO_LF_RF_INSERT);
  135. /*enable XGE rX/tX */
  136. if (mode == MAC_COMM_MODE_TX) {
  137. hns_xgmac_tx_enable(drv, 1);
  138. } else if (mode == MAC_COMM_MODE_RX) {
  139. hns_xgmac_rx_enable(drv, 1);
  140. } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
  141. hns_xgmac_tx_enable(drv, 1);
  142. hns_xgmac_rx_enable(drv, 1);
  143. } else {
  144. dev_err(drv->dev, "error mac mode:%d\n", mode);
  145. }
  146. }
  147. /**
  148. *hns_xgmac_disable - disable xgmac port
  149. *@mac_drv: mac driver
  150. *@mode: mode of mac port
  151. */
  152. static void hns_xgmac_disable(void *mac_drv, enum mac_commom_mode mode)
  153. {
  154. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  155. if (mode == MAC_COMM_MODE_TX) {
  156. hns_xgmac_tx_enable(drv, 0);
  157. } else if (mode == MAC_COMM_MODE_RX) {
  158. hns_xgmac_rx_enable(drv, 0);
  159. } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
  160. hns_xgmac_tx_enable(drv, 0);
  161. hns_xgmac_rx_enable(drv, 0);
  162. }
  163. hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_LF_INSERT);
  164. }
  165. /**
  166. *hns_xgmac_pma_fec_enable - xgmac PMA FEC enable
  167. *@drv: mac driver
  168. *@tx_value: tx value
  169. *@rx_value: rx value
  170. *return status
  171. */
  172. static void hns_xgmac_pma_fec_enable(struct mac_driver *drv, u32 tx_value,
  173. u32 rx_value)
  174. {
  175. u32 origin = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
  176. dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_TX_B, !!tx_value);
  177. dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_RX_B, !!rx_value);
  178. dsaf_write_dev(drv, XGMAC_PMA_FEC_CONTROL_REG, origin);
  179. }
  180. /* clr exc irq for xge*/
  181. static void hns_xgmac_exc_irq_en(struct mac_driver *drv, u32 en)
  182. {
  183. u32 clr_vlue = 0xfffffffful;
  184. u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/
  185. dsaf_write_dev(drv, XGMAC_INT_STATUS_REG, clr_vlue);
  186. dsaf_write_dev(drv, XGMAC_INT_ENABLE_REG, msk_vlue);
  187. }
  188. /**
  189. *hns_xgmac_init - initialize XGE
  190. *@mac_drv: mac driver
  191. */
  192. static void hns_xgmac_init(void *mac_drv)
  193. {
  194. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  195. struct dsaf_device *dsaf_dev
  196. = (struct dsaf_device *)dev_get_drvdata(drv->dev);
  197. u32 port = drv->mac_id;
  198. dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 0);
  199. msleep(100);
  200. dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 1);
  201. msleep(100);
  202. hns_xgmac_lf_rf_control_init(drv);
  203. hns_xgmac_exc_irq_en(drv, 0);
  204. hns_xgmac_pma_fec_enable(drv, 0x0, 0x0);
  205. hns_xgmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
  206. }
  207. /**
  208. *hns_xgmac_config_pad_and_crc - set xgmac pad and crc enable the same time
  209. *@mac_drv: mac driver
  210. *@newval:enable of pad and crc
  211. */
  212. static void hns_xgmac_config_pad_and_crc(void *mac_drv, u8 newval)
  213. {
  214. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  215. u32 origin = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
  216. dsaf_set_bit(origin, XGMAC_CTL_TX_PAD_B, !!newval);
  217. dsaf_set_bit(origin, XGMAC_CTL_TX_FCS_B, !!newval);
  218. dsaf_set_bit(origin, XGMAC_CTL_RX_FCS_B, !!newval);
  219. dsaf_write_dev(drv, XGMAC_MAC_CONTROL_REG, origin);
  220. }
  221. /**
  222. *hns_xgmac_pausefrm_cfg - set pause param about xgmac
  223. *@mac_drv: mac driver
  224. *@newval:enable of pad and crc
  225. */
  226. static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en)
  227. {
  228. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  229. u32 origin = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
  230. dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en);
  231. dsaf_set_bit(origin, XGMAC_PAUSE_CTL_RX_B, !!rx_en);
  232. dsaf_write_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG, origin);
  233. }
  234. static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv, char *mac_addr)
  235. {
  236. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  237. u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
  238. u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
  239. | (mac_addr[3] << 16) | (mac_addr[2] << 24);
  240. dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG, low_val);
  241. dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG, high_val);
  242. }
  243. /**
  244. *hns_xgmac_set_rx_ignore_pause_frames - set rx pause param about xgmac
  245. *@mac_drv: mac driver
  246. *@enable:enable rx pause param
  247. */
  248. static void hns_xgmac_set_rx_ignore_pause_frames(void *mac_drv, u32 enable)
  249. {
  250. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  251. dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,
  252. XGMAC_PAUSE_CTL_RX_B, !!enable);
  253. }
  254. /**
  255. *hns_xgmac_set_tx_auto_pause_frames - set tx pause param about xgmac
  256. *@mac_drv: mac driver
  257. *@enable:enable tx pause param
  258. */
  259. static void hns_xgmac_set_tx_auto_pause_frames(void *mac_drv, u16 enable)
  260. {
  261. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  262. dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,
  263. XGMAC_PAUSE_CTL_TX_B, !!enable);
  264. /*if enable is not zero ,set tx pause time */
  265. if (enable)
  266. dsaf_write_dev(drv, XGMAC_MAC_PAUSE_TIME_REG, enable);
  267. }
  268. /**
  269. *hns_xgmac_config_max_frame_length - set xgmac max frame length
  270. *@mac_drv: mac driver
  271. *@newval:xgmac max frame length
  272. */
  273. static void hns_xgmac_config_max_frame_length(void *mac_drv, u16 newval)
  274. {
  275. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  276. dsaf_write_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG, newval);
  277. }
  278. static void hns_xgmac_update_stats(void *mac_drv)
  279. {
  280. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  281. struct mac_hw_stats *hw_stats = &drv->mac_cb->hw_stats;
  282. /* TX */
  283. hw_stats->tx_fragment_err
  284. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
  285. hw_stats->tx_undersize
  286. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
  287. hw_stats->tx_under_min_pkts
  288. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
  289. hw_stats->tx_64bytes = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
  290. hw_stats->tx_65to127
  291. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
  292. hw_stats->tx_128to255
  293. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
  294. hw_stats->tx_256to511
  295. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
  296. hw_stats->tx_512to1023
  297. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
  298. hw_stats->tx_1024to1518
  299. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
  300. hw_stats->tx_1519tomax
  301. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
  302. hw_stats->tx_1519tomax_good
  303. = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
  304. hw_stats->tx_oversize = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
  305. hw_stats->tx_jabber_err = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
  306. hw_stats->tx_good_pkts = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
  307. hw_stats->tx_good_bytes = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
  308. hw_stats->tx_total_pkts = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
  309. hw_stats->tx_total_bytes
  310. = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
  311. hw_stats->tx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
  312. hw_stats->tx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
  313. hw_stats->tx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
  314. hw_stats->tx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
  315. hw_stats->tx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
  316. hw_stats->tx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
  317. hw_stats->tx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
  318. hw_stats->tx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
  319. hw_stats->tx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
  320. hw_stats->tx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
  321. hw_stats->tx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
  322. hw_stats->tx_ctrl = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
  323. hw_stats->tx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
  324. hw_stats->tx_1588_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
  325. hw_stats->rx_good_from_sw
  326. = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
  327. hw_stats->rx_bad_from_sw
  328. = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
  329. hw_stats->tx_bad_pkts = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
  330. /* RX */
  331. hw_stats->rx_fragment_err
  332. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
  333. hw_stats->rx_undersize
  334. = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
  335. hw_stats->rx_under_min
  336. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
  337. hw_stats->rx_64bytes = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
  338. hw_stats->rx_65to127
  339. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
  340. hw_stats->rx_128to255
  341. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
  342. hw_stats->rx_256to511
  343. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
  344. hw_stats->rx_512to1023
  345. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
  346. hw_stats->rx_1024to1518
  347. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
  348. hw_stats->rx_1519tomax
  349. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
  350. hw_stats->rx_1519tomax_good
  351. = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
  352. hw_stats->rx_oversize = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
  353. hw_stats->rx_jabber_err = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
  354. hw_stats->rx_good_pkts = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
  355. hw_stats->rx_good_bytes = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
  356. hw_stats->rx_total_pkts = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
  357. hw_stats->rx_total_bytes
  358. = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
  359. hw_stats->rx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
  360. hw_stats->rx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
  361. hw_stats->rx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
  362. hw_stats->rx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
  363. hw_stats->rx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
  364. hw_stats->rx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
  365. hw_stats->rx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
  366. hw_stats->rx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
  367. hw_stats->rx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
  368. hw_stats->rx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
  369. hw_stats->rx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
  370. hw_stats->rx_unknown_ctrl
  371. = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
  372. hw_stats->tx_good_to_sw
  373. = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
  374. hw_stats->tx_bad_to_sw
  375. = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
  376. hw_stats->rx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
  377. hw_stats->rx_symbol_err
  378. = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
  379. hw_stats->rx_fcs_err = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
  380. }
  381. /**
  382. *hns_xgmac_free - free xgmac driver
  383. *@mac_drv: mac driver
  384. */
  385. static void hns_xgmac_free(void *mac_drv)
  386. {
  387. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  388. struct dsaf_device *dsaf_dev
  389. = (struct dsaf_device *)dev_get_drvdata(drv->dev);
  390. u32 mac_id = drv->mac_id;
  391. dsaf_dev->misc_op->xge_srst(dsaf_dev, mac_id, 0);
  392. }
  393. /**
  394. *hns_xgmac_get_info - get xgmac information
  395. *@mac_drv: mac driver
  396. *@mac_info:mac information
  397. */
  398. static void hns_xgmac_get_info(void *mac_drv, struct mac_info *mac_info)
  399. {
  400. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  401. u32 pause_time, pause_ctrl, port_mode, ctrl_val;
  402. ctrl_val = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
  403. mac_info->pad_and_crc_en = dsaf_get_bit(ctrl_val, XGMAC_CTL_TX_PAD_B);
  404. mac_info->auto_neg = 0;
  405. pause_time = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
  406. mac_info->tx_pause_time = pause_time;
  407. port_mode = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
  408. mac_info->port_en = dsaf_get_field(port_mode, XGMAC_PORT_MODE_TX_M,
  409. XGMAC_PORT_MODE_TX_S) &&
  410. dsaf_get_field(port_mode, XGMAC_PORT_MODE_RX_M,
  411. XGMAC_PORT_MODE_RX_S);
  412. mac_info->duplex = 1;
  413. mac_info->speed = MAC_SPEED_10000;
  414. pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
  415. mac_info->rx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
  416. mac_info->tx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
  417. }
  418. /**
  419. *hns_xgmac_get_pausefrm_cfg - get xgmac pause param
  420. *@mac_drv: mac driver
  421. *@rx_en:xgmac rx pause enable
  422. *@tx_en:xgmac tx pause enable
  423. */
  424. static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en)
  425. {
  426. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  427. u32 pause_ctrl;
  428. pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
  429. *rx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
  430. *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
  431. }
  432. /**
  433. *hns_xgmac_get_link_status - get xgmac link status
  434. *@mac_drv: mac driver
  435. *@link_stat: xgmac link stat
  436. */
  437. static void hns_xgmac_get_link_status(void *mac_drv, u32 *link_stat)
  438. {
  439. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  440. *link_stat = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
  441. }
  442. /**
  443. *hns_xgmac_get_regs - dump xgmac regs
  444. *@mac_drv: mac driver
  445. *@cmd:ethtool cmd
  446. *@data:data for value of regs
  447. */
  448. static void hns_xgmac_get_regs(void *mac_drv, void *data)
  449. {
  450. u32 i = 0;
  451. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  452. u32 *regs = data;
  453. u64 qtmp;
  454. /* base config registers */
  455. regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG);
  456. regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG);
  457. regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG);
  458. regs[3] = dsaf_read_dev(drv, XGMAC_IERR_U_INFO_REG);
  459. regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG);
  460. regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG);
  461. regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
  462. regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG);
  463. regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG);
  464. regs[9] = dsaf_read_dev(drv, XGMAC_LINK_CONTROL_REG);
  465. regs[10] = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
  466. regs[11] = dsaf_read_dev(drv, XGMAC_SPARE_REG);
  467. regs[12] = dsaf_read_dev(drv, XGMAC_SPARE_CNT_REG);
  468. regs[13] = dsaf_read_dev(drv, XGMAC_MAC_ENABLE_REG);
  469. regs[14] = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
  470. regs[15] = dsaf_read_dev(drv, XGMAC_MAC_IPG_REG);
  471. regs[16] = dsaf_read_dev(drv, XGMAC_MAC_MSG_CRC_EN_REG);
  472. regs[17] = dsaf_read_dev(drv, XGMAC_MAC_MSG_IMG_REG);
  473. regs[18] = dsaf_read_dev(drv, XGMAC_MAC_MSG_FC_CFG_REG);
  474. regs[19] = dsaf_read_dev(drv, XGMAC_MAC_MSG_TC_CFG_REG);
  475. regs[20] = dsaf_read_dev(drv, XGMAC_MAC_PAD_SIZE_REG);
  476. regs[21] = dsaf_read_dev(drv, XGMAC_MAC_MIN_PKT_SIZE_REG);
  477. regs[22] = dsaf_read_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG);
  478. regs[23] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
  479. regs[24] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
  480. regs[25] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_GAP_REG);
  481. regs[26] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG);
  482. regs[27] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG);
  483. regs[28] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_H_REG);
  484. regs[29] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_L_REG);
  485. regs[30] = dsaf_read_dev(drv, XGMAC_MAC_PFC_PRI_EN_REG);
  486. regs[31] = dsaf_read_dev(drv, XGMAC_MAC_1588_CTRL_REG);
  487. regs[32] = dsaf_read_dev(drv, XGMAC_MAC_1588_TX_PORT_DLY_REG);
  488. regs[33] = dsaf_read_dev(drv, XGMAC_MAC_1588_RX_PORT_DLY_REG);
  489. regs[34] = dsaf_read_dev(drv, XGMAC_MAC_1588_ASYM_DLY_REG);
  490. regs[35] = dsaf_read_dev(drv, XGMAC_MAC_1588_ADJUST_CFG_REG);
  491. regs[36] = dsaf_read_dev(drv, XGMAC_MAC_Y1731_ETH_TYPE_REG);
  492. regs[37] = dsaf_read_dev(drv, XGMAC_MAC_MIB_CONTROL_REG);
  493. regs[38] = dsaf_read_dev(drv, XGMAC_MAC_WAN_RATE_ADJUST_REG);
  494. regs[39] = dsaf_read_dev(drv, XGMAC_MAC_TX_ERR_MARK_REG);
  495. regs[40] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG);
  496. regs[41] = dsaf_read_dev(drv, XGMAC_MAC_RX_LF_RF_STATUS_REG);
  497. regs[42] = dsaf_read_dev(drv, XGMAC_MAC_TX_RUNT_PKT_CNT_REG);
  498. regs[43] = dsaf_read_dev(drv, XGMAC_MAC_RX_RUNT_PKT_CNT_REG);
  499. regs[44] = dsaf_read_dev(drv, XGMAC_MAC_RX_PREAM_ERR_PKT_CNT_REG);
  500. regs[45] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_TERM_PKT_CNT_REG);
  501. regs[46] = dsaf_read_dev(drv, XGMAC_MAC_TX_SN_MISMATCH_PKT_CNT_REG);
  502. regs[47] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_MSG_CNT_REG);
  503. regs[48] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_EFD_CNT_REG);
  504. regs[49] = dsaf_read_dev(drv, XGMAC_MAC_ERR_INFO_REG);
  505. regs[50] = dsaf_read_dev(drv, XGMAC_MAC_DBG_INFO_REG);
  506. regs[51] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SYNC_THD_REG);
  507. regs[52] = dsaf_read_dev(drv, XGMAC_PCS_STATUS1_REG);
  508. regs[53] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS1_REG);
  509. regs[54] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS2_REG);
  510. regs[55] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_0_REG);
  511. regs[56] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_1_REG);
  512. regs[57] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_0_REG);
  513. regs[58] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_1_REG);
  514. regs[59] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_CONTROL_REG);
  515. regs[60] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_ERR_CNT_REG);
  516. regs[61] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO_REG);
  517. regs[62] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO1_REG);
  518. regs[63] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO2_REG);
  519. regs[64] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO3_REG);
  520. regs[65] = dsaf_read_dev(drv, XGMAC_PMA_ENABLE_REG);
  521. regs[66] = dsaf_read_dev(drv, XGMAC_PMA_CONTROL_REG);
  522. regs[67] = dsaf_read_dev(drv, XGMAC_PMA_SIGNAL_STATUS_REG);
  523. regs[68] = dsaf_read_dev(drv, XGMAC_PMA_DBG_INFO_REG);
  524. regs[69] = dsaf_read_dev(drv, XGMAC_PMA_FEC_ABILITY_REG);
  525. regs[70] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
  526. regs[71] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CORR_BLOCK_CNT__REG);
  527. regs[72] = dsaf_read_dev(drv, XGMAC_PMA_FEC_UNCORR_BLOCK_CNT__REG);
  528. /* status registers */
  529. #define hns_xgmac_cpy_q(p, q) \
  530. do {\
  531. *(p) = (u32)(q);\
  532. *((p) + 1) = (u32)((q) >> 32);\
  533. } while (0)
  534. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
  535. hns_xgmac_cpy_q(&regs[73], qtmp);
  536. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
  537. hns_xgmac_cpy_q(&regs[75], qtmp);
  538. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
  539. hns_xgmac_cpy_q(&regs[77], qtmp);
  540. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
  541. hns_xgmac_cpy_q(&regs[79], qtmp);
  542. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
  543. hns_xgmac_cpy_q(&regs[81], qtmp);
  544. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
  545. hns_xgmac_cpy_q(&regs[83], qtmp);
  546. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
  547. hns_xgmac_cpy_q(&regs[85], qtmp);
  548. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
  549. hns_xgmac_cpy_q(&regs[87], qtmp);
  550. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
  551. hns_xgmac_cpy_q(&regs[89], qtmp);
  552. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
  553. hns_xgmac_cpy_q(&regs[91], qtmp);
  554. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
  555. hns_xgmac_cpy_q(&regs[93], qtmp);
  556. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
  557. hns_xgmac_cpy_q(&regs[95], qtmp);
  558. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
  559. hns_xgmac_cpy_q(&regs[97], qtmp);
  560. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
  561. hns_xgmac_cpy_q(&regs[99], qtmp);
  562. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
  563. hns_xgmac_cpy_q(&regs[101], qtmp);
  564. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
  565. hns_xgmac_cpy_q(&regs[103], qtmp);
  566. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
  567. hns_xgmac_cpy_q(&regs[105], qtmp);
  568. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
  569. hns_xgmac_cpy_q(&regs[107], qtmp);
  570. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
  571. hns_xgmac_cpy_q(&regs[109], qtmp);
  572. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
  573. hns_xgmac_cpy_q(&regs[111], qtmp);
  574. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
  575. hns_xgmac_cpy_q(&regs[113], qtmp);
  576. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
  577. hns_xgmac_cpy_q(&regs[115], qtmp);
  578. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
  579. hns_xgmac_cpy_q(&regs[117], qtmp);
  580. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
  581. hns_xgmac_cpy_q(&regs[119], qtmp);
  582. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
  583. hns_xgmac_cpy_q(&regs[121], qtmp);
  584. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
  585. hns_xgmac_cpy_q(&regs[123], qtmp);
  586. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
  587. hns_xgmac_cpy_q(&regs[125], qtmp);
  588. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
  589. hns_xgmac_cpy_q(&regs[127], qtmp);
  590. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
  591. hns_xgmac_cpy_q(&regs[129], qtmp);
  592. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
  593. hns_xgmac_cpy_q(&regs[131], qtmp);
  594. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
  595. hns_xgmac_cpy_q(&regs[133], qtmp);
  596. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
  597. hns_xgmac_cpy_q(&regs[135], qtmp);
  598. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
  599. hns_xgmac_cpy_q(&regs[137], qtmp);
  600. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
  601. hns_xgmac_cpy_q(&regs[139], qtmp);
  602. /* RX */
  603. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
  604. hns_xgmac_cpy_q(&regs[141], qtmp);
  605. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
  606. hns_xgmac_cpy_q(&regs[143], qtmp);
  607. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
  608. hns_xgmac_cpy_q(&regs[145], qtmp);
  609. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
  610. hns_xgmac_cpy_q(&regs[147], qtmp);
  611. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
  612. hns_xgmac_cpy_q(&regs[149], qtmp);
  613. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
  614. hns_xgmac_cpy_q(&regs[151], qtmp);
  615. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
  616. hns_xgmac_cpy_q(&regs[153], qtmp);
  617. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
  618. hns_xgmac_cpy_q(&regs[155], qtmp);
  619. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
  620. hns_xgmac_cpy_q(&regs[157], qtmp);
  621. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
  622. hns_xgmac_cpy_q(&regs[159], qtmp);
  623. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
  624. hns_xgmac_cpy_q(&regs[161], qtmp);
  625. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
  626. hns_xgmac_cpy_q(&regs[163], qtmp);
  627. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
  628. hns_xgmac_cpy_q(&regs[165], qtmp);
  629. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
  630. hns_xgmac_cpy_q(&regs[167], qtmp);
  631. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
  632. hns_xgmac_cpy_q(&regs[169], qtmp);
  633. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
  634. hns_xgmac_cpy_q(&regs[171], qtmp);
  635. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
  636. hns_xgmac_cpy_q(&regs[173], qtmp);
  637. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
  638. hns_xgmac_cpy_q(&regs[175], qtmp);
  639. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
  640. hns_xgmac_cpy_q(&regs[177], qtmp);
  641. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
  642. hns_xgmac_cpy_q(&regs[179], qtmp);
  643. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
  644. hns_xgmac_cpy_q(&regs[181], qtmp);
  645. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
  646. hns_xgmac_cpy_q(&regs[183], qtmp);
  647. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
  648. hns_xgmac_cpy_q(&regs[185], qtmp);
  649. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
  650. hns_xgmac_cpy_q(&regs[187], qtmp);
  651. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
  652. hns_xgmac_cpy_q(&regs[189], qtmp);
  653. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
  654. hns_xgmac_cpy_q(&regs[191], qtmp);
  655. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
  656. hns_xgmac_cpy_q(&regs[193], qtmp);
  657. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
  658. hns_xgmac_cpy_q(&regs[195], qtmp);
  659. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
  660. hns_xgmac_cpy_q(&regs[197], qtmp);
  661. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
  662. hns_xgmac_cpy_q(&regs[199], qtmp);
  663. qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
  664. hns_xgmac_cpy_q(&regs[201], qtmp);
  665. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
  666. hns_xgmac_cpy_q(&regs[203], qtmp);
  667. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
  668. hns_xgmac_cpy_q(&regs[205], qtmp);
  669. qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
  670. hns_xgmac_cpy_q(&regs[207], qtmp);
  671. /* mark end of mac regs */
  672. for (i = 208; i < 214; i++)
  673. regs[i] = 0xaaaaaaaa;
  674. }
  675. /**
  676. *hns_xgmac_get_stats - get xgmac statistic
  677. *@mac_drv: mac driver
  678. *@data:data for value of stats regs
  679. */
  680. static void hns_xgmac_get_stats(void *mac_drv, u64 *data)
  681. {
  682. u32 i;
  683. u64 *buf = data;
  684. struct mac_driver *drv = (struct mac_driver *)mac_drv;
  685. struct mac_hw_stats *hw_stats = NULL;
  686. hw_stats = &drv->mac_cb->hw_stats;
  687. for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) {
  688. buf[i] = DSAF_STATS_READ(hw_stats,
  689. g_xgmac_stats_string[i].offset);
  690. }
  691. }
  692. /**
  693. *hns_xgmac_get_strings - get xgmac strings name
  694. *@stringset: type of values in data
  695. *@data:data for value of string name
  696. */
  697. static void hns_xgmac_get_strings(u32 stringset, u8 *data)
  698. {
  699. char *buff = (char *)data;
  700. u32 i;
  701. if (stringset != ETH_SS_STATS)
  702. return;
  703. for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) {
  704. snprintf(buff, ETH_GSTRING_LEN, g_xgmac_stats_string[i].desc);
  705. buff = buff + ETH_GSTRING_LEN;
  706. }
  707. }
  708. /**
  709. *hns_xgmac_get_sset_count - get xgmac string set count
  710. *@stringset: type of values in data
  711. *return xgmac string set count
  712. */
  713. static int hns_xgmac_get_sset_count(int stringset)
  714. {
  715. if (stringset == ETH_SS_STATS || stringset == ETH_SS_PRIV_FLAGS)
  716. return ARRAY_SIZE(g_xgmac_stats_string);
  717. return 0;
  718. }
  719. /**
  720. *hns_xgmac_get_regs_count - get xgmac regs count
  721. *return xgmac regs count
  722. */
  723. static int hns_xgmac_get_regs_count(void)
  724. {
  725. return HNS_XGMAC_DUMP_NUM;
  726. }
  727. void *hns_xgmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param)
  728. {
  729. struct mac_driver *mac_drv;
  730. mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL);
  731. if (!mac_drv)
  732. return NULL;
  733. mac_drv->mac_init = hns_xgmac_init;
  734. mac_drv->mac_enable = hns_xgmac_enable;
  735. mac_drv->mac_disable = hns_xgmac_disable;
  736. mac_drv->mac_id = mac_param->mac_id;
  737. mac_drv->mac_mode = mac_param->mac_mode;
  738. mac_drv->io_base = mac_param->vaddr;
  739. mac_drv->dev = mac_param->dev;
  740. mac_drv->mac_cb = mac_cb;
  741. mac_drv->set_mac_addr = hns_xgmac_set_pausefrm_mac_addr;
  742. mac_drv->set_an_mode = NULL;
  743. mac_drv->config_loopback = NULL;
  744. mac_drv->config_pad_and_crc = hns_xgmac_config_pad_and_crc;
  745. mac_drv->config_half_duplex = NULL;
  746. mac_drv->set_rx_ignore_pause_frames =
  747. hns_xgmac_set_rx_ignore_pause_frames;
  748. mac_drv->mac_free = hns_xgmac_free;
  749. mac_drv->adjust_link = NULL;
  750. mac_drv->set_tx_auto_pause_frames = hns_xgmac_set_tx_auto_pause_frames;
  751. mac_drv->config_max_frame_length = hns_xgmac_config_max_frame_length;
  752. mac_drv->mac_pausefrm_cfg = hns_xgmac_pausefrm_cfg;
  753. mac_drv->autoneg_stat = NULL;
  754. mac_drv->get_info = hns_xgmac_get_info;
  755. mac_drv->get_pause_enable = hns_xgmac_get_pausefrm_cfg;
  756. mac_drv->get_link_status = hns_xgmac_get_link_status;
  757. mac_drv->get_regs = hns_xgmac_get_regs;
  758. mac_drv->get_ethtool_stats = hns_xgmac_get_stats;
  759. mac_drv->get_sset_count = hns_xgmac_get_sset_count;
  760. mac_drv->get_regs_count = hns_xgmac_get_regs_count;
  761. mac_drv->get_strings = hns_xgmac_get_strings;
  762. mac_drv->update_stats = hns_xgmac_update_stats;
  763. return (void *)mac_drv;
  764. }