cxgb4_ethtool.c 39 KB

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  1. /*
  2. * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * The full GNU General Public License is included in this distribution in
  14. * the file called "COPYING".
  15. *
  16. */
  17. #include <linux/firmware.h>
  18. #include <linux/mdio.h>
  19. #include "cxgb4.h"
  20. #include "t4_regs.h"
  21. #include "t4fw_api.h"
  22. #include "cxgb4_cudbg.h"
  23. #define EEPROM_MAGIC 0x38E2F10C
  24. static u32 get_msglevel(struct net_device *dev)
  25. {
  26. return netdev2adap(dev)->msg_enable;
  27. }
  28. static void set_msglevel(struct net_device *dev, u32 val)
  29. {
  30. netdev2adap(dev)->msg_enable = val;
  31. }
  32. static const char stats_strings[][ETH_GSTRING_LEN] = {
  33. "tx_octets_ok ",
  34. "tx_frames_ok ",
  35. "tx_broadcast_frames ",
  36. "tx_multicast_frames ",
  37. "tx_unicast_frames ",
  38. "tx_error_frames ",
  39. "tx_frames_64 ",
  40. "tx_frames_65_to_127 ",
  41. "tx_frames_128_to_255 ",
  42. "tx_frames_256_to_511 ",
  43. "tx_frames_512_to_1023 ",
  44. "tx_frames_1024_to_1518 ",
  45. "tx_frames_1519_to_max ",
  46. "tx_frames_dropped ",
  47. "tx_pause_frames ",
  48. "tx_ppp0_frames ",
  49. "tx_ppp1_frames ",
  50. "tx_ppp2_frames ",
  51. "tx_ppp3_frames ",
  52. "tx_ppp4_frames ",
  53. "tx_ppp5_frames ",
  54. "tx_ppp6_frames ",
  55. "tx_ppp7_frames ",
  56. "rx_octets_ok ",
  57. "rx_frames_ok ",
  58. "rx_broadcast_frames ",
  59. "rx_multicast_frames ",
  60. "rx_unicast_frames ",
  61. "rx_frames_too_long ",
  62. "rx_jabber_errors ",
  63. "rx_fcs_errors ",
  64. "rx_length_errors ",
  65. "rx_symbol_errors ",
  66. "rx_runt_frames ",
  67. "rx_frames_64 ",
  68. "rx_frames_65_to_127 ",
  69. "rx_frames_128_to_255 ",
  70. "rx_frames_256_to_511 ",
  71. "rx_frames_512_to_1023 ",
  72. "rx_frames_1024_to_1518 ",
  73. "rx_frames_1519_to_max ",
  74. "rx_pause_frames ",
  75. "rx_ppp0_frames ",
  76. "rx_ppp1_frames ",
  77. "rx_ppp2_frames ",
  78. "rx_ppp3_frames ",
  79. "rx_ppp4_frames ",
  80. "rx_ppp5_frames ",
  81. "rx_ppp6_frames ",
  82. "rx_ppp7_frames ",
  83. "rx_bg0_frames_dropped ",
  84. "rx_bg1_frames_dropped ",
  85. "rx_bg2_frames_dropped ",
  86. "rx_bg3_frames_dropped ",
  87. "rx_bg0_frames_trunc ",
  88. "rx_bg1_frames_trunc ",
  89. "rx_bg2_frames_trunc ",
  90. "rx_bg3_frames_trunc ",
  91. "tso ",
  92. "tx_csum_offload ",
  93. "rx_csum_good ",
  94. "vlan_extractions ",
  95. "vlan_insertions ",
  96. "gro_packets ",
  97. "gro_merged ",
  98. };
  99. static char adapter_stats_strings[][ETH_GSTRING_LEN] = {
  100. "db_drop ",
  101. "db_full ",
  102. "db_empty ",
  103. "write_coal_success ",
  104. "write_coal_fail ",
  105. };
  106. static char loopback_stats_strings[][ETH_GSTRING_LEN] = {
  107. "-------Loopback----------- ",
  108. "octets_ok ",
  109. "frames_ok ",
  110. "bcast_frames ",
  111. "mcast_frames ",
  112. "ucast_frames ",
  113. "error_frames ",
  114. "frames_64 ",
  115. "frames_65_to_127 ",
  116. "frames_128_to_255 ",
  117. "frames_256_to_511 ",
  118. "frames_512_to_1023 ",
  119. "frames_1024_to_1518 ",
  120. "frames_1519_to_max ",
  121. "frames_dropped ",
  122. "bg0_frames_dropped ",
  123. "bg1_frames_dropped ",
  124. "bg2_frames_dropped ",
  125. "bg3_frames_dropped ",
  126. "bg0_frames_trunc ",
  127. "bg1_frames_trunc ",
  128. "bg2_frames_trunc ",
  129. "bg3_frames_trunc ",
  130. };
  131. static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = {
  132. [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr",
  133. };
  134. static int get_sset_count(struct net_device *dev, int sset)
  135. {
  136. switch (sset) {
  137. case ETH_SS_STATS:
  138. return ARRAY_SIZE(stats_strings) +
  139. ARRAY_SIZE(adapter_stats_strings) +
  140. ARRAY_SIZE(loopback_stats_strings);
  141. case ETH_SS_PRIV_FLAGS:
  142. return ARRAY_SIZE(cxgb4_priv_flags_strings);
  143. default:
  144. return -EOPNOTSUPP;
  145. }
  146. }
  147. static int get_regs_len(struct net_device *dev)
  148. {
  149. struct adapter *adap = netdev2adap(dev);
  150. return t4_get_regs_len(adap);
  151. }
  152. static int get_eeprom_len(struct net_device *dev)
  153. {
  154. return EEPROMSIZE;
  155. }
  156. static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  157. {
  158. struct adapter *adapter = netdev2adap(dev);
  159. u32 exprom_vers;
  160. strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver));
  161. strlcpy(info->version, cxgb4_driver_version,
  162. sizeof(info->version));
  163. strlcpy(info->bus_info, pci_name(adapter->pdev),
  164. sizeof(info->bus_info));
  165. info->regdump_len = get_regs_len(dev);
  166. if (!adapter->params.fw_vers)
  167. strcpy(info->fw_version, "N/A");
  168. else
  169. snprintf(info->fw_version, sizeof(info->fw_version),
  170. "%u.%u.%u.%u, TP %u.%u.%u.%u",
  171. FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers),
  172. FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers),
  173. FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers),
  174. FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers),
  175. FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers),
  176. FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers),
  177. FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers),
  178. FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers));
  179. if (!t4_get_exprom_version(adapter, &exprom_vers))
  180. snprintf(info->erom_version, sizeof(info->erom_version),
  181. "%u.%u.%u.%u",
  182. FW_HDR_FW_VER_MAJOR_G(exprom_vers),
  183. FW_HDR_FW_VER_MINOR_G(exprom_vers),
  184. FW_HDR_FW_VER_MICRO_G(exprom_vers),
  185. FW_HDR_FW_VER_BUILD_G(exprom_vers));
  186. info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings);
  187. }
  188. static void get_strings(struct net_device *dev, u32 stringset, u8 *data)
  189. {
  190. if (stringset == ETH_SS_STATS) {
  191. memcpy(data, stats_strings, sizeof(stats_strings));
  192. data += sizeof(stats_strings);
  193. memcpy(data, adapter_stats_strings,
  194. sizeof(adapter_stats_strings));
  195. data += sizeof(adapter_stats_strings);
  196. memcpy(data, loopback_stats_strings,
  197. sizeof(loopback_stats_strings));
  198. } else if (stringset == ETH_SS_PRIV_FLAGS) {
  199. memcpy(data, cxgb4_priv_flags_strings,
  200. sizeof(cxgb4_priv_flags_strings));
  201. }
  202. }
  203. /* port stats maintained per queue of the port. They should be in the same
  204. * order as in stats_strings above.
  205. */
  206. struct queue_port_stats {
  207. u64 tso;
  208. u64 tx_csum;
  209. u64 rx_csum;
  210. u64 vlan_ex;
  211. u64 vlan_ins;
  212. u64 gro_pkts;
  213. u64 gro_merged;
  214. };
  215. struct adapter_stats {
  216. u64 db_drop;
  217. u64 db_full;
  218. u64 db_empty;
  219. u64 wc_success;
  220. u64 wc_fail;
  221. };
  222. static void collect_sge_port_stats(const struct adapter *adap,
  223. const struct port_info *p,
  224. struct queue_port_stats *s)
  225. {
  226. int i;
  227. const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset];
  228. const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset];
  229. memset(s, 0, sizeof(*s));
  230. for (i = 0; i < p->nqsets; i++, rx++, tx++) {
  231. s->tso += tx->tso;
  232. s->tx_csum += tx->tx_cso;
  233. s->rx_csum += rx->stats.rx_cso;
  234. s->vlan_ex += rx->stats.vlan_ex;
  235. s->vlan_ins += tx->vlan_ins;
  236. s->gro_pkts += rx->stats.lro_pkts;
  237. s->gro_merged += rx->stats.lro_merged;
  238. }
  239. }
  240. static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s)
  241. {
  242. u64 val1, val2;
  243. memset(s, 0, sizeof(*s));
  244. s->db_drop = adap->db_stats.db_drop;
  245. s->db_full = adap->db_stats.db_full;
  246. s->db_empty = adap->db_stats.db_empty;
  247. if (!is_t4(adap->params.chip)) {
  248. int v;
  249. v = t4_read_reg(adap, SGE_STAT_CFG_A);
  250. if (STATSOURCE_T5_G(v) == 7) {
  251. val2 = t4_read_reg(adap, SGE_STAT_MATCH_A);
  252. val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A);
  253. s->wc_success = val1 - val2;
  254. s->wc_fail = val2;
  255. }
  256. }
  257. }
  258. static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
  259. u64 *data)
  260. {
  261. struct port_info *pi = netdev_priv(dev);
  262. struct adapter *adapter = pi->adapter;
  263. struct lb_port_stats s;
  264. int i;
  265. u64 *p0;
  266. t4_get_port_stats_offset(adapter, pi->tx_chan,
  267. (struct port_stats *)data,
  268. &pi->stats_base);
  269. data += sizeof(struct port_stats) / sizeof(u64);
  270. collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
  271. data += sizeof(struct queue_port_stats) / sizeof(u64);
  272. collect_adapter_stats(adapter, (struct adapter_stats *)data);
  273. data += sizeof(struct adapter_stats) / sizeof(u64);
  274. *data++ = (u64)pi->port_id;
  275. memset(&s, 0, sizeof(s));
  276. t4_get_lb_stats(adapter, pi->port_id, &s);
  277. p0 = &s.octets;
  278. for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++)
  279. *data++ = (unsigned long long)*p0++;
  280. }
  281. static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
  282. void *buf)
  283. {
  284. struct adapter *adap = netdev2adap(dev);
  285. size_t buf_size;
  286. buf_size = t4_get_regs_len(adap);
  287. regs->version = mk_adap_vers(adap);
  288. t4_get_regs(adap, buf, buf_size);
  289. }
  290. static int restart_autoneg(struct net_device *dev)
  291. {
  292. struct port_info *p = netdev_priv(dev);
  293. if (!netif_running(dev))
  294. return -EAGAIN;
  295. if (p->link_cfg.autoneg != AUTONEG_ENABLE)
  296. return -EINVAL;
  297. t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan);
  298. return 0;
  299. }
  300. static int identify_port(struct net_device *dev,
  301. enum ethtool_phys_id_state state)
  302. {
  303. unsigned int val;
  304. struct adapter *adap = netdev2adap(dev);
  305. if (state == ETHTOOL_ID_ACTIVE)
  306. val = 0xffff;
  307. else if (state == ETHTOOL_ID_INACTIVE)
  308. val = 0;
  309. else
  310. return -EINVAL;
  311. return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val);
  312. }
  313. /**
  314. * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool
  315. * @port_type: Firmware Port Type
  316. * @mod_type: Firmware Module Type
  317. *
  318. * Translate Firmware Port/Module type to Ethtool Port Type.
  319. */
  320. static int from_fw_port_mod_type(enum fw_port_type port_type,
  321. enum fw_port_module_type mod_type)
  322. {
  323. if (port_type == FW_PORT_TYPE_BT_SGMII ||
  324. port_type == FW_PORT_TYPE_BT_XFI ||
  325. port_type == FW_PORT_TYPE_BT_XAUI) {
  326. return PORT_TP;
  327. } else if (port_type == FW_PORT_TYPE_FIBER_XFI ||
  328. port_type == FW_PORT_TYPE_FIBER_XAUI) {
  329. return PORT_FIBRE;
  330. } else if (port_type == FW_PORT_TYPE_SFP ||
  331. port_type == FW_PORT_TYPE_QSFP_10G ||
  332. port_type == FW_PORT_TYPE_QSA ||
  333. port_type == FW_PORT_TYPE_QSFP ||
  334. port_type == FW_PORT_TYPE_CR4_QSFP ||
  335. port_type == FW_PORT_TYPE_CR_QSFP ||
  336. port_type == FW_PORT_TYPE_CR2_QSFP ||
  337. port_type == FW_PORT_TYPE_SFP28) {
  338. if (mod_type == FW_PORT_MOD_TYPE_LR ||
  339. mod_type == FW_PORT_MOD_TYPE_SR ||
  340. mod_type == FW_PORT_MOD_TYPE_ER ||
  341. mod_type == FW_PORT_MOD_TYPE_LRM)
  342. return PORT_FIBRE;
  343. else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE ||
  344. mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE)
  345. return PORT_DA;
  346. else
  347. return PORT_OTHER;
  348. } else if (port_type == FW_PORT_TYPE_KR4_100G ||
  349. port_type == FW_PORT_TYPE_KR_SFP28 ||
  350. port_type == FW_PORT_TYPE_KR_XLAUI) {
  351. return PORT_NONE;
  352. }
  353. return PORT_OTHER;
  354. }
  355. /**
  356. * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities
  357. * @speed: speed in Kb/s
  358. *
  359. * Translates a specific Port Speed into a Firmware Port Capabilities
  360. * value.
  361. */
  362. static unsigned int speed_to_fw_caps(int speed)
  363. {
  364. if (speed == 100)
  365. return FW_PORT_CAP32_SPEED_100M;
  366. if (speed == 1000)
  367. return FW_PORT_CAP32_SPEED_1G;
  368. if (speed == 10000)
  369. return FW_PORT_CAP32_SPEED_10G;
  370. if (speed == 25000)
  371. return FW_PORT_CAP32_SPEED_25G;
  372. if (speed == 40000)
  373. return FW_PORT_CAP32_SPEED_40G;
  374. if (speed == 50000)
  375. return FW_PORT_CAP32_SPEED_50G;
  376. if (speed == 100000)
  377. return FW_PORT_CAP32_SPEED_100G;
  378. if (speed == 200000)
  379. return FW_PORT_CAP32_SPEED_200G;
  380. if (speed == 400000)
  381. return FW_PORT_CAP32_SPEED_400G;
  382. return 0;
  383. }
  384. /**
  385. * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask
  386. * @port_type: Firmware Port Type
  387. * @fw_caps: Firmware Port Capabilities
  388. * @link_mode_mask: ethtool Link Mode Mask
  389. *
  390. * Translate a Firmware Port Capabilities specification to an ethtool
  391. * Link Mode Mask.
  392. */
  393. static void fw_caps_to_lmm(enum fw_port_type port_type,
  394. unsigned int fw_caps,
  395. unsigned long *link_mode_mask)
  396. {
  397. #define SET_LMM(__lmm_name) \
  398. __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
  399. link_mode_mask)
  400. #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \
  401. do { \
  402. if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \
  403. SET_LMM(__lmm_name); \
  404. } while (0)
  405. switch (port_type) {
  406. case FW_PORT_TYPE_BT_SGMII:
  407. case FW_PORT_TYPE_BT_XFI:
  408. case FW_PORT_TYPE_BT_XAUI:
  409. SET_LMM(TP);
  410. FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full);
  411. FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
  412. FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
  413. break;
  414. case FW_PORT_TYPE_KX4:
  415. case FW_PORT_TYPE_KX:
  416. SET_LMM(Backplane);
  417. FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
  418. FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
  419. break;
  420. case FW_PORT_TYPE_KR:
  421. SET_LMM(Backplane);
  422. FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
  423. break;
  424. case FW_PORT_TYPE_BP_AP:
  425. SET_LMM(Backplane);
  426. FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
  427. FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
  428. FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
  429. break;
  430. case FW_PORT_TYPE_BP4_AP:
  431. SET_LMM(Backplane);
  432. FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
  433. FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
  434. FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
  435. FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
  436. break;
  437. case FW_PORT_TYPE_FIBER_XFI:
  438. case FW_PORT_TYPE_FIBER_XAUI:
  439. case FW_PORT_TYPE_SFP:
  440. case FW_PORT_TYPE_QSFP_10G:
  441. case FW_PORT_TYPE_QSA:
  442. SET_LMM(FIBRE);
  443. FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
  444. FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
  445. break;
  446. case FW_PORT_TYPE_BP40_BA:
  447. case FW_PORT_TYPE_QSFP:
  448. SET_LMM(FIBRE);
  449. FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
  450. FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
  451. FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
  452. break;
  453. case FW_PORT_TYPE_CR_QSFP:
  454. case FW_PORT_TYPE_SFP28:
  455. SET_LMM(FIBRE);
  456. FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
  457. FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
  458. FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
  459. break;
  460. case FW_PORT_TYPE_KR_SFP28:
  461. SET_LMM(Backplane);
  462. FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
  463. FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
  464. FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full);
  465. break;
  466. case FW_PORT_TYPE_KR_XLAUI:
  467. SET_LMM(Backplane);
  468. FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
  469. FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
  470. FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full);
  471. break;
  472. case FW_PORT_TYPE_CR2_QSFP:
  473. SET_LMM(FIBRE);
  474. FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full);
  475. break;
  476. case FW_PORT_TYPE_KR4_100G:
  477. case FW_PORT_TYPE_CR4_QSFP:
  478. SET_LMM(FIBRE);
  479. FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
  480. FW_CAPS_TO_LMM(SPEED_10G, 10000baseSR_Full);
  481. FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
  482. FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
  483. FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full);
  484. FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full);
  485. break;
  486. default:
  487. break;
  488. }
  489. FW_CAPS_TO_LMM(ANEG, Autoneg);
  490. FW_CAPS_TO_LMM(802_3_PAUSE, Pause);
  491. FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause);
  492. #undef FW_CAPS_TO_LMM
  493. #undef SET_LMM
  494. }
  495. /**
  496. * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware
  497. * capabilities
  498. * @et_lmm: ethtool Link Mode Mask
  499. *
  500. * Translate ethtool Link Mode Mask into a Firmware Port capabilities
  501. * value.
  502. */
  503. static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask)
  504. {
  505. unsigned int fw_caps = 0;
  506. #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \
  507. do { \
  508. if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
  509. link_mode_mask)) \
  510. fw_caps |= FW_PORT_CAP32_ ## __fw_name; \
  511. } while (0)
  512. LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M);
  513. LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G);
  514. LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G);
  515. LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G);
  516. LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G);
  517. LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G);
  518. LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G);
  519. #undef LMM_TO_FW_CAPS
  520. return fw_caps;
  521. }
  522. static int get_link_ksettings(struct net_device *dev,
  523. struct ethtool_link_ksettings *link_ksettings)
  524. {
  525. struct port_info *pi = netdev_priv(dev);
  526. struct ethtool_link_settings *base = &link_ksettings->base;
  527. /* For the nonce, the Firmware doesn't send up Port State changes
  528. * when the Virtual Interface attached to the Port is down. So
  529. * if it's down, let's grab any changes.
  530. */
  531. if (!netif_running(dev))
  532. (void)t4_update_port_info(pi);
  533. ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
  534. ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
  535. ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
  536. base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type);
  537. if (pi->mdio_addr >= 0) {
  538. base->phy_address = pi->mdio_addr;
  539. base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII
  540. ? ETH_MDIO_SUPPORTS_C22
  541. : ETH_MDIO_SUPPORTS_C45);
  542. } else {
  543. base->phy_address = 255;
  544. base->mdio_support = 0;
  545. }
  546. fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps,
  547. link_ksettings->link_modes.supported);
  548. fw_caps_to_lmm(pi->port_type, pi->link_cfg.acaps,
  549. link_ksettings->link_modes.advertising);
  550. fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps,
  551. link_ksettings->link_modes.lp_advertising);
  552. base->speed = (netif_carrier_ok(dev)
  553. ? pi->link_cfg.speed
  554. : SPEED_UNKNOWN);
  555. base->duplex = DUPLEX_FULL;
  556. if (pi->link_cfg.fc & PAUSE_RX) {
  557. if (pi->link_cfg.fc & PAUSE_TX) {
  558. ethtool_link_ksettings_add_link_mode(link_ksettings,
  559. advertising,
  560. Pause);
  561. } else {
  562. ethtool_link_ksettings_add_link_mode(link_ksettings,
  563. advertising,
  564. Asym_Pause);
  565. }
  566. } else if (pi->link_cfg.fc & PAUSE_TX) {
  567. ethtool_link_ksettings_add_link_mode(link_ksettings,
  568. advertising,
  569. Asym_Pause);
  570. }
  571. base->autoneg = pi->link_cfg.autoneg;
  572. if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG)
  573. ethtool_link_ksettings_add_link_mode(link_ksettings,
  574. supported, Autoneg);
  575. if (pi->link_cfg.autoneg)
  576. ethtool_link_ksettings_add_link_mode(link_ksettings,
  577. advertising, Autoneg);
  578. return 0;
  579. }
  580. static int set_link_ksettings(struct net_device *dev,
  581. const struct ethtool_link_ksettings *link_ksettings)
  582. {
  583. struct port_info *pi = netdev_priv(dev);
  584. struct link_config *lc = &pi->link_cfg;
  585. const struct ethtool_link_settings *base = &link_ksettings->base;
  586. struct link_config old_lc;
  587. unsigned int fw_caps;
  588. int ret = 0;
  589. /* only full-duplex supported */
  590. if (base->duplex != DUPLEX_FULL)
  591. return -EINVAL;
  592. old_lc = *lc;
  593. if (!(lc->pcaps & FW_PORT_CAP32_ANEG) ||
  594. base->autoneg == AUTONEG_DISABLE) {
  595. fw_caps = speed_to_fw_caps(base->speed);
  596. /* Must only specify a single speed which must be supported
  597. * as part of the Physical Port Capabilities.
  598. */
  599. if ((fw_caps & (fw_caps - 1)) != 0 ||
  600. !(lc->pcaps & fw_caps))
  601. return -EINVAL;
  602. lc->speed_caps = fw_caps;
  603. lc->acaps = fw_caps;
  604. } else {
  605. fw_caps =
  606. lmm_to_fw_caps(link_ksettings->link_modes.advertising);
  607. if (!(lc->pcaps & fw_caps))
  608. return -EINVAL;
  609. lc->speed_caps = 0;
  610. lc->acaps = fw_caps | FW_PORT_CAP32_ANEG;
  611. }
  612. lc->autoneg = base->autoneg;
  613. /* If the firmware rejects the Link Configuration request, back out
  614. * the changes and report the error.
  615. */
  616. ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc);
  617. if (ret)
  618. *lc = old_lc;
  619. return ret;
  620. }
  621. /* Translate the Firmware FEC value into the ethtool value. */
  622. static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec)
  623. {
  624. unsigned int eth_fec = 0;
  625. if (fw_fec & FW_PORT_CAP32_FEC_RS)
  626. eth_fec |= ETHTOOL_FEC_RS;
  627. if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)
  628. eth_fec |= ETHTOOL_FEC_BASER;
  629. /* if nothing is set, then FEC is off */
  630. if (!eth_fec)
  631. eth_fec = ETHTOOL_FEC_OFF;
  632. return eth_fec;
  633. }
  634. /* Translate Common Code FEC value into ethtool value. */
  635. static inline unsigned int cc_to_eth_fec(unsigned int cc_fec)
  636. {
  637. unsigned int eth_fec = 0;
  638. if (cc_fec & FEC_AUTO)
  639. eth_fec |= ETHTOOL_FEC_AUTO;
  640. if (cc_fec & FEC_RS)
  641. eth_fec |= ETHTOOL_FEC_RS;
  642. if (cc_fec & FEC_BASER_RS)
  643. eth_fec |= ETHTOOL_FEC_BASER;
  644. /* if nothing is set, then FEC is off */
  645. if (!eth_fec)
  646. eth_fec = ETHTOOL_FEC_OFF;
  647. return eth_fec;
  648. }
  649. /* Translate ethtool FEC value into Common Code value. */
  650. static inline unsigned int eth_to_cc_fec(unsigned int eth_fec)
  651. {
  652. unsigned int cc_fec = 0;
  653. if (eth_fec & ETHTOOL_FEC_OFF)
  654. return cc_fec;
  655. if (eth_fec & ETHTOOL_FEC_AUTO)
  656. cc_fec |= FEC_AUTO;
  657. if (eth_fec & ETHTOOL_FEC_RS)
  658. cc_fec |= FEC_RS;
  659. if (eth_fec & ETHTOOL_FEC_BASER)
  660. cc_fec |= FEC_BASER_RS;
  661. return cc_fec;
  662. }
  663. static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
  664. {
  665. const struct port_info *pi = netdev_priv(dev);
  666. const struct link_config *lc = &pi->link_cfg;
  667. /* Translate the Firmware FEC Support into the ethtool value. We
  668. * always support IEEE 802.3 "automatic" selection of Link FEC type if
  669. * any FEC is supported.
  670. */
  671. fec->fec = fwcap_to_eth_fec(lc->pcaps);
  672. if (fec->fec != ETHTOOL_FEC_OFF)
  673. fec->fec |= ETHTOOL_FEC_AUTO;
  674. /* Translate the current internal FEC parameters into the
  675. * ethtool values.
  676. */
  677. fec->active_fec = cc_to_eth_fec(lc->fec);
  678. return 0;
  679. }
  680. static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
  681. {
  682. struct port_info *pi = netdev_priv(dev);
  683. struct link_config *lc = &pi->link_cfg;
  684. struct link_config old_lc;
  685. int ret;
  686. /* Save old Link Configuration in case the L1 Configure below
  687. * fails.
  688. */
  689. old_lc = *lc;
  690. /* Try to perform the L1 Configure and return the result of that
  691. * effort. If it fails, revert the attempted change.
  692. */
  693. lc->requested_fec = eth_to_cc_fec(fec->fec);
  694. ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox,
  695. pi->tx_chan, lc);
  696. if (ret)
  697. *lc = old_lc;
  698. return ret;
  699. }
  700. static void get_pauseparam(struct net_device *dev,
  701. struct ethtool_pauseparam *epause)
  702. {
  703. struct port_info *p = netdev_priv(dev);
  704. epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0;
  705. epause->rx_pause = (p->link_cfg.fc & PAUSE_RX) != 0;
  706. epause->tx_pause = (p->link_cfg.fc & PAUSE_TX) != 0;
  707. }
  708. static int set_pauseparam(struct net_device *dev,
  709. struct ethtool_pauseparam *epause)
  710. {
  711. struct port_info *p = netdev_priv(dev);
  712. struct link_config *lc = &p->link_cfg;
  713. if (epause->autoneg == AUTONEG_DISABLE)
  714. lc->requested_fc = 0;
  715. else if (lc->pcaps & FW_PORT_CAP32_ANEG)
  716. lc->requested_fc = PAUSE_AUTONEG;
  717. else
  718. return -EINVAL;
  719. if (epause->rx_pause)
  720. lc->requested_fc |= PAUSE_RX;
  721. if (epause->tx_pause)
  722. lc->requested_fc |= PAUSE_TX;
  723. if (netif_running(dev))
  724. return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan,
  725. lc);
  726. return 0;
  727. }
  728. static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
  729. {
  730. const struct port_info *pi = netdev_priv(dev);
  731. const struct sge *s = &pi->adapter->sge;
  732. e->rx_max_pending = MAX_RX_BUFFERS;
  733. e->rx_mini_max_pending = MAX_RSPQ_ENTRIES;
  734. e->rx_jumbo_max_pending = 0;
  735. e->tx_max_pending = MAX_TXQ_ENTRIES;
  736. e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8;
  737. e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size;
  738. e->rx_jumbo_pending = 0;
  739. e->tx_pending = s->ethtxq[pi->first_qset].q.size;
  740. }
  741. static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
  742. {
  743. int i;
  744. const struct port_info *pi = netdev_priv(dev);
  745. struct adapter *adapter = pi->adapter;
  746. struct sge *s = &adapter->sge;
  747. if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending ||
  748. e->tx_pending > MAX_TXQ_ENTRIES ||
  749. e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
  750. e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
  751. e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES)
  752. return -EINVAL;
  753. if (adapter->flags & FULL_INIT_DONE)
  754. return -EBUSY;
  755. for (i = 0; i < pi->nqsets; ++i) {
  756. s->ethtxq[pi->first_qset + i].q.size = e->tx_pending;
  757. s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8;
  758. s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending;
  759. }
  760. return 0;
  761. }
  762. /**
  763. * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete!
  764. * @dev: the network device
  765. * @us: the hold-off time in us, or 0 to disable timer
  766. * @cnt: the hold-off packet count, or 0 to disable counter
  767. *
  768. * Set the RX interrupt hold-off parameters for a network device.
  769. */
  770. static int set_rx_intr_params(struct net_device *dev,
  771. unsigned int us, unsigned int cnt)
  772. {
  773. int i, err;
  774. struct port_info *pi = netdev_priv(dev);
  775. struct adapter *adap = pi->adapter;
  776. struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
  777. for (i = 0; i < pi->nqsets; i++, q++) {
  778. err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt);
  779. if (err)
  780. return err;
  781. }
  782. return 0;
  783. }
  784. static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx)
  785. {
  786. int i;
  787. struct port_info *pi = netdev_priv(dev);
  788. struct adapter *adap = pi->adapter;
  789. struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
  790. for (i = 0; i < pi->nqsets; i++, q++)
  791. q->rspq.adaptive_rx = adaptive_rx;
  792. return 0;
  793. }
  794. static int get_adaptive_rx_setting(struct net_device *dev)
  795. {
  796. struct port_info *pi = netdev_priv(dev);
  797. struct adapter *adap = pi->adapter;
  798. struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
  799. return q->rspq.adaptive_rx;
  800. }
  801. static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
  802. {
  803. set_adaptive_rx_setting(dev, c->use_adaptive_rx_coalesce);
  804. return set_rx_intr_params(dev, c->rx_coalesce_usecs,
  805. c->rx_max_coalesced_frames);
  806. }
  807. static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
  808. {
  809. const struct port_info *pi = netdev_priv(dev);
  810. const struct adapter *adap = pi->adapter;
  811. const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq;
  812. c->rx_coalesce_usecs = qtimer_val(adap, rq);
  813. c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ?
  814. adap->sge.counter_val[rq->pktcnt_idx] : 0;
  815. c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev);
  816. return 0;
  817. }
  818. /* The next two routines implement eeprom read/write from physical addresses.
  819. */
  820. static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v)
  821. {
  822. int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
  823. if (vaddr >= 0)
  824. vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v);
  825. return vaddr < 0 ? vaddr : 0;
  826. }
  827. static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v)
  828. {
  829. int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
  830. if (vaddr >= 0)
  831. vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v);
  832. return vaddr < 0 ? vaddr : 0;
  833. }
  834. #define EEPROM_MAGIC 0x38E2F10C
  835. static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
  836. u8 *data)
  837. {
  838. int i, err = 0;
  839. struct adapter *adapter = netdev2adap(dev);
  840. u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL);
  841. if (!buf)
  842. return -ENOMEM;
  843. e->magic = EEPROM_MAGIC;
  844. for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
  845. err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]);
  846. if (!err)
  847. memcpy(data, buf + e->offset, e->len);
  848. kvfree(buf);
  849. return err;
  850. }
  851. static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  852. u8 *data)
  853. {
  854. u8 *buf;
  855. int err = 0;
  856. u32 aligned_offset, aligned_len, *p;
  857. struct adapter *adapter = netdev2adap(dev);
  858. if (eeprom->magic != EEPROM_MAGIC)
  859. return -EINVAL;
  860. aligned_offset = eeprom->offset & ~3;
  861. aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
  862. if (adapter->pf > 0) {
  863. u32 start = 1024 + adapter->pf * EEPROMPFSIZE;
  864. if (aligned_offset < start ||
  865. aligned_offset + aligned_len > start + EEPROMPFSIZE)
  866. return -EPERM;
  867. }
  868. if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
  869. /* RMW possibly needed for first or last words.
  870. */
  871. buf = kvzalloc(aligned_len, GFP_KERNEL);
  872. if (!buf)
  873. return -ENOMEM;
  874. err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf);
  875. if (!err && aligned_len > 4)
  876. err = eeprom_rd_phys(adapter,
  877. aligned_offset + aligned_len - 4,
  878. (u32 *)&buf[aligned_len - 4]);
  879. if (err)
  880. goto out;
  881. memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
  882. } else {
  883. buf = data;
  884. }
  885. err = t4_seeprom_wp(adapter, false);
  886. if (err)
  887. goto out;
  888. for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) {
  889. err = eeprom_wr_phys(adapter, aligned_offset, *p);
  890. aligned_offset += 4;
  891. }
  892. if (!err)
  893. err = t4_seeprom_wp(adapter, true);
  894. out:
  895. if (buf != data)
  896. kvfree(buf);
  897. return err;
  898. }
  899. static int set_flash(struct net_device *netdev, struct ethtool_flash *ef)
  900. {
  901. int ret;
  902. const struct firmware *fw;
  903. struct adapter *adap = netdev2adap(netdev);
  904. unsigned int mbox = PCIE_FW_MASTER_M + 1;
  905. u32 pcie_fw;
  906. unsigned int master;
  907. u8 master_vld = 0;
  908. pcie_fw = t4_read_reg(adap, PCIE_FW_A);
  909. master = PCIE_FW_MASTER_G(pcie_fw);
  910. if (pcie_fw & PCIE_FW_MASTER_VLD_F)
  911. master_vld = 1;
  912. /* if csiostor is the master return */
  913. if (master_vld && (master != adap->pf)) {
  914. dev_warn(adap->pdev_dev,
  915. "cxgb4 driver needs to be loaded as MASTER to support FW flash\n");
  916. return -EOPNOTSUPP;
  917. }
  918. ef->data[sizeof(ef->data) - 1] = '\0';
  919. ret = request_firmware(&fw, ef->data, adap->pdev_dev);
  920. if (ret < 0)
  921. return ret;
  922. /* If the adapter has been fully initialized then we'll go ahead and
  923. * try to get the firmware's cooperation in upgrading to the new
  924. * firmware image otherwise we'll try to do the entire job from the
  925. * host ... and we always "force" the operation in this path.
  926. */
  927. if (adap->flags & FULL_INIT_DONE)
  928. mbox = adap->mbox;
  929. ret = t4_fw_upgrade(adap, mbox, fw->data, fw->size, 1);
  930. release_firmware(fw);
  931. if (!ret)
  932. dev_info(adap->pdev_dev,
  933. "loaded firmware %s, reload cxgb4 driver\n", ef->data);
  934. return ret;
  935. }
  936. static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info)
  937. {
  938. struct port_info *pi = netdev_priv(dev);
  939. struct adapter *adapter = pi->adapter;
  940. ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
  941. SOF_TIMESTAMPING_RX_SOFTWARE |
  942. SOF_TIMESTAMPING_SOFTWARE;
  943. ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE |
  944. SOF_TIMESTAMPING_TX_HARDWARE |
  945. SOF_TIMESTAMPING_RAW_HARDWARE;
  946. ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) |
  947. (1 << HWTSTAMP_TX_ON);
  948. ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
  949. (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
  950. (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
  951. (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
  952. (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
  953. (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
  954. if (adapter->ptp_clock)
  955. ts_info->phc_index = ptp_clock_index(adapter->ptp_clock);
  956. else
  957. ts_info->phc_index = -1;
  958. return 0;
  959. }
  960. static u32 get_rss_table_size(struct net_device *dev)
  961. {
  962. const struct port_info *pi = netdev_priv(dev);
  963. return pi->rss_size;
  964. }
  965. static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc)
  966. {
  967. const struct port_info *pi = netdev_priv(dev);
  968. unsigned int n = pi->rss_size;
  969. if (hfunc)
  970. *hfunc = ETH_RSS_HASH_TOP;
  971. if (!p)
  972. return 0;
  973. while (n--)
  974. p[n] = pi->rss[n];
  975. return 0;
  976. }
  977. static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key,
  978. const u8 hfunc)
  979. {
  980. unsigned int i;
  981. struct port_info *pi = netdev_priv(dev);
  982. /* We require at least one supported parameter to be changed and no
  983. * change in any of the unsupported parameters
  984. */
  985. if (key ||
  986. (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
  987. return -EOPNOTSUPP;
  988. if (!p)
  989. return 0;
  990. /* Interface must be brought up atleast once */
  991. if (pi->adapter->flags & FULL_INIT_DONE) {
  992. for (i = 0; i < pi->rss_size; i++)
  993. pi->rss[i] = p[i];
  994. return cxgb4_write_rss(pi, pi->rss);
  995. }
  996. return -EPERM;
  997. }
  998. static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
  999. u32 *rules)
  1000. {
  1001. const struct port_info *pi = netdev_priv(dev);
  1002. switch (info->cmd) {
  1003. case ETHTOOL_GRXFH: {
  1004. unsigned int v = pi->rss_mode;
  1005. info->data = 0;
  1006. switch (info->flow_type) {
  1007. case TCP_V4_FLOW:
  1008. if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F)
  1009. info->data = RXH_IP_SRC | RXH_IP_DST |
  1010. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  1011. else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
  1012. info->data = RXH_IP_SRC | RXH_IP_DST;
  1013. break;
  1014. case UDP_V4_FLOW:
  1015. if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) &&
  1016. (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
  1017. info->data = RXH_IP_SRC | RXH_IP_DST |
  1018. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  1019. else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
  1020. info->data = RXH_IP_SRC | RXH_IP_DST;
  1021. break;
  1022. case SCTP_V4_FLOW:
  1023. case AH_ESP_V4_FLOW:
  1024. case IPV4_FLOW:
  1025. if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
  1026. info->data = RXH_IP_SRC | RXH_IP_DST;
  1027. break;
  1028. case TCP_V6_FLOW:
  1029. if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F)
  1030. info->data = RXH_IP_SRC | RXH_IP_DST |
  1031. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  1032. else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
  1033. info->data = RXH_IP_SRC | RXH_IP_DST;
  1034. break;
  1035. case UDP_V6_FLOW:
  1036. if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) &&
  1037. (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
  1038. info->data = RXH_IP_SRC | RXH_IP_DST |
  1039. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  1040. else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
  1041. info->data = RXH_IP_SRC | RXH_IP_DST;
  1042. break;
  1043. case SCTP_V6_FLOW:
  1044. case AH_ESP_V6_FLOW:
  1045. case IPV6_FLOW:
  1046. if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
  1047. info->data = RXH_IP_SRC | RXH_IP_DST;
  1048. break;
  1049. }
  1050. return 0;
  1051. }
  1052. case ETHTOOL_GRXRINGS:
  1053. info->data = pi->nqsets;
  1054. return 0;
  1055. }
  1056. return -EOPNOTSUPP;
  1057. }
  1058. static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump)
  1059. {
  1060. struct adapter *adapter = netdev2adap(dev);
  1061. u32 len = 0;
  1062. len = sizeof(struct cudbg_hdr) +
  1063. sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
  1064. len += cxgb4_get_dump_length(adapter, eth_dump->flag);
  1065. adapter->eth_dump.flag = eth_dump->flag;
  1066. adapter->eth_dump.len = len;
  1067. return 0;
  1068. }
  1069. static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump)
  1070. {
  1071. struct adapter *adapter = netdev2adap(dev);
  1072. eth_dump->flag = adapter->eth_dump.flag;
  1073. eth_dump->len = adapter->eth_dump.len;
  1074. eth_dump->version = adapter->eth_dump.version;
  1075. return 0;
  1076. }
  1077. static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump,
  1078. void *buf)
  1079. {
  1080. struct adapter *adapter = netdev2adap(dev);
  1081. u32 len = 0;
  1082. int ret = 0;
  1083. if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE)
  1084. return -ENOENT;
  1085. len = sizeof(struct cudbg_hdr) +
  1086. sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
  1087. len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag);
  1088. if (eth_dump->len < len)
  1089. return -ENOMEM;
  1090. ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag);
  1091. if (ret)
  1092. return ret;
  1093. eth_dump->flag = adapter->eth_dump.flag;
  1094. eth_dump->len = len;
  1095. eth_dump->version = adapter->eth_dump.version;
  1096. return 0;
  1097. }
  1098. static int cxgb4_get_module_info(struct net_device *dev,
  1099. struct ethtool_modinfo *modinfo)
  1100. {
  1101. struct port_info *pi = netdev_priv(dev);
  1102. u8 sff8472_comp, sff_diag_type, sff_rev;
  1103. struct adapter *adapter = pi->adapter;
  1104. int ret;
  1105. if (!t4_is_inserted_mod_type(pi->mod_type))
  1106. return -EINVAL;
  1107. switch (pi->port_type) {
  1108. case FW_PORT_TYPE_SFP:
  1109. case FW_PORT_TYPE_QSA:
  1110. case FW_PORT_TYPE_SFP28:
  1111. ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
  1112. I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR,
  1113. SFF_8472_COMP_LEN, &sff8472_comp);
  1114. if (ret)
  1115. return ret;
  1116. ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
  1117. I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR,
  1118. SFP_DIAG_TYPE_LEN, &sff_diag_type);
  1119. if (ret)
  1120. return ret;
  1121. if (!sff8472_comp || (sff_diag_type & 4)) {
  1122. modinfo->type = ETH_MODULE_SFF_8079;
  1123. modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
  1124. } else {
  1125. modinfo->type = ETH_MODULE_SFF_8472;
  1126. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1127. }
  1128. break;
  1129. case FW_PORT_TYPE_QSFP:
  1130. case FW_PORT_TYPE_QSFP_10G:
  1131. case FW_PORT_TYPE_CR_QSFP:
  1132. case FW_PORT_TYPE_CR2_QSFP:
  1133. case FW_PORT_TYPE_CR4_QSFP:
  1134. ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
  1135. I2C_DEV_ADDR_A0, SFF_REV_ADDR,
  1136. SFF_REV_LEN, &sff_rev);
  1137. /* For QSFP type ports, revision value >= 3
  1138. * means the SFP is 8636 compliant.
  1139. */
  1140. if (ret)
  1141. return ret;
  1142. if (sff_rev >= 0x3) {
  1143. modinfo->type = ETH_MODULE_SFF_8636;
  1144. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1145. } else {
  1146. modinfo->type = ETH_MODULE_SFF_8436;
  1147. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1148. }
  1149. break;
  1150. default:
  1151. return -EINVAL;
  1152. }
  1153. return 0;
  1154. }
  1155. static int cxgb4_get_module_eeprom(struct net_device *dev,
  1156. struct ethtool_eeprom *eprom, u8 *data)
  1157. {
  1158. int ret = 0, offset = eprom->offset, len = eprom->len;
  1159. struct port_info *pi = netdev_priv(dev);
  1160. struct adapter *adapter = pi->adapter;
  1161. memset(data, 0, eprom->len);
  1162. if (offset + len <= I2C_PAGE_SIZE)
  1163. return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
  1164. I2C_DEV_ADDR_A0, offset, len, data);
  1165. /* offset + len spans 0xa0 and 0xa1 pages */
  1166. if (offset <= I2C_PAGE_SIZE) {
  1167. /* read 0xa0 page */
  1168. len = I2C_PAGE_SIZE - offset;
  1169. ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
  1170. I2C_DEV_ADDR_A0, offset, len, data);
  1171. if (ret)
  1172. return ret;
  1173. offset = I2C_PAGE_SIZE;
  1174. /* Remaining bytes to be read from second page =
  1175. * Total length - bytes read from first page
  1176. */
  1177. len = eprom->len - len;
  1178. }
  1179. /* Read additional optical diagnostics from page 0xa2 if supported */
  1180. return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2,
  1181. offset, len, &data[eprom->len - len]);
  1182. }
  1183. static u32 cxgb4_get_priv_flags(struct net_device *netdev)
  1184. {
  1185. struct port_info *pi = netdev_priv(netdev);
  1186. struct adapter *adapter = pi->adapter;
  1187. return (adapter->eth_flags | pi->eth_flags);
  1188. }
  1189. /**
  1190. * set_flags - set/unset specified flags if passed in new_flags
  1191. * @cur_flags: pointer to current flags
  1192. * @new_flags: new incoming flags
  1193. * @flags: set of flags to set/unset
  1194. */
  1195. static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags)
  1196. {
  1197. *cur_flags = (*cur_flags & ~flags) | (new_flags & flags);
  1198. }
  1199. static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags)
  1200. {
  1201. struct port_info *pi = netdev_priv(netdev);
  1202. struct adapter *adapter = pi->adapter;
  1203. set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP);
  1204. set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT);
  1205. return 0;
  1206. }
  1207. static const struct ethtool_ops cxgb_ethtool_ops = {
  1208. .get_link_ksettings = get_link_ksettings,
  1209. .set_link_ksettings = set_link_ksettings,
  1210. .get_fecparam = get_fecparam,
  1211. .set_fecparam = set_fecparam,
  1212. .get_drvinfo = get_drvinfo,
  1213. .get_msglevel = get_msglevel,
  1214. .set_msglevel = set_msglevel,
  1215. .get_ringparam = get_sge_param,
  1216. .set_ringparam = set_sge_param,
  1217. .get_coalesce = get_coalesce,
  1218. .set_coalesce = set_coalesce,
  1219. .get_eeprom_len = get_eeprom_len,
  1220. .get_eeprom = get_eeprom,
  1221. .set_eeprom = set_eeprom,
  1222. .get_pauseparam = get_pauseparam,
  1223. .set_pauseparam = set_pauseparam,
  1224. .get_link = ethtool_op_get_link,
  1225. .get_strings = get_strings,
  1226. .set_phys_id = identify_port,
  1227. .nway_reset = restart_autoneg,
  1228. .get_sset_count = get_sset_count,
  1229. .get_ethtool_stats = get_stats,
  1230. .get_regs_len = get_regs_len,
  1231. .get_regs = get_regs,
  1232. .get_rxnfc = get_rxnfc,
  1233. .get_rxfh_indir_size = get_rss_table_size,
  1234. .get_rxfh = get_rss_table,
  1235. .set_rxfh = set_rss_table,
  1236. .flash_device = set_flash,
  1237. .get_ts_info = get_ts_info,
  1238. .set_dump = set_dump,
  1239. .get_dump_flag = get_dump_flag,
  1240. .get_dump_data = get_dump_data,
  1241. .get_module_info = cxgb4_get_module_info,
  1242. .get_module_eeprom = cxgb4_get_module_eeprom,
  1243. .get_priv_flags = cxgb4_get_priv_flags,
  1244. .set_priv_flags = cxgb4_set_priv_flags,
  1245. };
  1246. void cxgb4_set_ethtool_ops(struct net_device *netdev)
  1247. {
  1248. netdev->ethtool_ops = &cxgb_ethtool_ops;
  1249. }