mthca_memfree.c 18 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  4. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/mm.h>
  35. #include <linux/scatterlist.h>
  36. #include <linux/sched.h>
  37. #include <linux/slab.h>
  38. #include <asm/page.h>
  39. #include "mthca_memfree.h"
  40. #include "mthca_dev.h"
  41. #include "mthca_cmd.h"
  42. /*
  43. * We allocate in as big chunks as we can, up to a maximum of 256 KB
  44. * per chunk.
  45. */
  46. enum {
  47. MTHCA_ICM_ALLOC_SIZE = 1 << 18,
  48. MTHCA_TABLE_CHUNK_SIZE = 1 << 18
  49. };
  50. struct mthca_user_db_table {
  51. struct mutex mutex;
  52. struct {
  53. u64 uvirt;
  54. struct scatterlist mem;
  55. int refcount;
  56. } page[0];
  57. };
  58. static void mthca_free_icm_pages(struct mthca_dev *dev, struct mthca_icm_chunk *chunk)
  59. {
  60. int i;
  61. if (chunk->nsg > 0)
  62. pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
  63. PCI_DMA_BIDIRECTIONAL);
  64. for (i = 0; i < chunk->npages; ++i)
  65. __free_pages(sg_page(&chunk->mem[i]),
  66. get_order(chunk->mem[i].length));
  67. }
  68. static void mthca_free_icm_coherent(struct mthca_dev *dev, struct mthca_icm_chunk *chunk)
  69. {
  70. int i;
  71. for (i = 0; i < chunk->npages; ++i) {
  72. dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
  73. lowmem_page_address(sg_page(&chunk->mem[i])),
  74. sg_dma_address(&chunk->mem[i]));
  75. }
  76. }
  77. void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm, int coherent)
  78. {
  79. struct mthca_icm_chunk *chunk, *tmp;
  80. if (!icm)
  81. return;
  82. list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
  83. if (coherent)
  84. mthca_free_icm_coherent(dev, chunk);
  85. else
  86. mthca_free_icm_pages(dev, chunk);
  87. kfree(chunk);
  88. }
  89. kfree(icm);
  90. }
  91. static int mthca_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask)
  92. {
  93. struct page *page;
  94. /*
  95. * Use __GFP_ZERO because buggy firmware assumes ICM pages are
  96. * cleared, and subtle failures are seen if they aren't.
  97. */
  98. page = alloc_pages(gfp_mask | __GFP_ZERO, order);
  99. if (!page)
  100. return -ENOMEM;
  101. sg_set_page(mem, page, PAGE_SIZE << order, 0);
  102. return 0;
  103. }
  104. static int mthca_alloc_icm_coherent(struct device *dev, struct scatterlist *mem,
  105. int order, gfp_t gfp_mask)
  106. {
  107. void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, &sg_dma_address(mem),
  108. gfp_mask);
  109. if (!buf)
  110. return -ENOMEM;
  111. sg_set_buf(mem, buf, PAGE_SIZE << order);
  112. BUG_ON(mem->offset);
  113. sg_dma_len(mem) = PAGE_SIZE << order;
  114. return 0;
  115. }
  116. struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages,
  117. gfp_t gfp_mask, int coherent)
  118. {
  119. struct mthca_icm *icm;
  120. struct mthca_icm_chunk *chunk = NULL;
  121. int cur_order;
  122. int ret;
  123. /* We use sg_set_buf for coherent allocs, which assumes low memory */
  124. BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
  125. icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  126. if (!icm)
  127. return icm;
  128. icm->refcount = 0;
  129. INIT_LIST_HEAD(&icm->chunk_list);
  130. cur_order = get_order(MTHCA_ICM_ALLOC_SIZE);
  131. while (npages > 0) {
  132. if (!chunk) {
  133. chunk = kmalloc(sizeof *chunk,
  134. gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  135. if (!chunk)
  136. goto fail;
  137. sg_init_table(chunk->mem, MTHCA_ICM_CHUNK_LEN);
  138. chunk->npages = 0;
  139. chunk->nsg = 0;
  140. list_add_tail(&chunk->list, &icm->chunk_list);
  141. }
  142. while (1 << cur_order > npages)
  143. --cur_order;
  144. if (coherent)
  145. ret = mthca_alloc_icm_coherent(&dev->pdev->dev,
  146. &chunk->mem[chunk->npages],
  147. cur_order, gfp_mask);
  148. else
  149. ret = mthca_alloc_icm_pages(&chunk->mem[chunk->npages],
  150. cur_order, gfp_mask);
  151. if (!ret) {
  152. ++chunk->npages;
  153. if (coherent)
  154. ++chunk->nsg;
  155. else if (chunk->npages == MTHCA_ICM_CHUNK_LEN) {
  156. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  157. chunk->npages,
  158. PCI_DMA_BIDIRECTIONAL);
  159. if (chunk->nsg <= 0)
  160. goto fail;
  161. }
  162. if (chunk->npages == MTHCA_ICM_CHUNK_LEN)
  163. chunk = NULL;
  164. npages -= 1 << cur_order;
  165. } else {
  166. --cur_order;
  167. if (cur_order < 0)
  168. goto fail;
  169. }
  170. }
  171. if (!coherent && chunk) {
  172. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  173. chunk->npages,
  174. PCI_DMA_BIDIRECTIONAL);
  175. if (chunk->nsg <= 0)
  176. goto fail;
  177. }
  178. return icm;
  179. fail:
  180. mthca_free_icm(dev, icm, coherent);
  181. return NULL;
  182. }
  183. int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  184. {
  185. int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  186. int ret = 0;
  187. mutex_lock(&table->mutex);
  188. if (table->icm[i]) {
  189. ++table->icm[i]->refcount;
  190. goto out;
  191. }
  192. table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  193. (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  194. __GFP_NOWARN, table->coherent);
  195. if (!table->icm[i]) {
  196. ret = -ENOMEM;
  197. goto out;
  198. }
  199. if (mthca_MAP_ICM(dev, table->icm[i],
  200. table->virt + i * MTHCA_TABLE_CHUNK_SIZE)) {
  201. mthca_free_icm(dev, table->icm[i], table->coherent);
  202. table->icm[i] = NULL;
  203. ret = -ENOMEM;
  204. goto out;
  205. }
  206. ++table->icm[i]->refcount;
  207. out:
  208. mutex_unlock(&table->mutex);
  209. return ret;
  210. }
  211. void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  212. {
  213. int i;
  214. if (!mthca_is_memfree(dev))
  215. return;
  216. i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  217. mutex_lock(&table->mutex);
  218. if (--table->icm[i]->refcount == 0) {
  219. mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  220. MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE);
  221. mthca_free_icm(dev, table->icm[i], table->coherent);
  222. table->icm[i] = NULL;
  223. }
  224. mutex_unlock(&table->mutex);
  225. }
  226. void *mthca_table_find(struct mthca_icm_table *table, int obj, dma_addr_t *dma_handle)
  227. {
  228. int idx, offset, dma_offset, i;
  229. struct mthca_icm_chunk *chunk;
  230. struct mthca_icm *icm;
  231. struct page *page = NULL;
  232. if (!table->lowmem)
  233. return NULL;
  234. mutex_lock(&table->mutex);
  235. idx = (obj & (table->num_obj - 1)) * table->obj_size;
  236. icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE];
  237. dma_offset = offset = idx % MTHCA_TABLE_CHUNK_SIZE;
  238. if (!icm)
  239. goto out;
  240. list_for_each_entry(chunk, &icm->chunk_list, list) {
  241. for (i = 0; i < chunk->npages; ++i) {
  242. if (dma_handle && dma_offset >= 0) {
  243. if (sg_dma_len(&chunk->mem[i]) > dma_offset)
  244. *dma_handle = sg_dma_address(&chunk->mem[i]) +
  245. dma_offset;
  246. dma_offset -= sg_dma_len(&chunk->mem[i]);
  247. }
  248. /* DMA mapping can merge pages but not split them,
  249. * so if we found the page, dma_handle has already
  250. * been assigned to. */
  251. if (chunk->mem[i].length > offset) {
  252. page = sg_page(&chunk->mem[i]);
  253. goto out;
  254. }
  255. offset -= chunk->mem[i].length;
  256. }
  257. }
  258. out:
  259. mutex_unlock(&table->mutex);
  260. return page ? lowmem_page_address(page) + offset : NULL;
  261. }
  262. int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  263. int start, int end)
  264. {
  265. int inc = MTHCA_TABLE_CHUNK_SIZE / table->obj_size;
  266. int i, err;
  267. for (i = start; i <= end; i += inc) {
  268. err = mthca_table_get(dev, table, i);
  269. if (err)
  270. goto fail;
  271. }
  272. return 0;
  273. fail:
  274. while (i > start) {
  275. i -= inc;
  276. mthca_table_put(dev, table, i);
  277. }
  278. return err;
  279. }
  280. void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  281. int start, int end)
  282. {
  283. int i;
  284. if (!mthca_is_memfree(dev))
  285. return;
  286. for (i = start; i <= end; i += MTHCA_TABLE_CHUNK_SIZE / table->obj_size)
  287. mthca_table_put(dev, table, i);
  288. }
  289. struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev,
  290. u64 virt, int obj_size,
  291. int nobj, int reserved,
  292. int use_lowmem, int use_coherent)
  293. {
  294. struct mthca_icm_table *table;
  295. int obj_per_chunk;
  296. int num_icm;
  297. unsigned chunk_size;
  298. int i;
  299. obj_per_chunk = MTHCA_TABLE_CHUNK_SIZE / obj_size;
  300. num_icm = DIV_ROUND_UP(nobj, obj_per_chunk);
  301. table = kmalloc(struct_size(table, icm, num_icm), GFP_KERNEL);
  302. if (!table)
  303. return NULL;
  304. table->virt = virt;
  305. table->num_icm = num_icm;
  306. table->num_obj = nobj;
  307. table->obj_size = obj_size;
  308. table->lowmem = use_lowmem;
  309. table->coherent = use_coherent;
  310. mutex_init(&table->mutex);
  311. for (i = 0; i < num_icm; ++i)
  312. table->icm[i] = NULL;
  313. for (i = 0; i * MTHCA_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
  314. chunk_size = MTHCA_TABLE_CHUNK_SIZE;
  315. if ((i + 1) * MTHCA_TABLE_CHUNK_SIZE > nobj * obj_size)
  316. chunk_size = nobj * obj_size - i * MTHCA_TABLE_CHUNK_SIZE;
  317. table->icm[i] = mthca_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
  318. (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  319. __GFP_NOWARN, use_coherent);
  320. if (!table->icm[i])
  321. goto err;
  322. if (mthca_MAP_ICM(dev, table->icm[i],
  323. virt + i * MTHCA_TABLE_CHUNK_SIZE)) {
  324. mthca_free_icm(dev, table->icm[i], table->coherent);
  325. table->icm[i] = NULL;
  326. goto err;
  327. }
  328. /*
  329. * Add a reference to this ICM chunk so that it never
  330. * gets freed (since it contains reserved firmware objects).
  331. */
  332. ++table->icm[i]->refcount;
  333. }
  334. return table;
  335. err:
  336. for (i = 0; i < num_icm; ++i)
  337. if (table->icm[i]) {
  338. mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE,
  339. MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE);
  340. mthca_free_icm(dev, table->icm[i], table->coherent);
  341. }
  342. kfree(table);
  343. return NULL;
  344. }
  345. void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table)
  346. {
  347. int i;
  348. for (i = 0; i < table->num_icm; ++i)
  349. if (table->icm[i]) {
  350. mthca_UNMAP_ICM(dev,
  351. table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  352. MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE);
  353. mthca_free_icm(dev, table->icm[i], table->coherent);
  354. }
  355. kfree(table);
  356. }
  357. static u64 mthca_uarc_virt(struct mthca_dev *dev, struct mthca_uar *uar, int page)
  358. {
  359. return dev->uar_table.uarc_base +
  360. uar->index * dev->uar_table.uarc_size +
  361. page * MTHCA_ICM_PAGE_SIZE;
  362. }
  363. int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  364. struct mthca_user_db_table *db_tab, int index, u64 uaddr)
  365. {
  366. struct page *pages[1];
  367. int ret = 0;
  368. int i;
  369. if (!mthca_is_memfree(dev))
  370. return 0;
  371. if (index < 0 || index > dev->uar_table.uarc_size / 8)
  372. return -EINVAL;
  373. mutex_lock(&db_tab->mutex);
  374. i = index / MTHCA_DB_REC_PER_PAGE;
  375. if ((db_tab->page[i].refcount >= MTHCA_DB_REC_PER_PAGE) ||
  376. (db_tab->page[i].uvirt && db_tab->page[i].uvirt != uaddr) ||
  377. (uaddr & 4095)) {
  378. ret = -EINVAL;
  379. goto out;
  380. }
  381. if (db_tab->page[i].refcount) {
  382. ++db_tab->page[i].refcount;
  383. goto out;
  384. }
  385. ret = get_user_pages_fast(uaddr & PAGE_MASK, 1, FOLL_WRITE, pages);
  386. if (ret < 0)
  387. goto out;
  388. sg_set_page(&db_tab->page[i].mem, pages[0], MTHCA_ICM_PAGE_SIZE,
  389. uaddr & ~PAGE_MASK);
  390. ret = pci_map_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  391. if (ret < 0) {
  392. put_page(pages[0]);
  393. goto out;
  394. }
  395. ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem),
  396. mthca_uarc_virt(dev, uar, i));
  397. if (ret) {
  398. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  399. put_page(sg_page(&db_tab->page[i].mem));
  400. goto out;
  401. }
  402. db_tab->page[i].uvirt = uaddr;
  403. db_tab->page[i].refcount = 1;
  404. out:
  405. mutex_unlock(&db_tab->mutex);
  406. return ret;
  407. }
  408. void mthca_unmap_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  409. struct mthca_user_db_table *db_tab, int index)
  410. {
  411. if (!mthca_is_memfree(dev))
  412. return;
  413. /*
  414. * To make our bookkeeping simpler, we don't unmap DB
  415. * pages until we clean up the whole db table.
  416. */
  417. mutex_lock(&db_tab->mutex);
  418. --db_tab->page[index / MTHCA_DB_REC_PER_PAGE].refcount;
  419. mutex_unlock(&db_tab->mutex);
  420. }
  421. struct mthca_user_db_table *mthca_init_user_db_tab(struct mthca_dev *dev)
  422. {
  423. struct mthca_user_db_table *db_tab;
  424. int npages;
  425. int i;
  426. if (!mthca_is_memfree(dev))
  427. return NULL;
  428. npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE;
  429. db_tab = kmalloc(struct_size(db_tab, page, npages), GFP_KERNEL);
  430. if (!db_tab)
  431. return ERR_PTR(-ENOMEM);
  432. mutex_init(&db_tab->mutex);
  433. for (i = 0; i < npages; ++i) {
  434. db_tab->page[i].refcount = 0;
  435. db_tab->page[i].uvirt = 0;
  436. sg_init_table(&db_tab->page[i].mem, 1);
  437. }
  438. return db_tab;
  439. }
  440. void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar,
  441. struct mthca_user_db_table *db_tab)
  442. {
  443. int i;
  444. if (!mthca_is_memfree(dev))
  445. return;
  446. for (i = 0; i < dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; ++i) {
  447. if (db_tab->page[i].uvirt) {
  448. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1);
  449. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  450. put_page(sg_page(&db_tab->page[i].mem));
  451. }
  452. }
  453. kfree(db_tab);
  454. }
  455. int mthca_alloc_db(struct mthca_dev *dev, enum mthca_db_type type,
  456. u32 qn, __be32 **db)
  457. {
  458. int group;
  459. int start, end, dir;
  460. int i, j;
  461. struct mthca_db_page *page;
  462. int ret = 0;
  463. mutex_lock(&dev->db_tab->mutex);
  464. switch (type) {
  465. case MTHCA_DB_TYPE_CQ_ARM:
  466. case MTHCA_DB_TYPE_SQ:
  467. group = 0;
  468. start = 0;
  469. end = dev->db_tab->max_group1;
  470. dir = 1;
  471. break;
  472. case MTHCA_DB_TYPE_CQ_SET_CI:
  473. case MTHCA_DB_TYPE_RQ:
  474. case MTHCA_DB_TYPE_SRQ:
  475. group = 1;
  476. start = dev->db_tab->npages - 1;
  477. end = dev->db_tab->min_group2;
  478. dir = -1;
  479. break;
  480. default:
  481. ret = -EINVAL;
  482. goto out;
  483. }
  484. for (i = start; i != end; i += dir)
  485. if (dev->db_tab->page[i].db_rec &&
  486. !bitmap_full(dev->db_tab->page[i].used,
  487. MTHCA_DB_REC_PER_PAGE)) {
  488. page = dev->db_tab->page + i;
  489. goto found;
  490. }
  491. for (i = start; i != end; i += dir)
  492. if (!dev->db_tab->page[i].db_rec) {
  493. page = dev->db_tab->page + i;
  494. goto alloc;
  495. }
  496. if (dev->db_tab->max_group1 >= dev->db_tab->min_group2 - 1) {
  497. ret = -ENOMEM;
  498. goto out;
  499. }
  500. if (group == 0)
  501. ++dev->db_tab->max_group1;
  502. else
  503. --dev->db_tab->min_group2;
  504. page = dev->db_tab->page + end;
  505. alloc:
  506. page->db_rec = dma_zalloc_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  507. &page->mapping, GFP_KERNEL);
  508. if (!page->db_rec) {
  509. ret = -ENOMEM;
  510. goto out;
  511. }
  512. ret = mthca_MAP_ICM_page(dev, page->mapping,
  513. mthca_uarc_virt(dev, &dev->driver_uar, i));
  514. if (ret) {
  515. dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  516. page->db_rec, page->mapping);
  517. goto out;
  518. }
  519. bitmap_zero(page->used, MTHCA_DB_REC_PER_PAGE);
  520. found:
  521. j = find_first_zero_bit(page->used, MTHCA_DB_REC_PER_PAGE);
  522. set_bit(j, page->used);
  523. if (group == 1)
  524. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  525. ret = i * MTHCA_DB_REC_PER_PAGE + j;
  526. page->db_rec[j] = cpu_to_be64((qn << 8) | (type << 5));
  527. *db = (__be32 *) &page->db_rec[j];
  528. out:
  529. mutex_unlock(&dev->db_tab->mutex);
  530. return ret;
  531. }
  532. void mthca_free_db(struct mthca_dev *dev, int type, int db_index)
  533. {
  534. int i, j;
  535. struct mthca_db_page *page;
  536. i = db_index / MTHCA_DB_REC_PER_PAGE;
  537. j = db_index % MTHCA_DB_REC_PER_PAGE;
  538. page = dev->db_tab->page + i;
  539. mutex_lock(&dev->db_tab->mutex);
  540. page->db_rec[j] = 0;
  541. if (i >= dev->db_tab->min_group2)
  542. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  543. clear_bit(j, page->used);
  544. if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) &&
  545. i >= dev->db_tab->max_group1 - 1) {
  546. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1);
  547. dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  548. page->db_rec, page->mapping);
  549. page->db_rec = NULL;
  550. if (i == dev->db_tab->max_group1) {
  551. --dev->db_tab->max_group1;
  552. /* XXX may be able to unmap more pages now */
  553. }
  554. if (i == dev->db_tab->min_group2)
  555. ++dev->db_tab->min_group2;
  556. }
  557. mutex_unlock(&dev->db_tab->mutex);
  558. }
  559. int mthca_init_db_tab(struct mthca_dev *dev)
  560. {
  561. int i;
  562. if (!mthca_is_memfree(dev))
  563. return 0;
  564. dev->db_tab = kmalloc(sizeof *dev->db_tab, GFP_KERNEL);
  565. if (!dev->db_tab)
  566. return -ENOMEM;
  567. mutex_init(&dev->db_tab->mutex);
  568. dev->db_tab->npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE;
  569. dev->db_tab->max_group1 = 0;
  570. dev->db_tab->min_group2 = dev->db_tab->npages - 1;
  571. dev->db_tab->page = kmalloc_array(dev->db_tab->npages,
  572. sizeof(*dev->db_tab->page),
  573. GFP_KERNEL);
  574. if (!dev->db_tab->page) {
  575. kfree(dev->db_tab);
  576. return -ENOMEM;
  577. }
  578. for (i = 0; i < dev->db_tab->npages; ++i)
  579. dev->db_tab->page[i].db_rec = NULL;
  580. return 0;
  581. }
  582. void mthca_cleanup_db_tab(struct mthca_dev *dev)
  583. {
  584. int i;
  585. if (!mthca_is_memfree(dev))
  586. return;
  587. /*
  588. * Because we don't always free our UARC pages when they
  589. * become empty to make mthca_free_db() simpler we need to
  590. * make a sweep through the doorbell pages and free any
  591. * leftover pages now.
  592. */
  593. for (i = 0; i < dev->db_tab->npages; ++i) {
  594. if (!dev->db_tab->page[i].db_rec)
  595. continue;
  596. if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE))
  597. mthca_warn(dev, "Kernel UARC page %d not empty\n", i);
  598. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1);
  599. dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  600. dev->db_tab->page[i].db_rec,
  601. dev->db_tab->page[i].mapping);
  602. }
  603. kfree(dev->db_tab->page);
  604. kfree(dev->db_tab);
  605. }