pci.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Intel(R) Trace Hub pci driver
  4. *
  5. * Copyright (C) 2014-2015 Intel Corporation.
  6. */
  7. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  8. #include <linux/types.h>
  9. #include <linux/module.h>
  10. #include <linux/device.h>
  11. #include <linux/sysfs.h>
  12. #include <linux/pci.h>
  13. #include "intel_th.h"
  14. #define DRIVER_NAME "intel_th_pci"
  15. #define BAR_MASK (BIT(TH_MMIO_CONFIG) | BIT(TH_MMIO_SW))
  16. #define PCI_REG_NPKDSC 0x80
  17. #define NPKDSC_TSACT BIT(5)
  18. static int intel_th_pci_activate(struct intel_th *th)
  19. {
  20. struct pci_dev *pdev = to_pci_dev(th->dev);
  21. u32 npkdsc;
  22. int err;
  23. if (!INTEL_TH_CAP(th, tscu_enable))
  24. return 0;
  25. err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc);
  26. if (!err) {
  27. npkdsc |= NPKDSC_TSACT;
  28. err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc);
  29. }
  30. if (err)
  31. dev_err(&pdev->dev, "failed to read NPKDSC register\n");
  32. return err;
  33. }
  34. static void intel_th_pci_deactivate(struct intel_th *th)
  35. {
  36. struct pci_dev *pdev = to_pci_dev(th->dev);
  37. u32 npkdsc;
  38. int err;
  39. if (!INTEL_TH_CAP(th, tscu_enable))
  40. return;
  41. err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc);
  42. if (!err) {
  43. npkdsc |= NPKDSC_TSACT;
  44. err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc);
  45. }
  46. if (err)
  47. dev_err(&pdev->dev, "failed to read NPKDSC register\n");
  48. }
  49. static int intel_th_pci_probe(struct pci_dev *pdev,
  50. const struct pci_device_id *id)
  51. {
  52. struct intel_th_drvdata *drvdata = (void *)id->driver_data;
  53. struct intel_th *th;
  54. int err;
  55. err = pcim_enable_device(pdev);
  56. if (err)
  57. return err;
  58. err = pcim_iomap_regions_request_all(pdev, BAR_MASK, DRIVER_NAME);
  59. if (err)
  60. return err;
  61. th = intel_th_alloc(&pdev->dev, drvdata, pdev->resource,
  62. DEVICE_COUNT_RESOURCE, pdev->irq);
  63. if (IS_ERR(th))
  64. return PTR_ERR(th);
  65. th->activate = intel_th_pci_activate;
  66. th->deactivate = intel_th_pci_deactivate;
  67. pci_set_master(pdev);
  68. return 0;
  69. }
  70. static void intel_th_pci_remove(struct pci_dev *pdev)
  71. {
  72. struct intel_th *th = pci_get_drvdata(pdev);
  73. intel_th_free(th);
  74. }
  75. static const struct intel_th_drvdata intel_th_2x = {
  76. .tscu_enable = 1,
  77. };
  78. static const struct pci_device_id intel_th_pci_id_table[] = {
  79. {
  80. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9d26),
  81. .driver_data = (kernel_ulong_t)0,
  82. },
  83. {
  84. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa126),
  85. .driver_data = (kernel_ulong_t)0,
  86. },
  87. {
  88. /* Apollo Lake */
  89. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a8e),
  90. .driver_data = (kernel_ulong_t)0,
  91. },
  92. {
  93. /* Broxton */
  94. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0a80),
  95. .driver_data = (kernel_ulong_t)0,
  96. },
  97. {
  98. /* Broxton B-step */
  99. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1a8e),
  100. .driver_data = (kernel_ulong_t)0,
  101. },
  102. {
  103. /* Kaby Lake PCH-H */
  104. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa2a6),
  105. .driver_data = (kernel_ulong_t)0,
  106. },
  107. {
  108. /* Denverton */
  109. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x19e1),
  110. .driver_data = (kernel_ulong_t)0,
  111. },
  112. {
  113. /* Lewisburg PCH */
  114. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa1a6),
  115. .driver_data = (kernel_ulong_t)0,
  116. },
  117. {
  118. /* Lewisburg PCH */
  119. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa226),
  120. .driver_data = (kernel_ulong_t)0,
  121. },
  122. {
  123. /* Gemini Lake */
  124. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x318e),
  125. .driver_data = (kernel_ulong_t)&intel_th_2x,
  126. },
  127. {
  128. /* Cannon Lake H */
  129. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa326),
  130. .driver_data = (kernel_ulong_t)&intel_th_2x,
  131. },
  132. {
  133. /* Cannon Lake LP */
  134. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9da6),
  135. .driver_data = (kernel_ulong_t)&intel_th_2x,
  136. },
  137. {
  138. /* Cedar Fork PCH */
  139. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x18e1),
  140. .driver_data = (kernel_ulong_t)&intel_th_2x,
  141. },
  142. {
  143. /* Ice Lake PCH */
  144. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x34a6),
  145. .driver_data = (kernel_ulong_t)&intel_th_2x,
  146. },
  147. {
  148. /* Comet Lake */
  149. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x02a6),
  150. .driver_data = (kernel_ulong_t)&intel_th_2x,
  151. },
  152. {
  153. /* Comet Lake PCH */
  154. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x06a6),
  155. .driver_data = (kernel_ulong_t)&intel_th_2x,
  156. },
  157. {
  158. /* Comet Lake PCH-V */
  159. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa3a6),
  160. .driver_data = (kernel_ulong_t)&intel_th_2x,
  161. },
  162. {
  163. /* Ice Lake NNPI */
  164. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x45c5),
  165. .driver_data = (kernel_ulong_t)&intel_th_2x,
  166. },
  167. {
  168. /* Ice Lake CPU */
  169. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8a29),
  170. .driver_data = (kernel_ulong_t)&intel_th_2x,
  171. },
  172. {
  173. /* Tiger Lake CPU */
  174. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9a33),
  175. .driver_data = (kernel_ulong_t)&intel_th_2x,
  176. },
  177. {
  178. /* Tiger Lake PCH */
  179. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa0a6),
  180. .driver_data = (kernel_ulong_t)&intel_th_2x,
  181. },
  182. {
  183. /* Jasper Lake PCH */
  184. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4da6),
  185. .driver_data = (kernel_ulong_t)&intel_th_2x,
  186. },
  187. {
  188. /* Elkhart Lake CPU */
  189. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4529),
  190. .driver_data = (kernel_ulong_t)&intel_th_2x,
  191. },
  192. {
  193. /* Elkhart Lake */
  194. PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4b26),
  195. .driver_data = (kernel_ulong_t)&intel_th_2x,
  196. },
  197. { 0 },
  198. };
  199. MODULE_DEVICE_TABLE(pci, intel_th_pci_id_table);
  200. static struct pci_driver intel_th_pci_driver = {
  201. .name = DRIVER_NAME,
  202. .id_table = intel_th_pci_id_table,
  203. .probe = intel_th_pci_probe,
  204. .remove = intel_th_pci_remove,
  205. };
  206. module_pci_driver(intel_th_pci_driver);
  207. MODULE_LICENSE("GPL v2");
  208. MODULE_DESCRIPTION("Intel(R) Trace Hub PCI controller driver");
  209. MODULE_AUTHOR("Alexander Shishkin <alexander.shishkin@intel.com>");