cc_sram_mgr.c 3.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
  3. #include "cc_driver.h"
  4. #include "cc_sram_mgr.h"
  5. /**
  6. * struct cc_sram_ctx -Internal RAM context manager
  7. * @sram_free_offset: the offset to the non-allocated area
  8. */
  9. struct cc_sram_ctx {
  10. cc_sram_addr_t sram_free_offset;
  11. };
  12. /**
  13. * cc_sram_mgr_fini() - Cleanup SRAM pool.
  14. *
  15. * @drvdata: Associated device driver context
  16. */
  17. void cc_sram_mgr_fini(struct cc_drvdata *drvdata)
  18. {
  19. /* Free "this" context */
  20. kfree(drvdata->sram_mgr_handle);
  21. }
  22. /**
  23. * cc_sram_mgr_init() - Initializes SRAM pool.
  24. * The pool starts right at the beginning of SRAM.
  25. * Returns zero for success, negative value otherwise.
  26. *
  27. * @drvdata: Associated device driver context
  28. */
  29. int cc_sram_mgr_init(struct cc_drvdata *drvdata)
  30. {
  31. struct cc_sram_ctx *ctx;
  32. dma_addr_t start = 0;
  33. struct device *dev = drvdata_to_dev(drvdata);
  34. if (drvdata->hw_rev < CC_HW_REV_712) {
  35. /* Pool starts after ROM bytes */
  36. start = (dma_addr_t)cc_ioread(drvdata,
  37. CC_REG(HOST_SEP_SRAM_THRESHOLD));
  38. if ((start & 0x3) != 0) {
  39. dev_err(dev, "Invalid SRAM offset %pad\n", &start);
  40. return -EINVAL;
  41. }
  42. }
  43. /* Allocate "this" context */
  44. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  45. if (!ctx)
  46. return -ENOMEM;
  47. ctx->sram_free_offset = start;
  48. drvdata->sram_mgr_handle = ctx;
  49. return 0;
  50. }
  51. /*!
  52. * Allocated buffer from SRAM pool.
  53. * Note: Caller is responsible to free the LAST allocated buffer.
  54. * This function does not taking care of any fragmentation may occur
  55. * by the order of calls to alloc/free.
  56. *
  57. * \param drvdata
  58. * \param size The requested bytes to allocate
  59. */
  60. cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
  61. {
  62. struct cc_sram_ctx *smgr_ctx = drvdata->sram_mgr_handle;
  63. struct device *dev = drvdata_to_dev(drvdata);
  64. cc_sram_addr_t p;
  65. if ((size & 0x3)) {
  66. dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
  67. size);
  68. return NULL_SRAM_ADDR;
  69. }
  70. if (size > (CC_CC_SRAM_SIZE - smgr_ctx->sram_free_offset)) {
  71. dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n",
  72. size, smgr_ctx->sram_free_offset);
  73. return NULL_SRAM_ADDR;
  74. }
  75. p = smgr_ctx->sram_free_offset;
  76. smgr_ctx->sram_free_offset += size;
  77. dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p);
  78. return p;
  79. }
  80. /**
  81. * cc_set_sram_desc() - Create const descriptors sequence to
  82. * set values in given array into SRAM.
  83. * Note: each const value can't exceed word size.
  84. *
  85. * @src: A pointer to array of words to set as consts.
  86. * @dst: The target SRAM buffer to set into
  87. * @nelements: The number of words in "src" array
  88. * @seq: A pointer to the given IN/OUT descriptor sequence
  89. * @seq_len: A pointer to the given IN/OUT sequence length
  90. */
  91. void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst,
  92. unsigned int nelement, struct cc_hw_desc *seq,
  93. unsigned int *seq_len)
  94. {
  95. u32 i;
  96. unsigned int idx = *seq_len;
  97. for (i = 0; i < nelement; i++, idx++) {
  98. hw_desc_init(&seq[idx]);
  99. set_din_const(&seq[idx], src[i], sizeof(u32));
  100. set_dout_sram(&seq[idx], dst + (i * sizeof(u32)), sizeof(u32));
  101. set_flow_mode(&seq[idx], BYPASS);
  102. }
  103. *seq_len = idx;
  104. }