error.c 9.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * CAAM Error Reporting
  4. *
  5. * Copyright 2009-2011 Freescale Semiconductor, Inc.
  6. */
  7. #include "compat.h"
  8. #include "regs.h"
  9. #include "desc.h"
  10. #include "error.h"
  11. #ifdef DEBUG
  12. #include <linux/highmem.h>
  13. void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type,
  14. int rowsize, int groupsize, struct scatterlist *sg,
  15. size_t tlen, bool ascii)
  16. {
  17. struct scatterlist *it;
  18. void *it_page;
  19. size_t len;
  20. void *buf;
  21. for (it = sg; it && tlen > 0 ; it = sg_next(it)) {
  22. /*
  23. * make sure the scatterlist's page
  24. * has a valid virtual memory mapping
  25. */
  26. it_page = kmap_atomic(sg_page(it));
  27. if (unlikely(!it_page)) {
  28. pr_err("caam_dump_sg: kmap failed\n");
  29. return;
  30. }
  31. buf = it_page + it->offset;
  32. len = min_t(size_t, tlen, it->length);
  33. print_hex_dump(level, prefix_str, prefix_type, rowsize,
  34. groupsize, buf, len, ascii);
  35. tlen -= len;
  36. kunmap_atomic(it_page);
  37. }
  38. }
  39. #else
  40. void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type,
  41. int rowsize, int groupsize, struct scatterlist *sg,
  42. size_t tlen, bool ascii)
  43. {}
  44. #endif /* DEBUG */
  45. EXPORT_SYMBOL(caam_dump_sg);
  46. static const struct {
  47. u8 value;
  48. const char *error_text;
  49. } desc_error_list[] = {
  50. { 0x00, "No error." },
  51. { 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
  52. { 0x02, "SGT Null Entry Error." },
  53. { 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
  54. { 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
  55. { 0x05, "Reserved." },
  56. { 0x06, "Invalid KEY Command" },
  57. { 0x07, "Invalid LOAD Command" },
  58. { 0x08, "Invalid STORE Command" },
  59. { 0x09, "Invalid OPERATION Command" },
  60. { 0x0A, "Invalid FIFO LOAD Command" },
  61. { 0x0B, "Invalid FIFO STORE Command" },
  62. { 0x0C, "Invalid MOVE/MOVE_LEN Command" },
  63. { 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
  64. { 0x0E, "Invalid MATH Command" },
  65. { 0x0F, "Invalid SIGNATURE Command" },
  66. { 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
  67. { 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
  68. { 0x12, "Shared Descriptor Header Error" },
  69. { 0x13, "Header Error. Invalid length or parity, or certain other problems." },
  70. { 0x14, "Burster Error. Burster has gotten to an illegal state" },
  71. { 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
  72. { 0x16, "DMA Error" },
  73. { 0x17, "Reserved." },
  74. { 0x1A, "Job failed due to JR reset" },
  75. { 0x1B, "Job failed due to Fail Mode" },
  76. { 0x1C, "DECO Watchdog timer timeout error" },
  77. { 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
  78. { 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
  79. { 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
  80. { 0x20, "DECO has completed a reset initiated via the DRR register" },
  81. { 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
  82. { 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
  83. { 0x23, "Read Input Frame error" },
  84. { 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
  85. { 0x80, "DNR (do not run) error" },
  86. { 0x81, "undefined protocol command" },
  87. { 0x82, "invalid setting in PDB" },
  88. { 0x83, "Anti-replay LATE error" },
  89. { 0x84, "Anti-replay REPLAY error" },
  90. { 0x85, "Sequence number overflow" },
  91. { 0x86, "Sigver invalid signature" },
  92. { 0x87, "DSA Sign Illegal test descriptor" },
  93. { 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
  94. { 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
  95. { 0xC1, "Blob Command error: Undefined mode" },
  96. { 0xC2, "Blob Command error: Secure Memory Blob mode error" },
  97. { 0xC4, "Blob Command error: Black Blob key or input size error" },
  98. { 0xC5, "Blob Command error: Invalid key destination" },
  99. { 0xC8, "Blob Command error: Trusted/Secure mode error" },
  100. { 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
  101. { 0xF1, "3GPP HFN matches or exceeds the Threshold" },
  102. };
  103. static const char * const cha_id_list[] = {
  104. "",
  105. "AES",
  106. "DES",
  107. "ARC4",
  108. "MDHA",
  109. "RNG",
  110. "SNOW f8",
  111. "Kasumi f8/9",
  112. "PKHA",
  113. "CRCA",
  114. "SNOW f9",
  115. "ZUCE",
  116. "ZUCA",
  117. };
  118. static const char * const err_id_list[] = {
  119. "No error.",
  120. "Mode error.",
  121. "Data size error.",
  122. "Key size error.",
  123. "PKHA A memory size error.",
  124. "PKHA B memory size error.",
  125. "Data arrived out of sequence error.",
  126. "PKHA divide-by-zero error.",
  127. "PKHA modulus even error.",
  128. "DES key parity error.",
  129. "ICV check failed.",
  130. "Hardware error.",
  131. "Unsupported CCM AAD size.",
  132. "Class 1 CHA is not reset",
  133. "Invalid CHA combination was selected",
  134. "Invalid CHA selected.",
  135. };
  136. static const char * const rng_err_id_list[] = {
  137. "",
  138. "",
  139. "",
  140. "Instantiate",
  141. "Not instantiated",
  142. "Test instantiate",
  143. "Prediction resistance",
  144. "Prediction resistance and test request",
  145. "Uninstantiate",
  146. "Secure key generation",
  147. };
  148. static void report_ccb_status(struct device *jrdev, const u32 status,
  149. const char *error)
  150. {
  151. u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
  152. JRSTA_CCBERR_CHAID_SHIFT;
  153. u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
  154. u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
  155. JRSTA_DECOERR_INDEX_SHIFT;
  156. char *idx_str;
  157. const char *cha_str = "unidentified cha_id value 0x";
  158. char cha_err_code[3] = { 0 };
  159. const char *err_str = "unidentified err_id value 0x";
  160. char err_err_code[3] = { 0 };
  161. if (status & JRSTA_DECOERR_JUMP)
  162. idx_str = "jump tgt desc idx";
  163. else
  164. idx_str = "desc idx";
  165. if (cha_id < ARRAY_SIZE(cha_id_list))
  166. cha_str = cha_id_list[cha_id];
  167. else
  168. snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
  169. if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
  170. err_id < ARRAY_SIZE(rng_err_id_list) &&
  171. strlen(rng_err_id_list[err_id])) {
  172. /* RNG-only error */
  173. err_str = rng_err_id_list[err_id];
  174. } else {
  175. err_str = err_id_list[err_id];
  176. }
  177. /*
  178. * CCB ICV check failures are part of normal operation life;
  179. * we leave the upper layers to do what they want with them.
  180. */
  181. if (err_id != JRSTA_CCBERR_ERRID_ICVCHK)
  182. dev_err(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n",
  183. status, error, idx_str, idx,
  184. cha_str, cha_err_code,
  185. err_str, err_err_code);
  186. }
  187. static void report_jump_status(struct device *jrdev, const u32 status,
  188. const char *error)
  189. {
  190. dev_err(jrdev, "%08x: %s: %s() not implemented\n",
  191. status, error, __func__);
  192. }
  193. static void report_deco_status(struct device *jrdev, const u32 status,
  194. const char *error)
  195. {
  196. u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
  197. u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
  198. JRSTA_DECOERR_INDEX_SHIFT;
  199. char *idx_str;
  200. const char *err_str = "unidentified error value 0x";
  201. char err_err_code[3] = { 0 };
  202. int i;
  203. if (status & JRSTA_DECOERR_JUMP)
  204. idx_str = "jump tgt desc idx";
  205. else
  206. idx_str = "desc idx";
  207. for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
  208. if (desc_error_list[i].value == err_id)
  209. break;
  210. if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
  211. err_str = desc_error_list[i].error_text;
  212. else
  213. snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
  214. dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
  215. status, error, idx_str, idx, err_str, err_err_code);
  216. }
  217. static void report_jr_status(struct device *jrdev, const u32 status,
  218. const char *error)
  219. {
  220. dev_err(jrdev, "%08x: %s: %s() not implemented\n",
  221. status, error, __func__);
  222. }
  223. static void report_cond_code_status(struct device *jrdev, const u32 status,
  224. const char *error)
  225. {
  226. dev_err(jrdev, "%08x: %s: %s() not implemented\n",
  227. status, error, __func__);
  228. }
  229. void caam_jr_strstatus(struct device *jrdev, u32 status)
  230. {
  231. static const struct stat_src {
  232. void (*report_ssed)(struct device *jrdev, const u32 status,
  233. const char *error);
  234. const char *error;
  235. } status_src[16] = {
  236. { NULL, "No error" },
  237. { NULL, NULL },
  238. { report_ccb_status, "CCB" },
  239. { report_jump_status, "Jump" },
  240. { report_deco_status, "DECO" },
  241. { NULL, "Queue Manager Interface" },
  242. { report_jr_status, "Job Ring" },
  243. { report_cond_code_status, "Condition Code" },
  244. { NULL, NULL },
  245. { NULL, NULL },
  246. { NULL, NULL },
  247. { NULL, NULL },
  248. { NULL, NULL },
  249. { NULL, NULL },
  250. { NULL, NULL },
  251. { NULL, NULL },
  252. };
  253. u32 ssrc = status >> JRSTA_SSRC_SHIFT;
  254. const char *error = status_src[ssrc].error;
  255. /*
  256. * If there is an error handling function, call it to report the error.
  257. * Otherwise print the error source name.
  258. */
  259. if (status_src[ssrc].report_ssed)
  260. status_src[ssrc].report_ssed(jrdev, status, error);
  261. else if (error)
  262. dev_err(jrdev, "%d: %s\n", ssrc, error);
  263. else
  264. dev_err(jrdev, "%d: unknown error source\n", ssrc);
  265. }
  266. EXPORT_SYMBOL(caam_jr_strstatus);