arm-charlcd.c 8.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for the on-board character LCD found on some ARM reference boards
  4. * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
  5. * http://en.wikipedia.org/wiki/HD44780_Character_LCD
  6. * Currently it will just display the text "ARM Linux" and the linux version
  7. *
  8. * Author: Linus Walleij <triad@df.lth.se>
  9. */
  10. #include <linux/init.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/of.h>
  14. #include <linux/completion.h>
  15. #include <linux/delay.h>
  16. #include <linux/io.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <generated/utsrelease.h>
  20. #define DRIVERNAME "arm-charlcd"
  21. #define CHARLCD_TIMEOUT (msecs_to_jiffies(1000))
  22. /* Offsets to registers */
  23. #define CHAR_COM 0x00U
  24. #define CHAR_DAT 0x04U
  25. #define CHAR_RD 0x08U
  26. #define CHAR_RAW 0x0CU
  27. #define CHAR_MASK 0x10U
  28. #define CHAR_STAT 0x14U
  29. #define CHAR_RAW_CLEAR 0x00000000U
  30. #define CHAR_RAW_VALID 0x00000100U
  31. /* Hitachi HD44780 display commands */
  32. #define HD_CLEAR 0x01U
  33. #define HD_HOME 0x02U
  34. #define HD_ENTRYMODE 0x04U
  35. #define HD_ENTRYMODE_INCREMENT 0x02U
  36. #define HD_ENTRYMODE_SHIFT 0x01U
  37. #define HD_DISPCTRL 0x08U
  38. #define HD_DISPCTRL_ON 0x04U
  39. #define HD_DISPCTRL_CURSOR_ON 0x02U
  40. #define HD_DISPCTRL_CURSOR_BLINK 0x01U
  41. #define HD_CRSR_SHIFT 0x10U
  42. #define HD_CRSR_SHIFT_DISPLAY 0x08U
  43. #define HD_CRSR_SHIFT_DISPLAY_RIGHT 0x04U
  44. #define HD_FUNCSET 0x20U
  45. #define HD_FUNCSET_8BIT 0x10U
  46. #define HD_FUNCSET_2_LINES 0x08U
  47. #define HD_FUNCSET_FONT_5X10 0x04U
  48. #define HD_SET_CGRAM 0x40U
  49. #define HD_SET_DDRAM 0x80U
  50. #define HD_BUSY_FLAG 0x80U
  51. /**
  52. * struct charlcd - Private data structure
  53. * @dev: a pointer back to containing device
  54. * @phybase: the offset to the controller in physical memory
  55. * @physize: the size of the physical page
  56. * @virtbase: the offset to the controller in virtual memory
  57. * @irq: reserved interrupt number
  58. * @complete: completion structure for the last LCD command
  59. * @init_work: delayed work structure to initialize the display on boot
  60. */
  61. struct charlcd {
  62. struct device *dev;
  63. u32 phybase;
  64. u32 physize;
  65. void __iomem *virtbase;
  66. int irq;
  67. struct completion complete;
  68. struct delayed_work init_work;
  69. };
  70. static irqreturn_t charlcd_interrupt(int irq, void *data)
  71. {
  72. struct charlcd *lcd = data;
  73. u8 status;
  74. status = readl(lcd->virtbase + CHAR_STAT) & 0x01;
  75. /* Clear IRQ */
  76. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  77. if (status)
  78. complete(&lcd->complete);
  79. else
  80. dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status);
  81. return IRQ_HANDLED;
  82. }
  83. static void charlcd_wait_complete_irq(struct charlcd *lcd)
  84. {
  85. int ret;
  86. ret = wait_for_completion_interruptible_timeout(&lcd->complete,
  87. CHARLCD_TIMEOUT);
  88. /* Disable IRQ after completion */
  89. writel(0x00, lcd->virtbase + CHAR_MASK);
  90. if (ret < 0) {
  91. dev_err(lcd->dev,
  92. "wait_for_completion_interruptible_timeout() "
  93. "returned %d waiting for ready\n", ret);
  94. return;
  95. }
  96. if (ret == 0) {
  97. dev_err(lcd->dev, "charlcd controller timed out "
  98. "waiting for ready\n");
  99. return;
  100. }
  101. }
  102. static u8 charlcd_4bit_read_char(struct charlcd *lcd)
  103. {
  104. u8 data;
  105. u32 val;
  106. int i;
  107. /* If we can, use an IRQ to wait for the data, else poll */
  108. if (lcd->irq >= 0)
  109. charlcd_wait_complete_irq(lcd);
  110. else {
  111. i = 0;
  112. val = 0;
  113. while (!(val & CHAR_RAW_VALID) && i < 10) {
  114. udelay(100);
  115. val = readl(lcd->virtbase + CHAR_RAW);
  116. i++;
  117. }
  118. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  119. }
  120. msleep(1);
  121. /* Read the 4 high bits of the data */
  122. data = readl(lcd->virtbase + CHAR_RD) & 0xf0;
  123. /*
  124. * The second read for the low bits does not trigger an IRQ
  125. * so in this case we have to poll for the 4 lower bits
  126. */
  127. i = 0;
  128. val = 0;
  129. while (!(val & CHAR_RAW_VALID) && i < 10) {
  130. udelay(100);
  131. val = readl(lcd->virtbase + CHAR_RAW);
  132. i++;
  133. }
  134. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  135. msleep(1);
  136. /* Read the 4 low bits of the data */
  137. data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f;
  138. return data;
  139. }
  140. static bool charlcd_4bit_read_bf(struct charlcd *lcd)
  141. {
  142. if (lcd->irq >= 0) {
  143. /*
  144. * If we'll use IRQs to wait for the busyflag, clear any
  145. * pending flag and enable IRQ
  146. */
  147. writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
  148. init_completion(&lcd->complete);
  149. writel(0x01, lcd->virtbase + CHAR_MASK);
  150. }
  151. readl(lcd->virtbase + CHAR_COM);
  152. return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG ? true : false;
  153. }
  154. static void charlcd_4bit_wait_busy(struct charlcd *lcd)
  155. {
  156. int retries = 50;
  157. udelay(100);
  158. while (charlcd_4bit_read_bf(lcd) && retries)
  159. retries--;
  160. if (!retries)
  161. dev_err(lcd->dev, "timeout waiting for busyflag\n");
  162. }
  163. static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd)
  164. {
  165. u32 cmdlo = (cmd << 4) & 0xf0;
  166. u32 cmdhi = (cmd & 0xf0);
  167. writel(cmdhi, lcd->virtbase + CHAR_COM);
  168. udelay(10);
  169. writel(cmdlo, lcd->virtbase + CHAR_COM);
  170. charlcd_4bit_wait_busy(lcd);
  171. }
  172. static void charlcd_4bit_char(struct charlcd *lcd, u8 ch)
  173. {
  174. u32 chlo = (ch << 4) & 0xf0;
  175. u32 chhi = (ch & 0xf0);
  176. writel(chhi, lcd->virtbase + CHAR_DAT);
  177. udelay(10);
  178. writel(chlo, lcd->virtbase + CHAR_DAT);
  179. charlcd_4bit_wait_busy(lcd);
  180. }
  181. static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str)
  182. {
  183. u8 offset;
  184. int i;
  185. /*
  186. * We support line 0, 1
  187. * Line 1 runs from 0x00..0x27
  188. * Line 2 runs from 0x28..0x4f
  189. */
  190. if (line == 0)
  191. offset = 0;
  192. else if (line == 1)
  193. offset = 0x28;
  194. else
  195. return;
  196. /* Set offset */
  197. charlcd_4bit_command(lcd, HD_SET_DDRAM | offset);
  198. /* Send string */
  199. for (i = 0; i < strlen(str) && i < 0x28; i++)
  200. charlcd_4bit_char(lcd, str[i]);
  201. }
  202. static void charlcd_4bit_init(struct charlcd *lcd)
  203. {
  204. /* These commands cannot be checked with the busy flag */
  205. writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
  206. msleep(5);
  207. writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
  208. udelay(100);
  209. writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
  210. udelay(100);
  211. /* Go to 4bit mode */
  212. writel(HD_FUNCSET, lcd->virtbase + CHAR_COM);
  213. udelay(100);
  214. /*
  215. * 4bit mode, 2 lines, 5x8 font, after this the number of lines
  216. * and the font cannot be changed until the next initialization sequence
  217. */
  218. charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES);
  219. charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
  220. charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT);
  221. charlcd_4bit_command(lcd, HD_CLEAR);
  222. charlcd_4bit_command(lcd, HD_HOME);
  223. /* Put something useful in the display */
  224. charlcd_4bit_print(lcd, 0, "ARM Linux");
  225. charlcd_4bit_print(lcd, 1, UTS_RELEASE);
  226. }
  227. static void charlcd_init_work(struct work_struct *work)
  228. {
  229. struct charlcd *lcd =
  230. container_of(work, struct charlcd, init_work.work);
  231. charlcd_4bit_init(lcd);
  232. }
  233. static int __init charlcd_probe(struct platform_device *pdev)
  234. {
  235. int ret;
  236. struct charlcd *lcd;
  237. struct resource *res;
  238. lcd = kzalloc(sizeof(struct charlcd), GFP_KERNEL);
  239. if (!lcd)
  240. return -ENOMEM;
  241. lcd->dev = &pdev->dev;
  242. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  243. if (!res) {
  244. ret = -ENOENT;
  245. goto out_no_resource;
  246. }
  247. lcd->phybase = res->start;
  248. lcd->physize = resource_size(res);
  249. if (request_mem_region(lcd->phybase, lcd->physize,
  250. DRIVERNAME) == NULL) {
  251. ret = -EBUSY;
  252. goto out_no_memregion;
  253. }
  254. lcd->virtbase = ioremap(lcd->phybase, lcd->physize);
  255. if (!lcd->virtbase) {
  256. ret = -ENOMEM;
  257. goto out_no_memregion;
  258. }
  259. lcd->irq = platform_get_irq(pdev, 0);
  260. /* If no IRQ is supplied, we'll survive without it */
  261. if (lcd->irq >= 0) {
  262. if (request_irq(lcd->irq, charlcd_interrupt, 0,
  263. DRIVERNAME, lcd)) {
  264. ret = -EIO;
  265. goto out_no_irq;
  266. }
  267. }
  268. platform_set_drvdata(pdev, lcd);
  269. /*
  270. * Initialize the display in a delayed work, because
  271. * it is VERY slow and would slow down the boot of the system.
  272. */
  273. INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work);
  274. schedule_delayed_work(&lcd->init_work, 0);
  275. dev_info(&pdev->dev, "initialized ARM character LCD at %08x\n",
  276. lcd->phybase);
  277. return 0;
  278. out_no_irq:
  279. iounmap(lcd->virtbase);
  280. out_no_memregion:
  281. release_mem_region(lcd->phybase, SZ_4K);
  282. out_no_resource:
  283. kfree(lcd);
  284. return ret;
  285. }
  286. static int charlcd_suspend(struct device *dev)
  287. {
  288. struct charlcd *lcd = dev_get_drvdata(dev);
  289. /* Power the display off */
  290. charlcd_4bit_command(lcd, HD_DISPCTRL);
  291. return 0;
  292. }
  293. static int charlcd_resume(struct device *dev)
  294. {
  295. struct charlcd *lcd = dev_get_drvdata(dev);
  296. /* Turn the display back on */
  297. charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
  298. return 0;
  299. }
  300. static const struct dev_pm_ops charlcd_pm_ops = {
  301. .suspend = charlcd_suspend,
  302. .resume = charlcd_resume,
  303. };
  304. static const struct of_device_id charlcd_match[] = {
  305. { .compatible = "arm,versatile-lcd", },
  306. {}
  307. };
  308. static struct platform_driver charlcd_driver = {
  309. .driver = {
  310. .name = DRIVERNAME,
  311. .pm = &charlcd_pm_ops,
  312. .suppress_bind_attrs = true,
  313. .of_match_table = of_match_ptr(charlcd_match),
  314. },
  315. };
  316. builtin_platform_driver_probe(charlcd_driver, charlcd_probe);