q40ints.c 7.9 KB

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  1. /*
  2. * arch/m68k/q40/q40ints.c
  3. *
  4. * Copyright (C) 1999,2001 Richard Zidlicky
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive
  8. * for more details.
  9. *
  10. * .. used to be loosely based on bvme6000ints.c
  11. *
  12. */
  13. #include <linux/types.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/irq.h>
  18. #include <asm/ptrace.h>
  19. #include <asm/traps.h>
  20. #include <asm/q40_master.h>
  21. #include <asm/q40ints.h>
  22. /*
  23. * Q40 IRQs are defined as follows:
  24. * 3,4,5,6,7,10,11,14,15 : ISA dev IRQs
  25. * 16-31: reserved
  26. * 32 : keyboard int
  27. * 33 : frame int (50/200 Hz periodic timer)
  28. * 34 : sample int (10/20 KHz periodic timer)
  29. *
  30. */
  31. static void q40_irq_handler(unsigned int, struct pt_regs *fp);
  32. static void q40_irq_enable(struct irq_data *data);
  33. static void q40_irq_disable(struct irq_data *data);
  34. unsigned short q40_ablecount[35];
  35. unsigned short q40_state[35];
  36. static unsigned int q40_irq_startup(struct irq_data *data)
  37. {
  38. unsigned int irq = data->irq;
  39. /* test for ISA ints not implemented by HW */
  40. switch (irq) {
  41. case 1: case 2: case 8: case 9:
  42. case 11: case 12: case 13:
  43. pr_warn("%s: ISA IRQ %d not implemented by HW\n", __func__,
  44. irq);
  45. /* FIXME return -ENXIO; */
  46. }
  47. return 0;
  48. }
  49. static void q40_irq_shutdown(struct irq_data *data)
  50. {
  51. }
  52. static struct irq_chip q40_irq_chip = {
  53. .name = "q40",
  54. .irq_startup = q40_irq_startup,
  55. .irq_shutdown = q40_irq_shutdown,
  56. .irq_enable = q40_irq_enable,
  57. .irq_disable = q40_irq_disable,
  58. };
  59. /*
  60. * void q40_init_IRQ (void)
  61. *
  62. * Parameters: None
  63. *
  64. * Returns: Nothing
  65. *
  66. * This function is called during kernel startup to initialize
  67. * the q40 IRQ handling routines.
  68. */
  69. static int disabled;
  70. void __init q40_init_IRQ(void)
  71. {
  72. m68k_setup_irq_controller(&q40_irq_chip, handle_simple_irq, 1,
  73. Q40_IRQ_MAX);
  74. /* setup handler for ISA ints */
  75. m68k_setup_auto_interrupt(q40_irq_handler);
  76. m68k_irq_startup_irq(IRQ_AUTO_2);
  77. m68k_irq_startup_irq(IRQ_AUTO_4);
  78. /* now enable some ints.. */
  79. master_outb(1, EXT_ENABLE_REG); /* ISA IRQ 5-15 */
  80. /* make sure keyboard IRQ is disabled */
  81. master_outb(0, KEY_IRQ_ENABLE_REG);
  82. }
  83. /*
  84. * this stuff doesn't really belong here..
  85. */
  86. int ql_ticks; /* 200Hz ticks since last jiffie */
  87. static int sound_ticks;
  88. #define SVOL 45
  89. void q40_mksound(unsigned int hz, unsigned int ticks)
  90. {
  91. /* for now ignore hz, except that hz==0 switches off sound */
  92. /* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */
  93. if (hz == 0) {
  94. if (sound_ticks)
  95. sound_ticks = 1;
  96. *DAC_LEFT = 128;
  97. *DAC_RIGHT = 128;
  98. return;
  99. }
  100. /* sound itself is done in q40_timer_int */
  101. if (sound_ticks == 0)
  102. sound_ticks = 1000; /* pretty long beep */
  103. sound_ticks = ticks << 1;
  104. }
  105. static irqreturn_t q40_timer_int(int irq, void *dev_id)
  106. {
  107. irq_handler_t timer_routine = dev_id;
  108. ql_ticks = ql_ticks ? 0 : 1;
  109. if (sound_ticks) {
  110. unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
  111. sound_ticks--;
  112. *DAC_LEFT=sval;
  113. *DAC_RIGHT=sval;
  114. }
  115. if (!ql_ticks) {
  116. unsigned long flags;
  117. local_irq_save(flags);
  118. timer_routine(0, NULL);
  119. local_irq_restore(flags);
  120. }
  121. return IRQ_HANDLED;
  122. }
  123. void q40_sched_init (irq_handler_t timer_routine)
  124. {
  125. int timer_irq;
  126. timer_irq = Q40_IRQ_FRAME;
  127. if (request_irq(timer_irq, q40_timer_int, 0, "timer", timer_routine))
  128. panic("Couldn't register timer int");
  129. master_outb(-1, FRAME_CLEAR_REG);
  130. master_outb( 1, FRAME_RATE_REG);
  131. }
  132. /*
  133. * tables to translate bits into IRQ numbers
  134. * it is a good idea to order the entries by priority
  135. *
  136. */
  137. struct IRQ_TABLE{ unsigned mask; int irq ;};
  138. #if 0
  139. static struct IRQ_TABLE iirqs[]={
  140. {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
  141. {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
  142. {0,0}};
  143. #endif
  144. static struct IRQ_TABLE eirqs[] = {
  145. { .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
  146. { .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
  147. { .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
  148. { .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
  149. { .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
  150. { .mask = Q40_IRQ7_MASK, .irq = 7 }, /* par */
  151. { .mask = Q40_IRQ5_MASK, .irq = 5 },
  152. { .mask = Q40_IRQ10_MASK, .irq = 10 },
  153. {0,0}
  154. };
  155. /* complain only this many times about spurious ints : */
  156. static int ccleirq=60; /* ISA dev IRQs*/
  157. /*static int cclirq=60;*/ /* internal */
  158. /* FIXME: add shared ints,mask,unmask,probing.... */
  159. #define IRQ_INPROGRESS 1
  160. /*static unsigned short saved_mask;*/
  161. //static int do_tint=0;
  162. #define DEBUG_Q40INT
  163. /*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */
  164. static int mext_disabled=0; /* ext irq disabled by master chip? */
  165. static int aliased_irq=0; /* how many times inside handler ?*/
  166. /* got interrupt, dispatch to ISA or keyboard/timer IRQs */
  167. static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
  168. {
  169. unsigned mir, mer;
  170. int i;
  171. //repeat:
  172. mir = master_inb(IIRQ_REG);
  173. #ifdef CONFIG_BLK_DEV_FD
  174. if ((mir & Q40_IRQ_EXT_MASK) &&
  175. (master_inb(EIRQ_REG) & Q40_IRQ6_MASK)) {
  176. floppy_hardint();
  177. return;
  178. }
  179. #endif
  180. switch (irq) {
  181. case 4:
  182. case 6:
  183. do_IRQ(Q40_IRQ_SAMPLE, fp);
  184. return;
  185. }
  186. if (mir & Q40_IRQ_FRAME_MASK) {
  187. do_IRQ(Q40_IRQ_FRAME, fp);
  188. master_outb(-1, FRAME_CLEAR_REG);
  189. }
  190. if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
  191. mer = master_inb(EIRQ_REG);
  192. for (i = 0; eirqs[i].mask; i++) {
  193. if (mer & eirqs[i].mask) {
  194. irq = eirqs[i].irq;
  195. /*
  196. * There is a little mess wrt which IRQ really caused this irq request. The
  197. * main problem is that IIRQ_REG and EIRQ_REG reflect the state when they
  198. * are read - which is long after the request came in. In theory IRQs should
  199. * not just go away but they occasionally do
  200. */
  201. if (irq > 4 && irq <= 15 && mext_disabled) {
  202. /*aliased_irq++;*/
  203. goto iirq;
  204. }
  205. if (q40_state[irq] & IRQ_INPROGRESS) {
  206. /* some handlers do local_irq_enable() for irq latency reasons, */
  207. /* however reentering an active irq handler is not permitted */
  208. #ifdef IP_USE_DISABLE
  209. /* in theory this is the better way to do it because it still */
  210. /* lets through eg the serial irqs, unfortunately it crashes */
  211. disable_irq(irq);
  212. disabled = 1;
  213. #else
  214. /*pr_warn("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",
  215. irq, disabled ? "already" : "not yet"); */
  216. fp->sr = (((fp->sr) & (~0x700))+0x200);
  217. disabled = 1;
  218. #endif
  219. goto iirq;
  220. }
  221. q40_state[irq] |= IRQ_INPROGRESS;
  222. do_IRQ(irq, fp);
  223. q40_state[irq] &= ~IRQ_INPROGRESS;
  224. /* naively enable everything, if that fails than */
  225. /* this function will be reentered immediately thus */
  226. /* getting another chance to disable the IRQ */
  227. if (disabled) {
  228. #ifdef IP_USE_DISABLE
  229. if (irq > 4) {
  230. disabled = 0;
  231. enable_irq(irq);
  232. }
  233. #else
  234. disabled = 0;
  235. /*pr_info("reenabling irq %d\n", irq); */
  236. #endif
  237. }
  238. // used to do 'goto repeat;' here, this delayed bh processing too long
  239. return;
  240. }
  241. }
  242. if (mer && ccleirq > 0 && !aliased_irq) {
  243. pr_warn("ISA interrupt from unknown source? EIRQ_REG = %x\n",
  244. mer);
  245. ccleirq--;
  246. }
  247. }
  248. iirq:
  249. mir = master_inb(IIRQ_REG);
  250. /* should test whether keyboard irq is really enabled, doing it in defhand */
  251. if (mir & Q40_IRQ_KEYB_MASK)
  252. do_IRQ(Q40_IRQ_KEYBOARD, fp);
  253. return;
  254. }
  255. void q40_irq_enable(struct irq_data *data)
  256. {
  257. unsigned int irq = data->irq;
  258. if (irq >= 5 && irq <= 15) {
  259. mext_disabled--;
  260. if (mext_disabled > 0)
  261. pr_warn("q40_irq_enable : nested disable/enable\n");
  262. if (mext_disabled == 0)
  263. master_outb(1, EXT_ENABLE_REG);
  264. }
  265. }
  266. void q40_irq_disable(struct irq_data *data)
  267. {
  268. unsigned int irq = data->irq;
  269. /* disable ISA iqs : only do something if the driver has been
  270. * verified to be Q40 "compatible" - right now IDE, NE2K
  271. * Any driver should not attempt to sleep across disable_irq !!
  272. */
  273. if (irq >= 5 && irq <= 15) {
  274. master_outb(0, EXT_ENABLE_REG);
  275. mext_disabled++;
  276. if (mext_disabled > 1)
  277. pr_info("disable_irq nesting count %d\n",
  278. mext_disabled);
  279. }
  280. }