rd88f5181l-fxo-setup.c 4.8 KB

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  1. /*
  2. * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
  3. *
  4. * Marvell Orion-VoIP FXO Reference Design Setup
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pci.h>
  15. #include <linux/irq.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/mv643xx_eth.h>
  18. #include <linux/ethtool.h>
  19. #include <net/dsa.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/pci.h>
  23. #include "common.h"
  24. #include "mpp.h"
  25. #include "orion5x.h"
  26. /*****************************************************************************
  27. * RD-88F5181L FXO Info
  28. ****************************************************************************/
  29. /*
  30. * 8M NOR flash Device bus boot chip select
  31. */
  32. #define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
  33. #define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
  34. /*****************************************************************************
  35. * 8M NOR Flash on Device bus Boot chip select
  36. ****************************************************************************/
  37. static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
  38. .width = 1,
  39. };
  40. static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
  41. .flags = IORESOURCE_MEM,
  42. .start = RD88F5181L_FXO_NOR_BOOT_BASE,
  43. .end = RD88F5181L_FXO_NOR_BOOT_BASE +
  44. RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
  45. };
  46. static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
  47. .name = "physmap-flash",
  48. .id = 0,
  49. .dev = {
  50. .platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
  51. },
  52. .num_resources = 1,
  53. .resource = &rd88f5181l_fxo_nor_boot_flash_resource,
  54. };
  55. /*****************************************************************************
  56. * General Setup
  57. ****************************************************************************/
  58. static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
  59. MPP0_GPIO, /* LED1 CardBus LED (front panel) */
  60. MPP1_GPIO, /* PCI_intA */
  61. MPP2_GPIO, /* Hard Reset / Factory Init*/
  62. MPP3_GPIO, /* FXS or DAA select */
  63. MPP4_GPIO, /* LED6 - phone LED (front panel) */
  64. MPP5_GPIO, /* LED5 - phone LED (front panel) */
  65. MPP6_PCI_CLK, /* CPU PCI refclk */
  66. MPP7_PCI_CLK, /* PCI/PCIe refclk */
  67. MPP8_GPIO, /* CardBus reset */
  68. MPP9_GPIO, /* GE_RXERR */
  69. MPP10_GPIO, /* LED2 MiniPCI LED (front panel) */
  70. MPP11_GPIO, /* Lifeline control */
  71. MPP12_GIGE, /* GE_TXD[4] */
  72. MPP13_GIGE, /* GE_TXD[5] */
  73. MPP14_GIGE, /* GE_TXD[6] */
  74. MPP15_GIGE, /* GE_TXD[7] */
  75. MPP16_GIGE, /* GE_RXD[4] */
  76. MPP17_GIGE, /* GE_RXD[5] */
  77. MPP18_GIGE, /* GE_RXD[6] */
  78. MPP19_GIGE, /* GE_RXD[7] */
  79. 0,
  80. };
  81. static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
  82. .phy_addr = MV643XX_ETH_PHY_NONE,
  83. .speed = SPEED_1000,
  84. .duplex = DUPLEX_FULL,
  85. };
  86. static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
  87. .port_names[0] = "lan2",
  88. .port_names[1] = "lan1",
  89. .port_names[2] = "wan",
  90. .port_names[3] = "cpu",
  91. .port_names[5] = "lan4",
  92. .port_names[7] = "lan3",
  93. };
  94. static void __init rd88f5181l_fxo_init(void)
  95. {
  96. /*
  97. * Setup basic Orion functions. Need to be called early.
  98. */
  99. orion5x_init();
  100. orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
  101. /*
  102. * Configure peripherals.
  103. */
  104. orion5x_ehci0_init();
  105. orion5x_eth_init(&rd88f5181l_fxo_eth_data);
  106. orion5x_eth_switch_init(&rd88f5181l_fxo_switch_chip_data);
  107. orion5x_uart0_init();
  108. mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
  109. ORION_MBUS_DEVBUS_BOOT_ATTR,
  110. RD88F5181L_FXO_NOR_BOOT_BASE,
  111. RD88F5181L_FXO_NOR_BOOT_SIZE);
  112. platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
  113. }
  114. static int __init
  115. rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  116. {
  117. int irq;
  118. /*
  119. * Check for devices with hard-wired IRQs.
  120. */
  121. irq = orion5x_pci_map_irq(dev, slot, pin);
  122. if (irq != -1)
  123. return irq;
  124. /*
  125. * Mini-PCI / Cardbus slot.
  126. */
  127. return gpio_to_irq(1);
  128. }
  129. static struct hw_pci rd88f5181l_fxo_pci __initdata = {
  130. .nr_controllers = 2,
  131. .setup = orion5x_pci_sys_setup,
  132. .scan = orion5x_pci_sys_scan_bus,
  133. .map_irq = rd88f5181l_fxo_pci_map_irq,
  134. };
  135. static int __init rd88f5181l_fxo_pci_init(void)
  136. {
  137. if (machine_is_rd88f5181l_fxo()) {
  138. orion5x_pci_set_cardbus_mode();
  139. pci_common_init(&rd88f5181l_fxo_pci);
  140. }
  141. return 0;
  142. }
  143. subsys_initcall(rd88f5181l_fxo_pci_init);
  144. MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
  145. /* Maintainer: Nicolas Pitre <nico@marvell.com> */
  146. .atag_offset = 0x100,
  147. .nr_irqs = ORION5X_NR_IRQS,
  148. .init_machine = rd88f5181l_fxo_init,
  149. .map_io = orion5x_map_io,
  150. .init_early = orion5x_init_early,
  151. .init_irq = orion5x_init_irq,
  152. .init_time = orion5x_timer_init,
  153. .fixup = tag_fixup_mem32,
  154. .restart = orion5x_restart,
  155. MACHINE_END