gbpc1.dts 2.1 KB

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  1. /dts-v1/;
  2. #include "mt7621.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "gnubee,gb-pc1", "mediatek,mt7621-soc";
  7. model = "GB-PC1";
  8. memory@0 {
  9. device_type = "memory";
  10. reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
  11. };
  12. chosen {
  13. bootargs = "console=ttyS0,57600";
  14. };
  15. palmbus: palmbus@1E000000 {
  16. i2c@900 {
  17. status = "okay";
  18. };
  19. };
  20. gpio-keys {
  21. compatible = "gpio-keys";
  22. reset {
  23. label = "reset";
  24. gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
  25. linux,code = <KEY_RESTART>;
  26. };
  27. };
  28. gpio-leds {
  29. compatible = "gpio-leds";
  30. system {
  31. label = "gb-pc1:green:system";
  32. gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
  33. };
  34. status {
  35. label = "gb-pc1:green:status";
  36. gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
  37. };
  38. lan1 {
  39. label = "gb-pc1:green:lan1";
  40. gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
  41. };
  42. lan2 {
  43. label = "gb-pc1:green:lan2";
  44. gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
  45. };
  46. };
  47. };
  48. &sdhci {
  49. status = "okay";
  50. };
  51. &spi0 {
  52. status = "okay";
  53. m25p80@0 {
  54. #address-cells = <1>;
  55. #size-cells = <1>;
  56. compatible = "jedec,spi-nor";
  57. reg = <0>;
  58. spi-max-frequency = <50000000>;
  59. partition@0 {
  60. label = "u-boot";
  61. reg = <0x0 0x30000>;
  62. read-only;
  63. };
  64. partition@30000 {
  65. label = "u-boot-env";
  66. reg = <0x30000 0x10000>;
  67. read-only;
  68. };
  69. factory: partition@40000 {
  70. label = "factory";
  71. reg = <0x40000 0x10000>;
  72. read-only;
  73. };
  74. partition@50000 {
  75. label = "firmware";
  76. reg = <0x50000 0x1FB0000>;
  77. };
  78. };
  79. };
  80. &sysclock {
  81. compatible = "fixed-clock";
  82. /* This is normally 1/4 of cpuclock */
  83. clock-frequency = <225000000>;
  84. };
  85. &cpuclock {
  86. compatible = "fixed-clock";
  87. clock-frequency = <900000000>;
  88. };
  89. &pcie {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&pcie_pins>;
  92. status = "okay";
  93. };
  94. &ethernet {
  95. //mtd-mac-address = <&factory 0xe000>;
  96. gmac1: mac@0 {
  97. compatible = "mediatek,eth-mac";
  98. reg = <0>;
  99. phy-handle = <&phy1>;
  100. };
  101. mdio-bus {
  102. phy1: ethernet-phy@1 {
  103. reg = <1>;
  104. phy-mode = "rgmii";
  105. };
  106. };
  107. };
  108. &pinctrl {
  109. state_default: pinctrl0 {
  110. gpio {
  111. ralink,group = "wdt", "rgmii2", "uart3";
  112. ralink,function = "gpio";
  113. };
  114. };
  115. };