rtc-rv3029c2.c 23 KB

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  1. /*
  2. * Micro Crystal RV-3029 / RV-3049 rtc class driver
  3. *
  4. * Author: Gregory Hermant <gregory.hermant@calao-systems.com>
  5. * Michael Buesch <m@bues.ch>
  6. *
  7. * based on previously existing rtc class drivers
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/bcd.h>
  18. #include <linux/rtc.h>
  19. #include <linux/delay.h>
  20. #include <linux/of.h>
  21. #include <linux/hwmon.h>
  22. #include <linux/hwmon-sysfs.h>
  23. #include <linux/regmap.h>
  24. /* Register map */
  25. /* control section */
  26. #define RV3029_ONOFF_CTRL 0x00
  27. #define RV3029_ONOFF_CTRL_WE BIT(0)
  28. #define RV3029_ONOFF_CTRL_TE BIT(1)
  29. #define RV3029_ONOFF_CTRL_TAR BIT(2)
  30. #define RV3029_ONOFF_CTRL_EERE BIT(3)
  31. #define RV3029_ONOFF_CTRL_SRON BIT(4)
  32. #define RV3029_ONOFF_CTRL_TD0 BIT(5)
  33. #define RV3029_ONOFF_CTRL_TD1 BIT(6)
  34. #define RV3029_ONOFF_CTRL_CLKINT BIT(7)
  35. #define RV3029_IRQ_CTRL 0x01
  36. #define RV3029_IRQ_CTRL_AIE BIT(0)
  37. #define RV3029_IRQ_CTRL_TIE BIT(1)
  38. #define RV3029_IRQ_CTRL_V1IE BIT(2)
  39. #define RV3029_IRQ_CTRL_V2IE BIT(3)
  40. #define RV3029_IRQ_CTRL_SRIE BIT(4)
  41. #define RV3029_IRQ_FLAGS 0x02
  42. #define RV3029_IRQ_FLAGS_AF BIT(0)
  43. #define RV3029_IRQ_FLAGS_TF BIT(1)
  44. #define RV3029_IRQ_FLAGS_V1IF BIT(2)
  45. #define RV3029_IRQ_FLAGS_V2IF BIT(3)
  46. #define RV3029_IRQ_FLAGS_SRF BIT(4)
  47. #define RV3029_STATUS 0x03
  48. #define RV3029_STATUS_VLOW1 BIT(2)
  49. #define RV3029_STATUS_VLOW2 BIT(3)
  50. #define RV3029_STATUS_SR BIT(4)
  51. #define RV3029_STATUS_PON BIT(5)
  52. #define RV3029_STATUS_EEBUSY BIT(7)
  53. #define RV3029_RST_CTRL 0x04
  54. #define RV3029_RST_CTRL_SYSR BIT(4)
  55. #define RV3029_CONTROL_SECTION_LEN 0x05
  56. /* watch section */
  57. #define RV3029_W_SEC 0x08
  58. #define RV3029_W_MINUTES 0x09
  59. #define RV3029_W_HOURS 0x0A
  60. #define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */
  61. #define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */
  62. #define RV3029_W_DATE 0x0B
  63. #define RV3029_W_DAYS 0x0C
  64. #define RV3029_W_MONTHS 0x0D
  65. #define RV3029_W_YEARS 0x0E
  66. #define RV3029_WATCH_SECTION_LEN 0x07
  67. /* alarm section */
  68. #define RV3029_A_SC 0x10
  69. #define RV3029_A_MN 0x11
  70. #define RV3029_A_HR 0x12
  71. #define RV3029_A_DT 0x13
  72. #define RV3029_A_DW 0x14
  73. #define RV3029_A_MO 0x15
  74. #define RV3029_A_YR 0x16
  75. #define RV3029_A_AE_X BIT(7)
  76. #define RV3029_ALARM_SECTION_LEN 0x07
  77. /* timer section */
  78. #define RV3029_TIMER_LOW 0x18
  79. #define RV3029_TIMER_HIGH 0x19
  80. /* temperature section */
  81. #define RV3029_TEMP_PAGE 0x20
  82. /* eeprom data section */
  83. #define RV3029_E2P_EEDATA1 0x28
  84. #define RV3029_E2P_EEDATA2 0x29
  85. #define RV3029_E2PDATA_SECTION_LEN 0x02
  86. /* eeprom control section */
  87. #define RV3029_CONTROL_E2P_EECTRL 0x30
  88. #define RV3029_EECTRL_THP BIT(0) /* temp scan interval */
  89. #define RV3029_EECTRL_THE BIT(1) /* thermometer enable */
  90. #define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */
  91. #define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */
  92. #define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */
  93. #define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */
  94. #define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */
  95. #define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */
  96. #define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\
  97. RV3029_TRICKLE_5K |\
  98. RV3029_TRICKLE_20K |\
  99. RV3029_TRICKLE_80K)
  100. #define RV3029_TRICKLE_SHIFT 4
  101. #define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */
  102. #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
  103. #define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */
  104. #define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */
  105. #define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */
  106. /* user ram section */
  107. #define RV3029_USR1_RAM_PAGE 0x38
  108. #define RV3029_USR1_SECTION_LEN 0x04
  109. #define RV3029_USR2_RAM_PAGE 0x3C
  110. #define RV3029_USR2_SECTION_LEN 0x04
  111. struct rv3029_data {
  112. struct device *dev;
  113. struct rtc_device *rtc;
  114. struct regmap *regmap;
  115. int irq;
  116. };
  117. static int rv3029_read_regs(struct device *dev, u8 reg, u8 *buf,
  118. unsigned int len)
  119. {
  120. struct rv3029_data *rv3029 = dev_get_drvdata(dev);
  121. if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
  122. (reg + len > RV3029_USR1_RAM_PAGE + 8))
  123. return -EINVAL;
  124. return regmap_bulk_read(rv3029->regmap, reg, buf, len);
  125. }
  126. static int rv3029_write_regs(struct device *dev, u8 reg, u8 const buf[],
  127. unsigned int len)
  128. {
  129. struct rv3029_data *rv3029 = dev_get_drvdata(dev);
  130. if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
  131. (reg + len > RV3029_USR1_RAM_PAGE + 8))
  132. return -EINVAL;
  133. return regmap_bulk_write(rv3029->regmap, reg, buf, len);
  134. }
  135. static int rv3029_update_bits(struct device *dev, u8 reg, u8 mask, u8 set)
  136. {
  137. u8 buf;
  138. int ret;
  139. ret = rv3029_read_regs(dev, reg, &buf, 1);
  140. if (ret < 0)
  141. return ret;
  142. buf &= ~mask;
  143. buf |= set & mask;
  144. ret = rv3029_write_regs(dev, reg, &buf, 1);
  145. if (ret < 0)
  146. return ret;
  147. return 0;
  148. }
  149. static int rv3029_get_sr(struct device *dev, u8 *buf)
  150. {
  151. int ret = rv3029_read_regs(dev, RV3029_STATUS, buf, 1);
  152. if (ret < 0)
  153. return -EIO;
  154. dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
  155. return 0;
  156. }
  157. static int rv3029_set_sr(struct device *dev, u8 val)
  158. {
  159. u8 buf[1];
  160. int sr;
  161. buf[0] = val;
  162. sr = rv3029_write_regs(dev, RV3029_STATUS, buf, 1);
  163. dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
  164. if (sr < 0)
  165. return -EIO;
  166. return 0;
  167. }
  168. static int rv3029_eeprom_busywait(struct device *dev)
  169. {
  170. int i, ret;
  171. u8 sr;
  172. for (i = 100; i > 0; i--) {
  173. ret = rv3029_get_sr(dev, &sr);
  174. if (ret < 0)
  175. break;
  176. if (!(sr & RV3029_STATUS_EEBUSY))
  177. break;
  178. usleep_range(1000, 10000);
  179. }
  180. if (i <= 0) {
  181. dev_err(dev, "EEPROM busy wait timeout.\n");
  182. return -ETIMEDOUT;
  183. }
  184. return ret;
  185. }
  186. static int rv3029_eeprom_exit(struct device *dev)
  187. {
  188. /* Re-enable eeprom refresh */
  189. return rv3029_update_bits(dev, RV3029_ONOFF_CTRL,
  190. RV3029_ONOFF_CTRL_EERE,
  191. RV3029_ONOFF_CTRL_EERE);
  192. }
  193. static int rv3029_eeprom_enter(struct device *dev)
  194. {
  195. int ret;
  196. u8 sr;
  197. /* Check whether we are in the allowed voltage range. */
  198. ret = rv3029_get_sr(dev, &sr);
  199. if (ret < 0)
  200. return ret;
  201. if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
  202. /* We clear the bits and retry once just in case
  203. * we had a brown out in early startup.
  204. */
  205. sr &= ~RV3029_STATUS_VLOW1;
  206. sr &= ~RV3029_STATUS_VLOW2;
  207. ret = rv3029_set_sr(dev, sr);
  208. if (ret < 0)
  209. return ret;
  210. usleep_range(1000, 10000);
  211. ret = rv3029_get_sr(dev, &sr);
  212. if (ret < 0)
  213. return ret;
  214. if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
  215. dev_err(dev,
  216. "Supply voltage is too low to safely access the EEPROM.\n");
  217. return -ENODEV;
  218. }
  219. }
  220. /* Disable eeprom refresh. */
  221. ret = rv3029_update_bits(dev, RV3029_ONOFF_CTRL, RV3029_ONOFF_CTRL_EERE,
  222. 0);
  223. if (ret < 0)
  224. return ret;
  225. /* Wait for any previous eeprom accesses to finish. */
  226. ret = rv3029_eeprom_busywait(dev);
  227. if (ret < 0)
  228. rv3029_eeprom_exit(dev);
  229. return ret;
  230. }
  231. static int rv3029_eeprom_read(struct device *dev, u8 reg,
  232. u8 buf[], size_t len)
  233. {
  234. int ret, err;
  235. err = rv3029_eeprom_enter(dev);
  236. if (err < 0)
  237. return err;
  238. ret = rv3029_read_regs(dev, reg, buf, len);
  239. err = rv3029_eeprom_exit(dev);
  240. if (err < 0)
  241. return err;
  242. return ret;
  243. }
  244. static int rv3029_eeprom_write(struct device *dev, u8 reg,
  245. u8 const buf[], size_t len)
  246. {
  247. int ret, err;
  248. size_t i;
  249. u8 tmp;
  250. err = rv3029_eeprom_enter(dev);
  251. if (err < 0)
  252. return err;
  253. for (i = 0; i < len; i++, reg++) {
  254. ret = rv3029_read_regs(dev, reg, &tmp, 1);
  255. if (ret < 0)
  256. break;
  257. if (tmp != buf[i]) {
  258. ret = rv3029_write_regs(dev, reg, &buf[i], 1);
  259. if (ret < 0)
  260. break;
  261. }
  262. ret = rv3029_eeprom_busywait(dev);
  263. if (ret < 0)
  264. break;
  265. }
  266. err = rv3029_eeprom_exit(dev);
  267. if (err < 0)
  268. return err;
  269. return ret;
  270. }
  271. static int rv3029_eeprom_update_bits(struct device *dev,
  272. u8 reg, u8 mask, u8 set)
  273. {
  274. u8 buf;
  275. int ret;
  276. ret = rv3029_eeprom_read(dev, reg, &buf, 1);
  277. if (ret < 0)
  278. return ret;
  279. buf &= ~mask;
  280. buf |= set & mask;
  281. ret = rv3029_eeprom_write(dev, reg, &buf, 1);
  282. if (ret < 0)
  283. return ret;
  284. return 0;
  285. }
  286. static irqreturn_t rv3029_handle_irq(int irq, void *dev_id)
  287. {
  288. struct device *dev = dev_id;
  289. struct rv3029_data *rv3029 = dev_get_drvdata(dev);
  290. struct mutex *lock = &rv3029->rtc->ops_lock;
  291. unsigned long events = 0;
  292. u8 flags, controls;
  293. int ret;
  294. mutex_lock(lock);
  295. ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
  296. if (ret) {
  297. dev_warn(dev, "Read IRQ Control Register error %d\n", ret);
  298. mutex_unlock(lock);
  299. return IRQ_NONE;
  300. }
  301. ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
  302. if (ret) {
  303. dev_warn(dev, "Read IRQ Flags Register error %d\n", ret);
  304. mutex_unlock(lock);
  305. return IRQ_NONE;
  306. }
  307. if (flags & RV3029_IRQ_FLAGS_AF) {
  308. flags &= ~RV3029_IRQ_FLAGS_AF;
  309. controls &= ~RV3029_IRQ_CTRL_AIE;
  310. events |= RTC_AF;
  311. }
  312. if (events) {
  313. rtc_update_irq(rv3029->rtc, 1, events);
  314. rv3029_write_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
  315. rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
  316. }
  317. mutex_unlock(lock);
  318. return IRQ_HANDLED;
  319. }
  320. static int rv3029_read_time(struct device *dev, struct rtc_time *tm)
  321. {
  322. u8 buf[1];
  323. int ret;
  324. u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, };
  325. ret = rv3029_get_sr(dev, buf);
  326. if (ret < 0) {
  327. dev_err(dev, "%s: reading SR failed\n", __func__);
  328. return -EIO;
  329. }
  330. ret = rv3029_read_regs(dev, RV3029_W_SEC, regs,
  331. RV3029_WATCH_SECTION_LEN);
  332. if (ret < 0) {
  333. dev_err(dev, "%s: reading RTC section failed\n", __func__);
  334. return ret;
  335. }
  336. tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]);
  337. tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]);
  338. /* HR field has a more complex interpretation */
  339. {
  340. const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC];
  341. if (_hr & RV3029_REG_HR_12_24) {
  342. /* 12h format */
  343. tm->tm_hour = bcd2bin(_hr & 0x1f);
  344. if (_hr & RV3029_REG_HR_PM) /* PM flag set */
  345. tm->tm_hour += 12;
  346. } else /* 24h format */
  347. tm->tm_hour = bcd2bin(_hr & 0x3f);
  348. }
  349. tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]);
  350. tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1;
  351. tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100;
  352. tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1;
  353. return 0;
  354. }
  355. static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  356. {
  357. struct rtc_time *const tm = &alarm->time;
  358. int ret;
  359. u8 regs[8], controls, flags;
  360. ret = rv3029_get_sr(dev, regs);
  361. if (ret < 0) {
  362. dev_err(dev, "%s: reading SR failed\n", __func__);
  363. return -EIO;
  364. }
  365. ret = rv3029_read_regs(dev, RV3029_A_SC, regs,
  366. RV3029_ALARM_SECTION_LEN);
  367. if (ret < 0) {
  368. dev_err(dev, "%s: reading alarm section failed\n", __func__);
  369. return ret;
  370. }
  371. ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
  372. if (ret) {
  373. dev_err(dev, "Read IRQ Control Register error %d\n", ret);
  374. return ret;
  375. }
  376. ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
  377. if (ret < 0) {
  378. dev_err(dev, "Read IRQ Flags Register error %d\n", ret);
  379. return ret;
  380. }
  381. tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f);
  382. tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f);
  383. tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f);
  384. tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f);
  385. tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1;
  386. tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100;
  387. tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1;
  388. alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE);
  389. alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled;
  390. return 0;
  391. }
  392. static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable)
  393. {
  394. int ret;
  395. u8 controls;
  396. ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
  397. if (ret < 0) {
  398. dev_warn(dev, "Read IRQ Control Register error %d\n", ret);
  399. return ret;
  400. }
  401. /* enable/disable AIE irq */
  402. if (enable)
  403. controls |= RV3029_IRQ_CTRL_AIE;
  404. else
  405. controls &= ~RV3029_IRQ_CTRL_AIE;
  406. ret = rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
  407. if (ret < 0) {
  408. dev_err(dev, "can't update INT reg\n");
  409. return ret;
  410. }
  411. return 0;
  412. }
  413. static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  414. {
  415. struct rtc_time *const tm = &alarm->time;
  416. int ret;
  417. u8 regs[8];
  418. /*
  419. * The clock has an 8 bit wide bcd-coded register (they never learn)
  420. * for the year. tm_year is an offset from 1900 and we are interested
  421. * in the 2000-2099 range, so any value less than 100 is invalid.
  422. */
  423. if (tm->tm_year < 100)
  424. return -EINVAL;
  425. ret = rv3029_get_sr(dev, regs);
  426. if (ret < 0) {
  427. dev_err(dev, "%s: reading SR failed\n", __func__);
  428. return -EIO;
  429. }
  430. /* Activate all the alarms with AE_x bit */
  431. regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X;
  432. regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X;
  433. regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f)
  434. | RV3029_A_AE_X;
  435. regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f)
  436. | RV3029_A_AE_X;
  437. regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f)
  438. | RV3029_A_AE_X;
  439. regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7)
  440. | RV3029_A_AE_X;
  441. regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100))
  442. | RV3029_A_AE_X;
  443. /* Write the alarm */
  444. ret = rv3029_write_regs(dev, RV3029_A_SC, regs,
  445. RV3029_ALARM_SECTION_LEN);
  446. if (ret < 0)
  447. return ret;
  448. if (alarm->enabled) {
  449. /* enable AIE irq */
  450. ret = rv3029_alarm_irq_enable(dev, 1);
  451. if (ret)
  452. return ret;
  453. } else {
  454. /* disable AIE irq */
  455. ret = rv3029_alarm_irq_enable(dev, 0);
  456. if (ret)
  457. return ret;
  458. }
  459. return 0;
  460. }
  461. static int rv3029_set_time(struct device *dev, struct rtc_time *tm)
  462. {
  463. u8 regs[8];
  464. int ret;
  465. /*
  466. * The clock has an 8 bit wide bcd-coded register (they never learn)
  467. * for the year. tm_year is an offset from 1900 and we are interested
  468. * in the 2000-2099 range, so any value less than 100 is invalid.
  469. */
  470. if (tm->tm_year < 100)
  471. return -EINVAL;
  472. regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec);
  473. regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min);
  474. regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour);
  475. regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday);
  476. regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1);
  477. regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7;
  478. regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100);
  479. ret = rv3029_write_regs(dev, RV3029_W_SEC, regs,
  480. RV3029_WATCH_SECTION_LEN);
  481. if (ret < 0)
  482. return ret;
  483. ret = rv3029_get_sr(dev, regs);
  484. if (ret < 0) {
  485. dev_err(dev, "%s: reading SR failed\n", __func__);
  486. return ret;
  487. }
  488. /* clear PON bit */
  489. ret = rv3029_set_sr(dev, (regs[0] & ~RV3029_STATUS_PON));
  490. if (ret < 0) {
  491. dev_err(dev, "%s: reading SR failed\n", __func__);
  492. return ret;
  493. }
  494. return 0;
  495. }
  496. static const struct rv3029_trickle_tab_elem {
  497. u32 r; /* resistance in ohms */
  498. u8 conf; /* trickle config bits */
  499. } rv3029_trickle_tab[] = {
  500. {
  501. .r = 1076,
  502. .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
  503. RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
  504. }, {
  505. .r = 1091,
  506. .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
  507. RV3029_TRICKLE_20K,
  508. }, {
  509. .r = 1137,
  510. .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
  511. RV3029_TRICKLE_80K,
  512. }, {
  513. .r = 1154,
  514. .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K,
  515. }, {
  516. .r = 1371,
  517. .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K |
  518. RV3029_TRICKLE_80K,
  519. }, {
  520. .r = 1395,
  521. .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K,
  522. }, {
  523. .r = 1472,
  524. .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K,
  525. }, {
  526. .r = 1500,
  527. .conf = RV3029_TRICKLE_1K,
  528. }, {
  529. .r = 3810,
  530. .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K |
  531. RV3029_TRICKLE_80K,
  532. }, {
  533. .r = 4000,
  534. .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K,
  535. }, {
  536. .r = 4706,
  537. .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K,
  538. }, {
  539. .r = 5000,
  540. .conf = RV3029_TRICKLE_5K,
  541. }, {
  542. .r = 16000,
  543. .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
  544. }, {
  545. .r = 20000,
  546. .conf = RV3029_TRICKLE_20K,
  547. }, {
  548. .r = 80000,
  549. .conf = RV3029_TRICKLE_80K,
  550. },
  551. };
  552. static void rv3029_trickle_config(struct device *dev)
  553. {
  554. struct device_node *of_node = dev->of_node;
  555. const struct rv3029_trickle_tab_elem *elem;
  556. int i, err;
  557. u32 ohms;
  558. u8 trickle_set_bits;
  559. if (!of_node)
  560. return;
  561. /* Configure the trickle charger. */
  562. err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms);
  563. if (err) {
  564. /* Disable trickle charger. */
  565. trickle_set_bits = 0;
  566. } else {
  567. /* Enable trickle charger. */
  568. for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) {
  569. elem = &rv3029_trickle_tab[i];
  570. if (elem->r >= ohms)
  571. break;
  572. }
  573. trickle_set_bits = elem->conf;
  574. dev_info(dev,
  575. "Trickle charger enabled at %d ohms resistance.\n",
  576. elem->r);
  577. }
  578. err = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
  579. RV3029_TRICKLE_MASK,
  580. trickle_set_bits);
  581. if (err < 0)
  582. dev_err(dev, "Failed to update trickle charger config\n");
  583. }
  584. #ifdef CONFIG_RTC_DRV_RV3029_HWMON
  585. static int rv3029_read_temp(struct device *dev, int *temp_mC)
  586. {
  587. int ret;
  588. u8 temp;
  589. ret = rv3029_read_regs(dev, RV3029_TEMP_PAGE, &temp, 1);
  590. if (ret < 0)
  591. return ret;
  592. *temp_mC = ((int)temp - 60) * 1000;
  593. return 0;
  594. }
  595. static ssize_t rv3029_hwmon_show_temp(struct device *dev,
  596. struct device_attribute *attr,
  597. char *buf)
  598. {
  599. int ret, temp_mC;
  600. ret = rv3029_read_temp(dev, &temp_mC);
  601. if (ret < 0)
  602. return ret;
  603. return sprintf(buf, "%d\n", temp_mC);
  604. }
  605. static ssize_t rv3029_hwmon_set_update_interval(struct device *dev,
  606. struct device_attribute *attr,
  607. const char *buf,
  608. size_t count)
  609. {
  610. unsigned long interval_ms;
  611. int ret;
  612. u8 th_set_bits = 0;
  613. ret = kstrtoul(buf, 10, &interval_ms);
  614. if (ret < 0)
  615. return ret;
  616. if (interval_ms != 0) {
  617. th_set_bits |= RV3029_EECTRL_THE;
  618. if (interval_ms >= 16000)
  619. th_set_bits |= RV3029_EECTRL_THP;
  620. }
  621. ret = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
  622. RV3029_EECTRL_THE | RV3029_EECTRL_THP,
  623. th_set_bits);
  624. if (ret < 0)
  625. return ret;
  626. return count;
  627. }
  628. static ssize_t rv3029_hwmon_show_update_interval(struct device *dev,
  629. struct device_attribute *attr,
  630. char *buf)
  631. {
  632. int ret, interval_ms;
  633. u8 eectrl;
  634. ret = rv3029_eeprom_read(dev, RV3029_CONTROL_E2P_EECTRL,
  635. &eectrl, 1);
  636. if (ret < 0)
  637. return ret;
  638. if (eectrl & RV3029_EECTRL_THE) {
  639. if (eectrl & RV3029_EECTRL_THP)
  640. interval_ms = 16000;
  641. else
  642. interval_ms = 1000;
  643. } else {
  644. interval_ms = 0;
  645. }
  646. return sprintf(buf, "%d\n", interval_ms);
  647. }
  648. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp,
  649. NULL, 0);
  650. static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO,
  651. rv3029_hwmon_show_update_interval,
  652. rv3029_hwmon_set_update_interval, 0);
  653. static struct attribute *rv3029_hwmon_attrs[] = {
  654. &sensor_dev_attr_temp1_input.dev_attr.attr,
  655. &sensor_dev_attr_update_interval.dev_attr.attr,
  656. NULL,
  657. };
  658. ATTRIBUTE_GROUPS(rv3029_hwmon);
  659. static void rv3029_hwmon_register(struct device *dev, const char *name)
  660. {
  661. struct rv3029_data *rv3029 = dev_get_drvdata(dev);
  662. struct device *hwmon_dev;
  663. hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029,
  664. rv3029_hwmon_groups);
  665. if (IS_ERR(hwmon_dev)) {
  666. dev_warn(dev, "unable to register hwmon device %ld\n",
  667. PTR_ERR(hwmon_dev));
  668. }
  669. }
  670. #else /* CONFIG_RTC_DRV_RV3029_HWMON */
  671. static void rv3029_hwmon_register(struct device *dev, const char *name)
  672. {
  673. }
  674. #endif /* CONFIG_RTC_DRV_RV3029_HWMON */
  675. static struct rtc_class_ops rv3029_rtc_ops = {
  676. .read_time = rv3029_read_time,
  677. .set_time = rv3029_set_time,
  678. };
  679. static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq,
  680. const char *name)
  681. {
  682. struct rv3029_data *rv3029;
  683. int rc = 0;
  684. u8 buf[1];
  685. rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL);
  686. if (!rv3029)
  687. return -ENOMEM;
  688. rv3029->regmap = regmap;
  689. rv3029->irq = irq;
  690. rv3029->dev = dev;
  691. dev_set_drvdata(dev, rv3029);
  692. rc = rv3029_get_sr(dev, buf);
  693. if (rc < 0) {
  694. dev_err(dev, "reading status failed\n");
  695. return rc;
  696. }
  697. rv3029_trickle_config(dev);
  698. rv3029_hwmon_register(dev, name);
  699. rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops,
  700. THIS_MODULE);
  701. if (IS_ERR(rv3029->rtc)) {
  702. dev_err(dev, "unable to register the class device\n");
  703. return PTR_ERR(rv3029->rtc);
  704. }
  705. if (rv3029->irq > 0) {
  706. rc = devm_request_threaded_irq(dev, rv3029->irq,
  707. NULL, rv3029_handle_irq,
  708. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  709. "rv3029", dev);
  710. if (rc) {
  711. dev_warn(dev, "unable to request IRQ, alarms disabled\n");
  712. rv3029->irq = 0;
  713. } else {
  714. rv3029_rtc_ops.read_alarm = rv3029_read_alarm;
  715. rv3029_rtc_ops.set_alarm = rv3029_set_alarm;
  716. rv3029_rtc_ops.alarm_irq_enable = rv3029_alarm_irq_enable;
  717. }
  718. }
  719. return 0;
  720. }
  721. #if IS_ENABLED(CONFIG_I2C)
  722. static int rv3029_i2c_probe(struct i2c_client *client,
  723. const struct i2c_device_id *id)
  724. {
  725. struct regmap *regmap;
  726. static const struct regmap_config config = {
  727. .reg_bits = 8,
  728. .val_bits = 8,
  729. };
  730. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
  731. I2C_FUNC_SMBUS_BYTE)) {
  732. dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n");
  733. return -ENODEV;
  734. }
  735. regmap = devm_regmap_init_i2c(client, &config);
  736. if (IS_ERR(regmap)) {
  737. dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
  738. __func__, PTR_ERR(regmap));
  739. return PTR_ERR(regmap);
  740. }
  741. return rv3029_probe(&client->dev, regmap, client->irq, client->name);
  742. }
  743. static const struct i2c_device_id rv3029_id[] = {
  744. { "rv3029", 0 },
  745. { "rv3029c2", 0 },
  746. { }
  747. };
  748. MODULE_DEVICE_TABLE(i2c, rv3029_id);
  749. static const struct of_device_id rv3029_of_match[] = {
  750. { .compatible = "microcrystal,rv3029" },
  751. /* Backward compatibility only, do not use compatibles below: */
  752. { .compatible = "rv3029" },
  753. { .compatible = "rv3029c2" },
  754. { .compatible = "mc,rv3029c2" },
  755. { }
  756. };
  757. MODULE_DEVICE_TABLE(of, rv3029_of_match);
  758. static struct i2c_driver rv3029_driver = {
  759. .driver = {
  760. .name = "rtc-rv3029c2",
  761. .of_match_table = of_match_ptr(rv3029_of_match),
  762. },
  763. .probe = rv3029_i2c_probe,
  764. .id_table = rv3029_id,
  765. };
  766. static int rv3029_register_driver(void)
  767. {
  768. return i2c_add_driver(&rv3029_driver);
  769. }
  770. static void rv3029_unregister_driver(void)
  771. {
  772. i2c_del_driver(&rv3029_driver);
  773. }
  774. #else
  775. static int rv3029_register_driver(void)
  776. {
  777. return 0;
  778. }
  779. static void rv3029_unregister_driver(void)
  780. {
  781. }
  782. #endif
  783. #if IS_ENABLED(CONFIG_SPI_MASTER)
  784. static int rv3049_probe(struct spi_device *spi)
  785. {
  786. static const struct regmap_config config = {
  787. .reg_bits = 8,
  788. .val_bits = 8,
  789. };
  790. struct regmap *regmap;
  791. regmap = devm_regmap_init_spi(spi, &config);
  792. if (IS_ERR(regmap)) {
  793. dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
  794. __func__, PTR_ERR(regmap));
  795. return PTR_ERR(regmap);
  796. }
  797. return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049");
  798. }
  799. static struct spi_driver rv3049_driver = {
  800. .driver = {
  801. .name = "rv3049",
  802. },
  803. .probe = rv3049_probe,
  804. };
  805. static int rv3049_register_driver(void)
  806. {
  807. return spi_register_driver(&rv3049_driver);
  808. }
  809. static void rv3049_unregister_driver(void)
  810. {
  811. spi_unregister_driver(&rv3049_driver);
  812. }
  813. #else
  814. static int rv3049_register_driver(void)
  815. {
  816. return 0;
  817. }
  818. static void rv3049_unregister_driver(void)
  819. {
  820. }
  821. #endif
  822. static int __init rv30x9_init(void)
  823. {
  824. int ret;
  825. ret = rv3029_register_driver();
  826. if (ret) {
  827. pr_err("Failed to register rv3029 driver: %d\n", ret);
  828. return ret;
  829. }
  830. ret = rv3049_register_driver();
  831. if (ret) {
  832. pr_err("Failed to register rv3049 driver: %d\n", ret);
  833. rv3029_unregister_driver();
  834. }
  835. return ret;
  836. }
  837. module_init(rv30x9_init)
  838. static void __exit rv30x9_exit(void)
  839. {
  840. rv3049_unregister_driver();
  841. rv3029_unregister_driver();
  842. }
  843. module_exit(rv30x9_exit)
  844. MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>");
  845. MODULE_AUTHOR("Michael Buesch <m@bues.ch>");
  846. MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver");
  847. MODULE_LICENSE("GPL");
  848. MODULE_ALIAS("spi:rv3049");