rtc-ds3232.c 16 KB

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  1. /*
  2. * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
  3. *
  4. * Copyright (C) 2009-2011 Freescale Semiconductor.
  5. * Author: Jack Lan <jack.lan@freescale.com>
  6. * Copyright (C) 2008 MIMOMax Wireless Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/i2c.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/slab.h>
  22. #include <linux/regmap.h>
  23. #include <linux/hwmon.h>
  24. #define DS3232_REG_SECONDS 0x00
  25. #define DS3232_REG_MINUTES 0x01
  26. #define DS3232_REG_HOURS 0x02
  27. #define DS3232_REG_AMPM 0x02
  28. #define DS3232_REG_DAY 0x03
  29. #define DS3232_REG_DATE 0x04
  30. #define DS3232_REG_MONTH 0x05
  31. #define DS3232_REG_CENTURY 0x05
  32. #define DS3232_REG_YEAR 0x06
  33. #define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */
  34. #define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */
  35. #define DS3232_REG_CR 0x0E /* Control register */
  36. # define DS3232_REG_CR_nEOSC 0x80
  37. # define DS3232_REG_CR_INTCN 0x04
  38. # define DS3232_REG_CR_A2IE 0x02
  39. # define DS3232_REG_CR_A1IE 0x01
  40. #define DS3232_REG_SR 0x0F /* control/status register */
  41. # define DS3232_REG_SR_OSF 0x80
  42. # define DS3232_REG_SR_BSY 0x04
  43. # define DS3232_REG_SR_A2F 0x02
  44. # define DS3232_REG_SR_A1F 0x01
  45. #define DS3232_REG_TEMPERATURE 0x11
  46. struct ds3232 {
  47. struct device *dev;
  48. struct regmap *regmap;
  49. int irq;
  50. struct rtc_device *rtc;
  51. bool suspended;
  52. };
  53. static int ds3232_check_rtc_status(struct device *dev)
  54. {
  55. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  56. int ret = 0;
  57. int control, stat;
  58. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  59. if (ret)
  60. return ret;
  61. if (stat & DS3232_REG_SR_OSF)
  62. dev_warn(dev,
  63. "oscillator discontinuity flagged, "
  64. "time unreliable\n");
  65. stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
  66. ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
  67. if (ret)
  68. return ret;
  69. /* If the alarm is pending, clear it before requesting
  70. * the interrupt, so an interrupt event isn't reported
  71. * before everything is initialized.
  72. */
  73. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  74. if (ret)
  75. return ret;
  76. control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
  77. control |= DS3232_REG_CR_INTCN;
  78. return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  79. }
  80. static int ds3232_read_time(struct device *dev, struct rtc_time *time)
  81. {
  82. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  83. int ret;
  84. u8 buf[7];
  85. unsigned int year, month, day, hour, minute, second;
  86. unsigned int week, twelve_hr, am_pm;
  87. unsigned int century, add_century = 0;
  88. ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
  89. if (ret)
  90. return ret;
  91. second = buf[0];
  92. minute = buf[1];
  93. hour = buf[2];
  94. week = buf[3];
  95. day = buf[4];
  96. month = buf[5];
  97. year = buf[6];
  98. /* Extract additional information for AM/PM and century */
  99. twelve_hr = hour & 0x40;
  100. am_pm = hour & 0x20;
  101. century = month & 0x80;
  102. /* Write to rtc_time structure */
  103. time->tm_sec = bcd2bin(second);
  104. time->tm_min = bcd2bin(minute);
  105. if (twelve_hr) {
  106. /* Convert to 24 hr */
  107. if (am_pm)
  108. time->tm_hour = bcd2bin(hour & 0x1F) + 12;
  109. else
  110. time->tm_hour = bcd2bin(hour & 0x1F);
  111. } else {
  112. time->tm_hour = bcd2bin(hour);
  113. }
  114. /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
  115. time->tm_wday = bcd2bin(week) - 1;
  116. time->tm_mday = bcd2bin(day);
  117. /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
  118. time->tm_mon = bcd2bin(month & 0x7F) - 1;
  119. if (century)
  120. add_century = 100;
  121. time->tm_year = bcd2bin(year) + add_century;
  122. return 0;
  123. }
  124. static int ds3232_set_time(struct device *dev, struct rtc_time *time)
  125. {
  126. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  127. u8 buf[7];
  128. /* Extract time from rtc_time and load into ds3232*/
  129. buf[0] = bin2bcd(time->tm_sec);
  130. buf[1] = bin2bcd(time->tm_min);
  131. buf[2] = bin2bcd(time->tm_hour);
  132. /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
  133. buf[3] = bin2bcd(time->tm_wday + 1);
  134. buf[4] = bin2bcd(time->tm_mday); /* Date */
  135. /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
  136. buf[5] = bin2bcd(time->tm_mon + 1);
  137. if (time->tm_year >= 100) {
  138. buf[5] |= 0x80;
  139. buf[6] = bin2bcd(time->tm_year - 100);
  140. } else {
  141. buf[6] = bin2bcd(time->tm_year);
  142. }
  143. return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
  144. }
  145. /*
  146. * DS3232 has two alarm, we only use alarm1
  147. * According to linux specification, only support one-shot alarm
  148. * no periodic alarm mode
  149. */
  150. static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  151. {
  152. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  153. int control, stat;
  154. int ret;
  155. u8 buf[4];
  156. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  157. if (ret)
  158. goto out;
  159. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  160. if (ret)
  161. goto out;
  162. ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
  163. if (ret)
  164. goto out;
  165. alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
  166. alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
  167. alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
  168. alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);
  169. alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
  170. alarm->pending = !!(stat & DS3232_REG_SR_A1F);
  171. ret = 0;
  172. out:
  173. return ret;
  174. }
  175. /*
  176. * linux rtc-module does not support wday alarm
  177. * and only 24h time mode supported indeed
  178. */
  179. static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  180. {
  181. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  182. int control, stat;
  183. int ret;
  184. u8 buf[4];
  185. if (ds3232->irq <= 0)
  186. return -EINVAL;
  187. buf[0] = bin2bcd(alarm->time.tm_sec);
  188. buf[1] = bin2bcd(alarm->time.tm_min);
  189. buf[2] = bin2bcd(alarm->time.tm_hour);
  190. buf[3] = bin2bcd(alarm->time.tm_mday);
  191. /* clear alarm interrupt enable bit */
  192. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  193. if (ret)
  194. goto out;
  195. control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
  196. ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  197. if (ret)
  198. goto out;
  199. /* clear any pending alarm flag */
  200. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  201. if (ret)
  202. goto out;
  203. stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
  204. ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
  205. if (ret)
  206. goto out;
  207. ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
  208. if (ret)
  209. goto out;
  210. if (alarm->enabled) {
  211. control |= DS3232_REG_CR_A1IE;
  212. ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  213. }
  214. out:
  215. return ret;
  216. }
  217. static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
  218. {
  219. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  220. int control;
  221. int ret;
  222. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  223. if (ret)
  224. return ret;
  225. if (enabled)
  226. /* enable alarm1 interrupt */
  227. control |= DS3232_REG_CR_A1IE;
  228. else
  229. /* disable alarm1 interrupt */
  230. control &= ~(DS3232_REG_CR_A1IE);
  231. ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
  232. return ret;
  233. }
  234. /*
  235. * Temperature sensor support for ds3232/ds3234 devices.
  236. * A user-initiated temperature conversion is not started by this function,
  237. * so the temperature is updated once every 64 seconds.
  238. */
  239. static int ds3232_hwmon_read_temp(struct device *dev, long int *mC)
  240. {
  241. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  242. u8 temp_buf[2];
  243. s16 temp;
  244. int ret;
  245. ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_TEMPERATURE, temp_buf,
  246. sizeof(temp_buf));
  247. if (ret < 0)
  248. return ret;
  249. /*
  250. * Temperature is represented as a 10-bit code with a resolution of
  251. * 0.25 degree celsius and encoded in two's complement format.
  252. */
  253. temp = (temp_buf[0] << 8) | temp_buf[1];
  254. temp >>= 6;
  255. *mC = temp * 250;
  256. return 0;
  257. }
  258. static umode_t ds3232_hwmon_is_visible(const void *data,
  259. enum hwmon_sensor_types type,
  260. u32 attr, int channel)
  261. {
  262. if (type != hwmon_temp)
  263. return 0;
  264. switch (attr) {
  265. case hwmon_temp_input:
  266. return 0444;
  267. default:
  268. return 0;
  269. }
  270. }
  271. static int ds3232_hwmon_read(struct device *dev,
  272. enum hwmon_sensor_types type,
  273. u32 attr, int channel, long *temp)
  274. {
  275. int err;
  276. switch (attr) {
  277. case hwmon_temp_input:
  278. err = ds3232_hwmon_read_temp(dev, temp);
  279. break;
  280. default:
  281. err = -EOPNOTSUPP;
  282. break;
  283. }
  284. return err;
  285. }
  286. static u32 ds3232_hwmon_chip_config[] = {
  287. HWMON_C_REGISTER_TZ,
  288. 0
  289. };
  290. static const struct hwmon_channel_info ds3232_hwmon_chip = {
  291. .type = hwmon_chip,
  292. .config = ds3232_hwmon_chip_config,
  293. };
  294. static u32 ds3232_hwmon_temp_config[] = {
  295. HWMON_T_INPUT,
  296. 0
  297. };
  298. static const struct hwmon_channel_info ds3232_hwmon_temp = {
  299. .type = hwmon_temp,
  300. .config = ds3232_hwmon_temp_config,
  301. };
  302. static const struct hwmon_channel_info *ds3232_hwmon_info[] = {
  303. &ds3232_hwmon_chip,
  304. &ds3232_hwmon_temp,
  305. NULL
  306. };
  307. static const struct hwmon_ops ds3232_hwmon_hwmon_ops = {
  308. .is_visible = ds3232_hwmon_is_visible,
  309. .read = ds3232_hwmon_read,
  310. };
  311. static const struct hwmon_chip_info ds3232_hwmon_chip_info = {
  312. .ops = &ds3232_hwmon_hwmon_ops,
  313. .info = ds3232_hwmon_info,
  314. };
  315. static void ds3232_hwmon_register(struct device *dev, const char *name)
  316. {
  317. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  318. struct device *hwmon_dev;
  319. if (!IS_ENABLED(CONFIG_RTC_DRV_DS3232_HWMON))
  320. return;
  321. hwmon_dev = devm_hwmon_device_register_with_info(dev, name, ds3232,
  322. &ds3232_hwmon_chip_info,
  323. NULL);
  324. if (IS_ERR(hwmon_dev)) {
  325. dev_err(dev, "unable to register hwmon device %ld\n",
  326. PTR_ERR(hwmon_dev));
  327. }
  328. }
  329. static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
  330. {
  331. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  332. if (ds3232->irq <= 0)
  333. return -EINVAL;
  334. return ds3232_update_alarm(dev, enabled);
  335. }
  336. static irqreturn_t ds3232_irq(int irq, void *dev_id)
  337. {
  338. struct device *dev = dev_id;
  339. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  340. struct mutex *lock = &ds3232->rtc->ops_lock;
  341. int ret;
  342. int stat, control;
  343. mutex_lock(lock);
  344. ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
  345. if (ret)
  346. goto unlock;
  347. if (stat & DS3232_REG_SR_A1F) {
  348. ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
  349. if (ret) {
  350. dev_warn(ds3232->dev,
  351. "Read Control Register error %d\n", ret);
  352. } else {
  353. /* disable alarm1 interrupt */
  354. control &= ~(DS3232_REG_CR_A1IE);
  355. ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
  356. control);
  357. if (ret) {
  358. dev_warn(ds3232->dev,
  359. "Write Control Register error %d\n",
  360. ret);
  361. goto unlock;
  362. }
  363. /* clear the alarm pend flag */
  364. stat &= ~DS3232_REG_SR_A1F;
  365. ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
  366. if (ret) {
  367. dev_warn(ds3232->dev,
  368. "Write Status Register error %d\n",
  369. ret);
  370. goto unlock;
  371. }
  372. rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF);
  373. }
  374. }
  375. unlock:
  376. mutex_unlock(lock);
  377. return IRQ_HANDLED;
  378. }
  379. static const struct rtc_class_ops ds3232_rtc_ops = {
  380. .read_time = ds3232_read_time,
  381. .set_time = ds3232_set_time,
  382. .read_alarm = ds3232_read_alarm,
  383. .set_alarm = ds3232_set_alarm,
  384. .alarm_irq_enable = ds3232_alarm_irq_enable,
  385. };
  386. static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
  387. const char *name)
  388. {
  389. struct ds3232 *ds3232;
  390. int ret;
  391. ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
  392. if (!ds3232)
  393. return -ENOMEM;
  394. ds3232->regmap = regmap;
  395. ds3232->irq = irq;
  396. ds3232->dev = dev;
  397. dev_set_drvdata(dev, ds3232);
  398. ret = ds3232_check_rtc_status(dev);
  399. if (ret)
  400. return ret;
  401. if (ds3232->irq > 0)
  402. device_init_wakeup(dev, 1);
  403. ds3232_hwmon_register(dev, name);
  404. ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
  405. THIS_MODULE);
  406. if (IS_ERR(ds3232->rtc))
  407. return PTR_ERR(ds3232->rtc);
  408. if (ds3232->irq > 0) {
  409. ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
  410. ds3232_irq,
  411. IRQF_SHARED | IRQF_ONESHOT,
  412. name, dev);
  413. if (ret) {
  414. device_set_wakeup_capable(dev, 0);
  415. ds3232->irq = 0;
  416. dev_err(dev, "unable to request IRQ\n");
  417. }
  418. }
  419. return 0;
  420. }
  421. #ifdef CONFIG_PM_SLEEP
  422. static int ds3232_suspend(struct device *dev)
  423. {
  424. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  425. if (device_may_wakeup(dev)) {
  426. if (enable_irq_wake(ds3232->irq))
  427. dev_warn_once(dev, "Cannot set wakeup source\n");
  428. }
  429. return 0;
  430. }
  431. static int ds3232_resume(struct device *dev)
  432. {
  433. struct ds3232 *ds3232 = dev_get_drvdata(dev);
  434. if (device_may_wakeup(dev))
  435. disable_irq_wake(ds3232->irq);
  436. return 0;
  437. }
  438. #endif
  439. static const struct dev_pm_ops ds3232_pm_ops = {
  440. SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
  441. };
  442. #if IS_ENABLED(CONFIG_I2C)
  443. static int ds3232_i2c_probe(struct i2c_client *client,
  444. const struct i2c_device_id *id)
  445. {
  446. struct regmap *regmap;
  447. static const struct regmap_config config = {
  448. .reg_bits = 8,
  449. .val_bits = 8,
  450. .max_register = 0x13,
  451. };
  452. regmap = devm_regmap_init_i2c(client, &config);
  453. if (IS_ERR(regmap)) {
  454. dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
  455. __func__, PTR_ERR(regmap));
  456. return PTR_ERR(regmap);
  457. }
  458. return ds3232_probe(&client->dev, regmap, client->irq, client->name);
  459. }
  460. static const struct i2c_device_id ds3232_id[] = {
  461. { "ds3232", 0 },
  462. { }
  463. };
  464. MODULE_DEVICE_TABLE(i2c, ds3232_id);
  465. static const struct of_device_id ds3232_of_match[] = {
  466. { .compatible = "dallas,ds3232" },
  467. { }
  468. };
  469. MODULE_DEVICE_TABLE(of, ds3232_of_match);
  470. static struct i2c_driver ds3232_driver = {
  471. .driver = {
  472. .name = "rtc-ds3232",
  473. .of_match_table = of_match_ptr(ds3232_of_match),
  474. .pm = &ds3232_pm_ops,
  475. },
  476. .probe = ds3232_i2c_probe,
  477. .id_table = ds3232_id,
  478. };
  479. static int ds3232_register_driver(void)
  480. {
  481. return i2c_add_driver(&ds3232_driver);
  482. }
  483. static void ds3232_unregister_driver(void)
  484. {
  485. i2c_del_driver(&ds3232_driver);
  486. }
  487. #else
  488. static int ds3232_register_driver(void)
  489. {
  490. return 0;
  491. }
  492. static void ds3232_unregister_driver(void)
  493. {
  494. }
  495. #endif
  496. #if IS_ENABLED(CONFIG_SPI_MASTER)
  497. static int ds3234_probe(struct spi_device *spi)
  498. {
  499. int res;
  500. unsigned int tmp;
  501. static const struct regmap_config config = {
  502. .reg_bits = 8,
  503. .val_bits = 8,
  504. .max_register = 0x13,
  505. .write_flag_mask = 0x80,
  506. };
  507. struct regmap *regmap;
  508. regmap = devm_regmap_init_spi(spi, &config);
  509. if (IS_ERR(regmap)) {
  510. dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
  511. __func__, PTR_ERR(regmap));
  512. return PTR_ERR(regmap);
  513. }
  514. spi->mode = SPI_MODE_3;
  515. spi->bits_per_word = 8;
  516. spi_setup(spi);
  517. res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
  518. if (res)
  519. return res;
  520. /* Control settings
  521. *
  522. * CONTROL_REG
  523. * BIT 7 6 5 4 3 2 1 0
  524. * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
  525. *
  526. * 0 0 0 1 1 1 0 0
  527. *
  528. * CONTROL_STAT_REG
  529. * BIT 7 6 5 4 3 2 1 0
  530. * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
  531. *
  532. * 1 0 0 0 1 0 0 0
  533. */
  534. res = regmap_read(regmap, DS3232_REG_CR, &tmp);
  535. if (res)
  536. return res;
  537. res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
  538. if (res)
  539. return res;
  540. res = regmap_read(regmap, DS3232_REG_SR, &tmp);
  541. if (res)
  542. return res;
  543. res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
  544. if (res)
  545. return res;
  546. /* Print our settings */
  547. res = regmap_read(regmap, DS3232_REG_CR, &tmp);
  548. if (res)
  549. return res;
  550. dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
  551. res = regmap_read(regmap, DS3232_REG_SR, &tmp);
  552. if (res)
  553. return res;
  554. dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
  555. return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
  556. }
  557. static struct spi_driver ds3234_driver = {
  558. .driver = {
  559. .name = "ds3234",
  560. },
  561. .probe = ds3234_probe,
  562. };
  563. static int ds3234_register_driver(void)
  564. {
  565. return spi_register_driver(&ds3234_driver);
  566. }
  567. static void ds3234_unregister_driver(void)
  568. {
  569. spi_unregister_driver(&ds3234_driver);
  570. }
  571. #else
  572. static int ds3234_register_driver(void)
  573. {
  574. return 0;
  575. }
  576. static void ds3234_unregister_driver(void)
  577. {
  578. }
  579. #endif
  580. static int __init ds323x_init(void)
  581. {
  582. int ret;
  583. ret = ds3232_register_driver();
  584. if (ret) {
  585. pr_err("Failed to register ds3232 driver: %d\n", ret);
  586. return ret;
  587. }
  588. ret = ds3234_register_driver();
  589. if (ret) {
  590. pr_err("Failed to register ds3234 driver: %d\n", ret);
  591. ds3232_unregister_driver();
  592. }
  593. return ret;
  594. }
  595. module_init(ds323x_init)
  596. static void __exit ds323x_exit(void)
  597. {
  598. ds3234_unregister_driver();
  599. ds3232_unregister_driver();
  600. }
  601. module_exit(ds323x_exit)
  602. MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>");
  603. MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
  604. MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
  605. MODULE_LICENSE("GPL");
  606. MODULE_ALIAS("spi:ds3234");