rtc-ds1343.c 14 KB

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  1. /* rtc-ds1343.c
  2. *
  3. * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
  4. * Real Time Clock
  5. *
  6. * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
  7. * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/regmap.h>
  20. #include <linux/rtc.h>
  21. #include <linux/bcd.h>
  22. #include <linux/pm.h>
  23. #include <linux/pm_wakeirq.h>
  24. #include <linux/slab.h>
  25. #define DALLAS_MAXIM_DS1343 0
  26. #define DALLAS_MAXIM_DS1344 1
  27. /* RTC DS1343 Registers */
  28. #define DS1343_SECONDS_REG 0x00
  29. #define DS1343_MINUTES_REG 0x01
  30. #define DS1343_HOURS_REG 0x02
  31. #define DS1343_DAY_REG 0x03
  32. #define DS1343_DATE_REG 0x04
  33. #define DS1343_MONTH_REG 0x05
  34. #define DS1343_YEAR_REG 0x06
  35. #define DS1343_ALM0_SEC_REG 0x07
  36. #define DS1343_ALM0_MIN_REG 0x08
  37. #define DS1343_ALM0_HOUR_REG 0x09
  38. #define DS1343_ALM0_DAY_REG 0x0A
  39. #define DS1343_ALM1_SEC_REG 0x0B
  40. #define DS1343_ALM1_MIN_REG 0x0C
  41. #define DS1343_ALM1_HOUR_REG 0x0D
  42. #define DS1343_ALM1_DAY_REG 0x0E
  43. #define DS1343_CONTROL_REG 0x0F
  44. #define DS1343_STATUS_REG 0x10
  45. #define DS1343_TRICKLE_REG 0x11
  46. #define DS1343_NVRAM 0x20
  47. #define DS1343_NVRAM_LEN 96
  48. /* DS1343 Control Registers bits */
  49. #define DS1343_EOSC 0x80
  50. #define DS1343_DOSF 0x20
  51. #define DS1343_EGFIL 0x10
  52. #define DS1343_SQW 0x08
  53. #define DS1343_INTCN 0x04
  54. #define DS1343_A1IE 0x02
  55. #define DS1343_A0IE 0x01
  56. /* DS1343 Status Registers bits */
  57. #define DS1343_OSF 0x80
  58. #define DS1343_IRQF1 0x02
  59. #define DS1343_IRQF0 0x01
  60. /* DS1343 Trickle Charger Registers bits */
  61. #define DS1343_TRICKLE_MAGIC 0xa0
  62. #define DS1343_TRICKLE_DS1 0x08
  63. #define DS1343_TRICKLE_1K 0x01
  64. #define DS1343_TRICKLE_2K 0x02
  65. #define DS1343_TRICKLE_4K 0x03
  66. static const struct spi_device_id ds1343_id[] = {
  67. { "ds1343", DALLAS_MAXIM_DS1343 },
  68. { "ds1344", DALLAS_MAXIM_DS1344 },
  69. { }
  70. };
  71. MODULE_DEVICE_TABLE(spi, ds1343_id);
  72. struct ds1343_priv {
  73. struct spi_device *spi;
  74. struct rtc_device *rtc;
  75. struct regmap *map;
  76. struct mutex mutex;
  77. unsigned int irqen;
  78. int irq;
  79. int alarm_sec;
  80. int alarm_min;
  81. int alarm_hour;
  82. int alarm_mday;
  83. };
  84. static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  85. {
  86. switch (cmd) {
  87. #ifdef RTC_SET_CHARGE
  88. case RTC_SET_CHARGE:
  89. {
  90. int val;
  91. if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
  92. return -EFAULT;
  93. return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
  94. }
  95. break;
  96. #endif
  97. }
  98. return -ENOIOCTLCMD;
  99. }
  100. static ssize_t ds1343_show_glitchfilter(struct device *dev,
  101. struct device_attribute *attr, char *buf)
  102. {
  103. struct ds1343_priv *priv = dev_get_drvdata(dev);
  104. int glitch_filt_status, data;
  105. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  106. glitch_filt_status = !!(data & DS1343_EGFIL);
  107. if (glitch_filt_status)
  108. return sprintf(buf, "enabled\n");
  109. else
  110. return sprintf(buf, "disabled\n");
  111. }
  112. static ssize_t ds1343_store_glitchfilter(struct device *dev,
  113. struct device_attribute *attr,
  114. const char *buf, size_t count)
  115. {
  116. struct ds1343_priv *priv = dev_get_drvdata(dev);
  117. int data;
  118. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  119. if (strncmp(buf, "enabled", 7) == 0)
  120. data |= DS1343_EGFIL;
  121. else if (strncmp(buf, "disabled", 8) == 0)
  122. data &= ~(DS1343_EGFIL);
  123. else
  124. return -EINVAL;
  125. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  126. return count;
  127. }
  128. static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
  129. ds1343_store_glitchfilter);
  130. static int ds1343_nvram_write(void *priv, unsigned int off, void *val,
  131. size_t bytes)
  132. {
  133. struct ds1343_priv *ds1343 = priv;
  134. return regmap_bulk_write(ds1343->map, DS1343_NVRAM + off, val, bytes);
  135. }
  136. static int ds1343_nvram_read(void *priv, unsigned int off, void *val,
  137. size_t bytes)
  138. {
  139. struct ds1343_priv *ds1343 = priv;
  140. return regmap_bulk_read(ds1343->map, DS1343_NVRAM + off, val, bytes);
  141. }
  142. static ssize_t ds1343_show_tricklecharger(struct device *dev,
  143. struct device_attribute *attr, char *buf)
  144. {
  145. struct ds1343_priv *priv = dev_get_drvdata(dev);
  146. int data;
  147. char *diodes = "disabled", *resistors = " ";
  148. regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
  149. if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
  150. switch (data & 0x0c) {
  151. case DS1343_TRICKLE_DS1:
  152. diodes = "one diode,";
  153. break;
  154. default:
  155. diodes = "no diode,";
  156. break;
  157. }
  158. switch (data & 0x03) {
  159. case DS1343_TRICKLE_1K:
  160. resistors = "1k Ohm";
  161. break;
  162. case DS1343_TRICKLE_2K:
  163. resistors = "2k Ohm";
  164. break;
  165. case DS1343_TRICKLE_4K:
  166. resistors = "4k Ohm";
  167. break;
  168. default:
  169. diodes = "disabled";
  170. break;
  171. }
  172. }
  173. return sprintf(buf, "%s %s\n", diodes, resistors);
  174. }
  175. static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
  176. static int ds1343_sysfs_register(struct device *dev)
  177. {
  178. int err;
  179. err = device_create_file(dev, &dev_attr_glitch_filter);
  180. if (err)
  181. return err;
  182. err = device_create_file(dev, &dev_attr_trickle_charger);
  183. if (!err)
  184. return 0;
  185. device_remove_file(dev, &dev_attr_glitch_filter);
  186. return err;
  187. }
  188. static void ds1343_sysfs_unregister(struct device *dev)
  189. {
  190. device_remove_file(dev, &dev_attr_glitch_filter);
  191. device_remove_file(dev, &dev_attr_trickle_charger);
  192. }
  193. static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
  194. {
  195. struct ds1343_priv *priv = dev_get_drvdata(dev);
  196. unsigned char buf[7];
  197. int res;
  198. res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
  199. if (res)
  200. return res;
  201. dt->tm_sec = bcd2bin(buf[0]);
  202. dt->tm_min = bcd2bin(buf[1]);
  203. dt->tm_hour = bcd2bin(buf[2] & 0x3F);
  204. dt->tm_wday = bcd2bin(buf[3]) - 1;
  205. dt->tm_mday = bcd2bin(buf[4]);
  206. dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
  207. dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
  208. return 0;
  209. }
  210. static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
  211. {
  212. struct ds1343_priv *priv = dev_get_drvdata(dev);
  213. int res;
  214. res = regmap_write(priv->map, DS1343_SECONDS_REG,
  215. bin2bcd(dt->tm_sec));
  216. if (res)
  217. return res;
  218. res = regmap_write(priv->map, DS1343_MINUTES_REG,
  219. bin2bcd(dt->tm_min));
  220. if (res)
  221. return res;
  222. res = regmap_write(priv->map, DS1343_HOURS_REG,
  223. bin2bcd(dt->tm_hour) & 0x3F);
  224. if (res)
  225. return res;
  226. res = regmap_write(priv->map, DS1343_DAY_REG,
  227. bin2bcd(dt->tm_wday + 1));
  228. if (res)
  229. return res;
  230. res = regmap_write(priv->map, DS1343_DATE_REG,
  231. bin2bcd(dt->tm_mday));
  232. if (res)
  233. return res;
  234. res = regmap_write(priv->map, DS1343_MONTH_REG,
  235. bin2bcd(dt->tm_mon + 1));
  236. if (res)
  237. return res;
  238. dt->tm_year %= 100;
  239. res = regmap_write(priv->map, DS1343_YEAR_REG,
  240. bin2bcd(dt->tm_year));
  241. if (res)
  242. return res;
  243. return 0;
  244. }
  245. static int ds1343_update_alarm(struct device *dev)
  246. {
  247. struct ds1343_priv *priv = dev_get_drvdata(dev);
  248. unsigned int control, stat;
  249. unsigned char buf[4];
  250. int res = 0;
  251. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  252. if (res)
  253. return res;
  254. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  255. if (res)
  256. return res;
  257. control &= ~(DS1343_A0IE);
  258. stat &= ~(DS1343_IRQF0);
  259. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  260. if (res)
  261. return res;
  262. res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
  263. if (res)
  264. return res;
  265. buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
  266. 0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
  267. buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
  268. 0x80 : bin2bcd(priv->alarm_min) & 0x7F;
  269. buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
  270. 0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
  271. buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
  272. 0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
  273. res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
  274. if (res)
  275. return res;
  276. if (priv->irqen) {
  277. control |= DS1343_A0IE;
  278. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  279. }
  280. return res;
  281. }
  282. static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  283. {
  284. struct ds1343_priv *priv = dev_get_drvdata(dev);
  285. int res = 0;
  286. unsigned int stat;
  287. if (priv->irq <= 0)
  288. return -EINVAL;
  289. mutex_lock(&priv->mutex);
  290. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  291. if (res)
  292. goto out;
  293. alarm->enabled = !!(priv->irqen & RTC_AF);
  294. alarm->pending = !!(stat & DS1343_IRQF0);
  295. alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
  296. alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
  297. alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
  298. alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
  299. out:
  300. mutex_unlock(&priv->mutex);
  301. return res;
  302. }
  303. static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  304. {
  305. struct ds1343_priv *priv = dev_get_drvdata(dev);
  306. int res = 0;
  307. if (priv->irq <= 0)
  308. return -EINVAL;
  309. mutex_lock(&priv->mutex);
  310. priv->alarm_sec = alarm->time.tm_sec;
  311. priv->alarm_min = alarm->time.tm_min;
  312. priv->alarm_hour = alarm->time.tm_hour;
  313. priv->alarm_mday = alarm->time.tm_mday;
  314. if (alarm->enabled)
  315. priv->irqen |= RTC_AF;
  316. res = ds1343_update_alarm(dev);
  317. mutex_unlock(&priv->mutex);
  318. return res;
  319. }
  320. static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
  321. {
  322. struct ds1343_priv *priv = dev_get_drvdata(dev);
  323. int res = 0;
  324. if (priv->irq <= 0)
  325. return -EINVAL;
  326. mutex_lock(&priv->mutex);
  327. if (enabled)
  328. priv->irqen |= RTC_AF;
  329. else
  330. priv->irqen &= ~RTC_AF;
  331. res = ds1343_update_alarm(dev);
  332. mutex_unlock(&priv->mutex);
  333. return res;
  334. }
  335. static irqreturn_t ds1343_thread(int irq, void *dev_id)
  336. {
  337. struct ds1343_priv *priv = dev_id;
  338. unsigned int stat, control;
  339. int res = 0;
  340. mutex_lock(&priv->mutex);
  341. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  342. if (res)
  343. goto out;
  344. if (stat & DS1343_IRQF0) {
  345. stat &= ~DS1343_IRQF0;
  346. regmap_write(priv->map, DS1343_STATUS_REG, stat);
  347. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  348. if (res)
  349. goto out;
  350. control &= ~DS1343_A0IE;
  351. regmap_write(priv->map, DS1343_CONTROL_REG, control);
  352. rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
  353. }
  354. out:
  355. mutex_unlock(&priv->mutex);
  356. return IRQ_HANDLED;
  357. }
  358. static const struct rtc_class_ops ds1343_rtc_ops = {
  359. .ioctl = ds1343_ioctl,
  360. .read_time = ds1343_read_time,
  361. .set_time = ds1343_set_time,
  362. .read_alarm = ds1343_read_alarm,
  363. .set_alarm = ds1343_set_alarm,
  364. .alarm_irq_enable = ds1343_alarm_irq_enable,
  365. };
  366. static int ds1343_probe(struct spi_device *spi)
  367. {
  368. struct ds1343_priv *priv;
  369. struct regmap_config config = { .reg_bits = 8, .val_bits = 8,
  370. .write_flag_mask = 0x80, };
  371. unsigned int data;
  372. int res;
  373. struct nvmem_config nvmem_cfg = {
  374. .name = "ds1343-",
  375. .word_size = 1,
  376. .stride = 1,
  377. .size = DS1343_NVRAM_LEN,
  378. .reg_read = ds1343_nvram_read,
  379. .reg_write = ds1343_nvram_write,
  380. };
  381. priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
  382. if (!priv)
  383. return -ENOMEM;
  384. priv->spi = spi;
  385. mutex_init(&priv->mutex);
  386. /* RTC DS1347 works in spi mode 3 and
  387. * its chip select is active high
  388. */
  389. spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
  390. spi->bits_per_word = 8;
  391. res = spi_setup(spi);
  392. if (res)
  393. return res;
  394. spi_set_drvdata(spi, priv);
  395. priv->map = devm_regmap_init_spi(spi, &config);
  396. if (IS_ERR(priv->map)) {
  397. dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
  398. return PTR_ERR(priv->map);
  399. }
  400. res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
  401. if (res)
  402. return res;
  403. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  404. data |= DS1343_INTCN;
  405. data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
  406. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  407. regmap_read(priv->map, DS1343_STATUS_REG, &data);
  408. data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
  409. regmap_write(priv->map, DS1343_STATUS_REG, data);
  410. priv->rtc = devm_rtc_allocate_device(&spi->dev);
  411. if (IS_ERR(priv->rtc))
  412. return PTR_ERR(priv->rtc);
  413. priv->rtc->nvram_old_abi = true;
  414. priv->rtc->ops = &ds1343_rtc_ops;
  415. res = rtc_register_device(priv->rtc);
  416. if (res)
  417. return res;
  418. nvmem_cfg.priv = priv;
  419. rtc_nvmem_register(priv->rtc, &nvmem_cfg);
  420. priv->irq = spi->irq;
  421. if (priv->irq >= 0) {
  422. res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
  423. ds1343_thread, IRQF_ONESHOT,
  424. "ds1343", priv);
  425. if (res) {
  426. priv->irq = -1;
  427. dev_err(&spi->dev,
  428. "unable to request irq for rtc ds1343\n");
  429. } else {
  430. device_init_wakeup(&spi->dev, true);
  431. dev_pm_set_wake_irq(&spi->dev, spi->irq);
  432. }
  433. }
  434. res = ds1343_sysfs_register(&spi->dev);
  435. if (res)
  436. dev_err(&spi->dev,
  437. "unable to create sysfs entries for rtc ds1343\n");
  438. return 0;
  439. }
  440. static int ds1343_remove(struct spi_device *spi)
  441. {
  442. struct ds1343_priv *priv = spi_get_drvdata(spi);
  443. if (spi->irq) {
  444. mutex_lock(&priv->mutex);
  445. priv->irqen &= ~RTC_AF;
  446. mutex_unlock(&priv->mutex);
  447. dev_pm_clear_wake_irq(&spi->dev);
  448. device_init_wakeup(&spi->dev, false);
  449. devm_free_irq(&spi->dev, spi->irq, priv);
  450. }
  451. spi_set_drvdata(spi, NULL);
  452. ds1343_sysfs_unregister(&spi->dev);
  453. return 0;
  454. }
  455. #ifdef CONFIG_PM_SLEEP
  456. static int ds1343_suspend(struct device *dev)
  457. {
  458. struct spi_device *spi = to_spi_device(dev);
  459. if (spi->irq >= 0 && device_may_wakeup(dev))
  460. enable_irq_wake(spi->irq);
  461. return 0;
  462. }
  463. static int ds1343_resume(struct device *dev)
  464. {
  465. struct spi_device *spi = to_spi_device(dev);
  466. if (spi->irq >= 0 && device_may_wakeup(dev))
  467. disable_irq_wake(spi->irq);
  468. return 0;
  469. }
  470. #endif
  471. static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
  472. static struct spi_driver ds1343_driver = {
  473. .driver = {
  474. .name = "ds1343",
  475. .pm = &ds1343_pm,
  476. },
  477. .probe = ds1343_probe,
  478. .remove = ds1343_remove,
  479. .id_table = ds1343_id,
  480. };
  481. module_spi_driver(ds1343_driver);
  482. MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
  483. MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>,"
  484. "Ankur Srivastava <sankurece@gmail.com>");
  485. MODULE_LICENSE("GPL v2");