rtc-cpcap.c 8.3 KB

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  1. /*
  2. * Motorola CPCAP PMIC RTC driver
  3. *
  4. * Based on cpcap-regulator.c from Motorola Linux kernel tree
  5. * Copyright (C) 2009 Motorola, Inc.
  6. *
  7. * Rewritten for mainline kernel
  8. * - use DT
  9. * - use regmap
  10. * - use standard interrupt framework
  11. * - use managed device resources
  12. * - remove custom "secure clock daemon" helpers
  13. *
  14. * Copyright (C) 2017 Sebastian Reichel <sre@kernel.org>
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License version 2 as
  18. * published by the Free Software Foundation.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/mod_devicetable.h>
  28. #include <linux/init.h>
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/rtc.h>
  32. #include <linux/err.h>
  33. #include <linux/regmap.h>
  34. #include <linux/mfd/motorola-cpcap.h>
  35. #include <linux/slab.h>
  36. #include <linux/sched.h>
  37. #define SECS_PER_DAY 86400
  38. #define DAY_MASK 0x7FFF
  39. #define TOD1_MASK 0x00FF
  40. #define TOD2_MASK 0x01FF
  41. struct cpcap_time {
  42. int day;
  43. int tod1;
  44. int tod2;
  45. };
  46. struct cpcap_rtc {
  47. struct regmap *regmap;
  48. struct rtc_device *rtc_dev;
  49. u16 vendor;
  50. int alarm_irq;
  51. bool alarm_enabled;
  52. int update_irq;
  53. bool update_enabled;
  54. };
  55. static void cpcap2rtc_time(struct rtc_time *rtc, struct cpcap_time *cpcap)
  56. {
  57. unsigned long int tod;
  58. unsigned long int time;
  59. tod = (cpcap->tod1 & TOD1_MASK) | ((cpcap->tod2 & TOD2_MASK) << 8);
  60. time = tod + ((cpcap->day & DAY_MASK) * SECS_PER_DAY);
  61. rtc_time_to_tm(time, rtc);
  62. }
  63. static void rtc2cpcap_time(struct cpcap_time *cpcap, struct rtc_time *rtc)
  64. {
  65. unsigned long time;
  66. rtc_tm_to_time(rtc, &time);
  67. cpcap->day = time / SECS_PER_DAY;
  68. time %= SECS_PER_DAY;
  69. cpcap->tod2 = (time >> 8) & TOD2_MASK;
  70. cpcap->tod1 = time & TOD1_MASK;
  71. }
  72. static int cpcap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  73. {
  74. struct cpcap_rtc *rtc = dev_get_drvdata(dev);
  75. if (rtc->alarm_enabled == enabled)
  76. return 0;
  77. if (enabled)
  78. enable_irq(rtc->alarm_irq);
  79. else
  80. disable_irq(rtc->alarm_irq);
  81. rtc->alarm_enabled = !!enabled;
  82. return 0;
  83. }
  84. static int cpcap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  85. {
  86. struct cpcap_rtc *rtc;
  87. struct cpcap_time cpcap_tm;
  88. int temp_tod2;
  89. int ret;
  90. rtc = dev_get_drvdata(dev);
  91. ret = regmap_read(rtc->regmap, CPCAP_REG_TOD2, &temp_tod2);
  92. ret |= regmap_read(rtc->regmap, CPCAP_REG_DAY, &cpcap_tm.day);
  93. ret |= regmap_read(rtc->regmap, CPCAP_REG_TOD1, &cpcap_tm.tod1);
  94. ret |= regmap_read(rtc->regmap, CPCAP_REG_TOD2, &cpcap_tm.tod2);
  95. if (temp_tod2 > cpcap_tm.tod2)
  96. ret |= regmap_read(rtc->regmap, CPCAP_REG_DAY, &cpcap_tm.day);
  97. if (ret) {
  98. dev_err(dev, "Failed to read time\n");
  99. return -EIO;
  100. }
  101. cpcap2rtc_time(tm, &cpcap_tm);
  102. return 0;
  103. }
  104. static int cpcap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  105. {
  106. struct cpcap_rtc *rtc;
  107. struct cpcap_time cpcap_tm;
  108. int ret = 0;
  109. rtc = dev_get_drvdata(dev);
  110. rtc2cpcap_time(&cpcap_tm, tm);
  111. if (rtc->alarm_enabled)
  112. disable_irq(rtc->alarm_irq);
  113. if (rtc->update_enabled)
  114. disable_irq(rtc->update_irq);
  115. if (rtc->vendor == CPCAP_VENDOR_ST) {
  116. /* The TOD1 and TOD2 registers MUST be written in this order
  117. * for the change to properly set.
  118. */
  119. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1,
  120. TOD1_MASK, cpcap_tm.tod1);
  121. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD2,
  122. TOD2_MASK, cpcap_tm.tod2);
  123. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_DAY,
  124. DAY_MASK, cpcap_tm.day);
  125. } else {
  126. /* Clearing the upper lower 8 bits of the TOD guarantees that
  127. * the upper half of TOD (TOD2) will not increment for 0xFF RTC
  128. * ticks (255 seconds). During this time we can safely write
  129. * to DAY, TOD2, then TOD1 (in that order) and expect RTC to be
  130. * synchronized to the exact time requested upon the final write
  131. * to TOD1.
  132. */
  133. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1,
  134. TOD1_MASK, 0);
  135. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_DAY,
  136. DAY_MASK, cpcap_tm.day);
  137. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD2,
  138. TOD2_MASK, cpcap_tm.tod2);
  139. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1,
  140. TOD1_MASK, cpcap_tm.tod1);
  141. }
  142. if (rtc->update_enabled)
  143. enable_irq(rtc->update_irq);
  144. if (rtc->alarm_enabled)
  145. enable_irq(rtc->alarm_irq);
  146. return ret;
  147. }
  148. static int cpcap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  149. {
  150. struct cpcap_rtc *rtc;
  151. struct cpcap_time cpcap_tm;
  152. int ret;
  153. rtc = dev_get_drvdata(dev);
  154. alrm->enabled = rtc->alarm_enabled;
  155. ret = regmap_read(rtc->regmap, CPCAP_REG_DAYA, &cpcap_tm.day);
  156. ret |= regmap_read(rtc->regmap, CPCAP_REG_TODA2, &cpcap_tm.tod2);
  157. ret |= regmap_read(rtc->regmap, CPCAP_REG_TODA1, &cpcap_tm.tod1);
  158. if (ret) {
  159. dev_err(dev, "Failed to read time\n");
  160. return -EIO;
  161. }
  162. cpcap2rtc_time(&alrm->time, &cpcap_tm);
  163. return rtc_valid_tm(&alrm->time);
  164. }
  165. static int cpcap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  166. {
  167. struct cpcap_rtc *rtc;
  168. struct cpcap_time cpcap_tm;
  169. int ret;
  170. rtc = dev_get_drvdata(dev);
  171. rtc2cpcap_time(&cpcap_tm, &alrm->time);
  172. if (rtc->alarm_enabled)
  173. disable_irq(rtc->alarm_irq);
  174. ret = regmap_update_bits(rtc->regmap, CPCAP_REG_DAYA, DAY_MASK,
  175. cpcap_tm.day);
  176. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TODA2, TOD2_MASK,
  177. cpcap_tm.tod2);
  178. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TODA1, TOD1_MASK,
  179. cpcap_tm.tod1);
  180. if (!ret) {
  181. enable_irq(rtc->alarm_irq);
  182. rtc->alarm_enabled = true;
  183. }
  184. return ret;
  185. }
  186. static const struct rtc_class_ops cpcap_rtc_ops = {
  187. .read_time = cpcap_rtc_read_time,
  188. .set_time = cpcap_rtc_set_time,
  189. .read_alarm = cpcap_rtc_read_alarm,
  190. .set_alarm = cpcap_rtc_set_alarm,
  191. .alarm_irq_enable = cpcap_rtc_alarm_irq_enable,
  192. };
  193. static irqreturn_t cpcap_rtc_alarm_irq(int irq, void *data)
  194. {
  195. struct cpcap_rtc *rtc = data;
  196. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  197. return IRQ_HANDLED;
  198. }
  199. static irqreturn_t cpcap_rtc_update_irq(int irq, void *data)
  200. {
  201. struct cpcap_rtc *rtc = data;
  202. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  203. return IRQ_HANDLED;
  204. }
  205. static int cpcap_rtc_probe(struct platform_device *pdev)
  206. {
  207. struct device *dev = &pdev->dev;
  208. struct cpcap_rtc *rtc;
  209. int err;
  210. rtc = devm_kzalloc(dev, sizeof(*rtc), GFP_KERNEL);
  211. if (!rtc)
  212. return -ENOMEM;
  213. rtc->regmap = dev_get_regmap(dev->parent, NULL);
  214. if (!rtc->regmap)
  215. return -ENODEV;
  216. platform_set_drvdata(pdev, rtc);
  217. rtc->rtc_dev = devm_rtc_device_register(dev, "cpcap_rtc",
  218. &cpcap_rtc_ops, THIS_MODULE);
  219. if (IS_ERR(rtc->rtc_dev))
  220. return PTR_ERR(rtc->rtc_dev);
  221. err = cpcap_get_vendor(dev, rtc->regmap, &rtc->vendor);
  222. if (err)
  223. return err;
  224. rtc->alarm_irq = platform_get_irq(pdev, 0);
  225. err = devm_request_threaded_irq(dev, rtc->alarm_irq, NULL,
  226. cpcap_rtc_alarm_irq, IRQF_TRIGGER_NONE,
  227. "rtc_alarm", rtc);
  228. if (err) {
  229. dev_err(dev, "Could not request alarm irq: %d\n", err);
  230. return err;
  231. }
  232. disable_irq(rtc->alarm_irq);
  233. /* Stock Android uses the 1 Hz interrupt for "secure clock daemon",
  234. * which is not supported by the mainline kernel. The mainline kernel
  235. * does not use the irq at the moment, but we explicitly request and
  236. * disable it, so that its masked and does not wake up the processor
  237. * every second.
  238. */
  239. rtc->update_irq = platform_get_irq(pdev, 1);
  240. err = devm_request_threaded_irq(dev, rtc->update_irq, NULL,
  241. cpcap_rtc_update_irq, IRQF_TRIGGER_NONE,
  242. "rtc_1hz", rtc);
  243. if (err) {
  244. dev_err(dev, "Could not request update irq: %d\n", err);
  245. return err;
  246. }
  247. disable_irq(rtc->update_irq);
  248. err = device_init_wakeup(dev, 1);
  249. if (err) {
  250. dev_err(dev, "wakeup initialization failed (%d)\n", err);
  251. /* ignore error and continue without wakeup support */
  252. }
  253. return 0;
  254. }
  255. static const struct of_device_id cpcap_rtc_of_match[] = {
  256. { .compatible = "motorola,cpcap-rtc", },
  257. {},
  258. };
  259. MODULE_DEVICE_TABLE(of, cpcap_rtc_of_match);
  260. static struct platform_driver cpcap_rtc_driver = {
  261. .probe = cpcap_rtc_probe,
  262. .driver = {
  263. .name = "cpcap-rtc",
  264. .of_match_table = cpcap_rtc_of_match,
  265. },
  266. };
  267. module_platform_driver(cpcap_rtc_driver);
  268. MODULE_ALIAS("platform:cpcap-rtc");
  269. MODULE_DESCRIPTION("CPCAP RTC driver");
  270. MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
  271. MODULE_LICENSE("GPL");