en_netdev.c 98 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/bpf.h>
  34. #include <linux/etherdevice.h>
  35. #include <linux/tcp.h>
  36. #include <linux/if_vlan.h>
  37. #include <linux/delay.h>
  38. #include <linux/slab.h>
  39. #include <linux/hash.h>
  40. #include <net/ip.h>
  41. #include <net/busy_poll.h>
  42. #include <net/vxlan.h>
  43. #include <net/devlink.h>
  44. #include <linux/mlx4/driver.h>
  45. #include <linux/mlx4/device.h>
  46. #include <linux/mlx4/cmd.h>
  47. #include <linux/mlx4/cq.h>
  48. #include "mlx4_en.h"
  49. #include "en_port.h"
  50. #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
  51. XDP_PACKET_HEADROOM))
  52. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  53. {
  54. struct mlx4_en_priv *priv = netdev_priv(dev);
  55. int i;
  56. unsigned int offset = 0;
  57. if (up && up != MLX4_EN_NUM_UP_HIGH)
  58. return -EINVAL;
  59. netdev_set_num_tc(dev, up);
  60. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  61. /* Partition Tx queues evenly amongst UP's */
  62. for (i = 0; i < up; i++) {
  63. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  64. offset += priv->num_tx_rings_p_up;
  65. }
  66. #ifdef CONFIG_MLX4_EN_DCB
  67. if (!mlx4_is_slave(priv->mdev->dev)) {
  68. if (up) {
  69. if (priv->dcbx_cap)
  70. priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
  71. } else {
  72. priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
  73. priv->cee_config.pfc_state = false;
  74. }
  75. }
  76. #endif /* CONFIG_MLX4_EN_DCB */
  77. return 0;
  78. }
  79. int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)
  80. {
  81. struct mlx4_en_priv *priv = netdev_priv(dev);
  82. struct mlx4_en_dev *mdev = priv->mdev;
  83. struct mlx4_en_port_profile new_prof;
  84. struct mlx4_en_priv *tmp;
  85. int total_count;
  86. int port_up = 0;
  87. int err = 0;
  88. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  89. if (!tmp)
  90. return -ENOMEM;
  91. mutex_lock(&mdev->state_lock);
  92. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  93. new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :
  94. MLX4_EN_NUM_UP_HIGH;
  95. new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *
  96. new_prof.num_up;
  97. total_count = new_prof.tx_ring_num[TX] + new_prof.tx_ring_num[TX_XDP];
  98. if (total_count > MAX_TX_RINGS) {
  99. err = -EINVAL;
  100. en_err(priv,
  101. "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
  102. total_count, MAX_TX_RINGS);
  103. goto out;
  104. }
  105. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
  106. if (err)
  107. goto out;
  108. if (priv->port_up) {
  109. port_up = 1;
  110. mlx4_en_stop_port(dev, 1);
  111. }
  112. mlx4_en_safe_replace_resources(priv, tmp);
  113. if (port_up) {
  114. err = mlx4_en_start_port(dev);
  115. if (err) {
  116. en_err(priv, "Failed starting port for setup TC\n");
  117. goto out;
  118. }
  119. }
  120. err = mlx4_en_setup_tc(dev, tc);
  121. out:
  122. mutex_unlock(&mdev->state_lock);
  123. kfree(tmp);
  124. return err;
  125. }
  126. static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,
  127. void *type_data)
  128. {
  129. struct tc_mqprio_qopt *mqprio = type_data;
  130. if (type != TC_SETUP_QDISC_MQPRIO)
  131. return -EOPNOTSUPP;
  132. if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)
  133. return -EINVAL;
  134. mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
  135. return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);
  136. }
  137. #ifdef CONFIG_RFS_ACCEL
  138. struct mlx4_en_filter {
  139. struct list_head next;
  140. struct work_struct work;
  141. u8 ip_proto;
  142. __be32 src_ip;
  143. __be32 dst_ip;
  144. __be16 src_port;
  145. __be16 dst_port;
  146. int rxq_index;
  147. struct mlx4_en_priv *priv;
  148. u32 flow_id; /* RFS infrastructure id */
  149. int id; /* mlx4_en driver id */
  150. u64 reg_id; /* Flow steering API id */
  151. u8 activated; /* Used to prevent expiry before filter
  152. * is attached
  153. */
  154. struct hlist_node filter_chain;
  155. };
  156. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  157. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  158. {
  159. switch (ip_proto) {
  160. case IPPROTO_UDP:
  161. return MLX4_NET_TRANS_RULE_ID_UDP;
  162. case IPPROTO_TCP:
  163. return MLX4_NET_TRANS_RULE_ID_TCP;
  164. default:
  165. return MLX4_NET_TRANS_RULE_NUM;
  166. }
  167. };
  168. /* Must not acquire state_lock, as its corresponding work_sync
  169. * is done under it.
  170. */
  171. static void mlx4_en_filter_work(struct work_struct *work)
  172. {
  173. struct mlx4_en_filter *filter = container_of(work,
  174. struct mlx4_en_filter,
  175. work);
  176. struct mlx4_en_priv *priv = filter->priv;
  177. struct mlx4_spec_list spec_tcp_udp = {
  178. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  179. {
  180. .tcp_udp = {
  181. .dst_port = filter->dst_port,
  182. .dst_port_msk = (__force __be16)-1,
  183. .src_port = filter->src_port,
  184. .src_port_msk = (__force __be16)-1,
  185. },
  186. },
  187. };
  188. struct mlx4_spec_list spec_ip = {
  189. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  190. {
  191. .ipv4 = {
  192. .dst_ip = filter->dst_ip,
  193. .dst_ip_msk = (__force __be32)-1,
  194. .src_ip = filter->src_ip,
  195. .src_ip_msk = (__force __be32)-1,
  196. },
  197. },
  198. };
  199. struct mlx4_spec_list spec_eth = {
  200. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  201. };
  202. struct mlx4_net_trans_rule rule = {
  203. .list = LIST_HEAD_INIT(rule.list),
  204. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  205. .exclusive = 1,
  206. .allow_loopback = 1,
  207. .promisc_mode = MLX4_FS_REGULAR,
  208. .port = priv->port,
  209. .priority = MLX4_DOMAIN_RFS,
  210. };
  211. int rc;
  212. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  213. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  214. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  215. filter->ip_proto);
  216. goto ignore;
  217. }
  218. list_add_tail(&spec_eth.list, &rule.list);
  219. list_add_tail(&spec_ip.list, &rule.list);
  220. list_add_tail(&spec_tcp_udp.list, &rule.list);
  221. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  222. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  223. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  224. filter->activated = 0;
  225. if (filter->reg_id) {
  226. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  227. if (rc && rc != -ENOENT)
  228. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  229. }
  230. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  231. if (rc)
  232. en_err(priv, "Error attaching flow. err = %d\n", rc);
  233. ignore:
  234. mlx4_en_filter_rfs_expire(priv);
  235. filter->activated = 1;
  236. }
  237. static inline struct hlist_head *
  238. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  239. __be16 src_port, __be16 dst_port)
  240. {
  241. unsigned long l;
  242. int bucket_idx;
  243. l = (__force unsigned long)src_port |
  244. ((__force unsigned long)dst_port << 2);
  245. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  246. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  247. return &priv->filter_hash[bucket_idx];
  248. }
  249. static struct mlx4_en_filter *
  250. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  251. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  252. __be16 dst_port, u32 flow_id)
  253. {
  254. struct mlx4_en_filter *filter = NULL;
  255. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  256. if (!filter)
  257. return NULL;
  258. filter->priv = priv;
  259. filter->rxq_index = rxq_index;
  260. INIT_WORK(&filter->work, mlx4_en_filter_work);
  261. filter->src_ip = src_ip;
  262. filter->dst_ip = dst_ip;
  263. filter->ip_proto = ip_proto;
  264. filter->src_port = src_port;
  265. filter->dst_port = dst_port;
  266. filter->flow_id = flow_id;
  267. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  268. list_add_tail(&filter->next, &priv->filters);
  269. hlist_add_head(&filter->filter_chain,
  270. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  271. dst_port));
  272. return filter;
  273. }
  274. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  275. {
  276. struct mlx4_en_priv *priv = filter->priv;
  277. int rc;
  278. list_del(&filter->next);
  279. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  280. if (rc && rc != -ENOENT)
  281. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  282. kfree(filter);
  283. }
  284. static inline struct mlx4_en_filter *
  285. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  286. u8 ip_proto, __be16 src_port, __be16 dst_port)
  287. {
  288. struct mlx4_en_filter *filter;
  289. struct mlx4_en_filter *ret = NULL;
  290. hlist_for_each_entry(filter,
  291. filter_hash_bucket(priv, src_ip, dst_ip,
  292. src_port, dst_port),
  293. filter_chain) {
  294. if (filter->src_ip == src_ip &&
  295. filter->dst_ip == dst_ip &&
  296. filter->ip_proto == ip_proto &&
  297. filter->src_port == src_port &&
  298. filter->dst_port == dst_port) {
  299. ret = filter;
  300. break;
  301. }
  302. }
  303. return ret;
  304. }
  305. static int
  306. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  307. u16 rxq_index, u32 flow_id)
  308. {
  309. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  310. struct mlx4_en_filter *filter;
  311. const struct iphdr *ip;
  312. const __be16 *ports;
  313. u8 ip_proto;
  314. __be32 src_ip;
  315. __be32 dst_ip;
  316. __be16 src_port;
  317. __be16 dst_port;
  318. int nhoff = skb_network_offset(skb);
  319. int ret = 0;
  320. if (skb->protocol != htons(ETH_P_IP))
  321. return -EPROTONOSUPPORT;
  322. ip = (const struct iphdr *)(skb->data + nhoff);
  323. if (ip_is_fragment(ip))
  324. return -EPROTONOSUPPORT;
  325. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  326. return -EPROTONOSUPPORT;
  327. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  328. ip_proto = ip->protocol;
  329. src_ip = ip->saddr;
  330. dst_ip = ip->daddr;
  331. src_port = ports[0];
  332. dst_port = ports[1];
  333. spin_lock_bh(&priv->filters_lock);
  334. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  335. src_port, dst_port);
  336. if (filter) {
  337. if (filter->rxq_index == rxq_index)
  338. goto out;
  339. filter->rxq_index = rxq_index;
  340. } else {
  341. filter = mlx4_en_filter_alloc(priv, rxq_index,
  342. src_ip, dst_ip, ip_proto,
  343. src_port, dst_port, flow_id);
  344. if (!filter) {
  345. ret = -ENOMEM;
  346. goto err;
  347. }
  348. }
  349. queue_work(priv->mdev->workqueue, &filter->work);
  350. out:
  351. ret = filter->id;
  352. err:
  353. spin_unlock_bh(&priv->filters_lock);
  354. return ret;
  355. }
  356. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  357. {
  358. struct mlx4_en_filter *filter, *tmp;
  359. LIST_HEAD(del_list);
  360. spin_lock_bh(&priv->filters_lock);
  361. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  362. list_move(&filter->next, &del_list);
  363. hlist_del(&filter->filter_chain);
  364. }
  365. spin_unlock_bh(&priv->filters_lock);
  366. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  367. cancel_work_sync(&filter->work);
  368. mlx4_en_filter_free(filter);
  369. }
  370. }
  371. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  372. {
  373. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  374. LIST_HEAD(del_list);
  375. int i = 0;
  376. spin_lock_bh(&priv->filters_lock);
  377. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  378. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  379. break;
  380. if (filter->activated &&
  381. !work_pending(&filter->work) &&
  382. rps_may_expire_flow(priv->dev,
  383. filter->rxq_index, filter->flow_id,
  384. filter->id)) {
  385. list_move(&filter->next, &del_list);
  386. hlist_del(&filter->filter_chain);
  387. } else
  388. last_filter = filter;
  389. i++;
  390. }
  391. if (last_filter && (&last_filter->next != priv->filters.next))
  392. list_move(&priv->filters, &last_filter->next);
  393. spin_unlock_bh(&priv->filters_lock);
  394. list_for_each_entry_safe(filter, tmp, &del_list, next)
  395. mlx4_en_filter_free(filter);
  396. }
  397. #endif
  398. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  399. __be16 proto, u16 vid)
  400. {
  401. struct mlx4_en_priv *priv = netdev_priv(dev);
  402. struct mlx4_en_dev *mdev = priv->mdev;
  403. int err;
  404. int idx;
  405. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  406. set_bit(vid, priv->active_vlans);
  407. /* Add VID to port VLAN filter */
  408. mutex_lock(&mdev->state_lock);
  409. if (mdev->device_up && priv->port_up) {
  410. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  411. if (err) {
  412. en_err(priv, "Failed configuring VLAN filter\n");
  413. goto out;
  414. }
  415. }
  416. err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
  417. if (err)
  418. en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
  419. out:
  420. mutex_unlock(&mdev->state_lock);
  421. return err;
  422. }
  423. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  424. __be16 proto, u16 vid)
  425. {
  426. struct mlx4_en_priv *priv = netdev_priv(dev);
  427. struct mlx4_en_dev *mdev = priv->mdev;
  428. int err = 0;
  429. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  430. clear_bit(vid, priv->active_vlans);
  431. /* Remove VID from port VLAN filter */
  432. mutex_lock(&mdev->state_lock);
  433. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  434. if (mdev->device_up && priv->port_up) {
  435. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  436. if (err)
  437. en_err(priv, "Failed configuring VLAN filter\n");
  438. }
  439. mutex_unlock(&mdev->state_lock);
  440. return err;
  441. }
  442. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  443. {
  444. int i;
  445. for (i = ETH_ALEN - 1; i >= 0; --i) {
  446. dst_mac[i] = src_mac & 0xff;
  447. src_mac >>= 8;
  448. }
  449. memset(&dst_mac[ETH_ALEN], 0, 2);
  450. }
  451. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  452. int qpn, u64 *reg_id)
  453. {
  454. int err;
  455. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
  456. priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
  457. return 0; /* do nothing */
  458. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  459. MLX4_DOMAIN_NIC, reg_id);
  460. if (err) {
  461. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  462. return err;
  463. }
  464. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  465. return 0;
  466. }
  467. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  468. unsigned char *mac, int *qpn, u64 *reg_id)
  469. {
  470. struct mlx4_en_dev *mdev = priv->mdev;
  471. struct mlx4_dev *dev = mdev->dev;
  472. int err;
  473. switch (dev->caps.steering_mode) {
  474. case MLX4_STEERING_MODE_B0: {
  475. struct mlx4_qp qp;
  476. u8 gid[16] = {0};
  477. qp.qpn = *qpn;
  478. memcpy(&gid[10], mac, ETH_ALEN);
  479. gid[5] = priv->port;
  480. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  481. break;
  482. }
  483. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  484. struct mlx4_spec_list spec_eth = { {NULL} };
  485. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  486. struct mlx4_net_trans_rule rule = {
  487. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  488. .exclusive = 0,
  489. .allow_loopback = 1,
  490. .promisc_mode = MLX4_FS_REGULAR,
  491. .priority = MLX4_DOMAIN_NIC,
  492. };
  493. rule.port = priv->port;
  494. rule.qpn = *qpn;
  495. INIT_LIST_HEAD(&rule.list);
  496. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  497. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  498. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  499. list_add_tail(&spec_eth.list, &rule.list);
  500. err = mlx4_flow_attach(dev, &rule, reg_id);
  501. break;
  502. }
  503. default:
  504. return -EINVAL;
  505. }
  506. if (err)
  507. en_warn(priv, "Failed Attaching Unicast\n");
  508. return err;
  509. }
  510. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  511. unsigned char *mac, int qpn, u64 reg_id)
  512. {
  513. struct mlx4_en_dev *mdev = priv->mdev;
  514. struct mlx4_dev *dev = mdev->dev;
  515. switch (dev->caps.steering_mode) {
  516. case MLX4_STEERING_MODE_B0: {
  517. struct mlx4_qp qp;
  518. u8 gid[16] = {0};
  519. qp.qpn = qpn;
  520. memcpy(&gid[10], mac, ETH_ALEN);
  521. gid[5] = priv->port;
  522. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  523. break;
  524. }
  525. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  526. mlx4_flow_detach(dev, reg_id);
  527. break;
  528. }
  529. default:
  530. en_err(priv, "Invalid steering mode.\n");
  531. }
  532. }
  533. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  534. {
  535. struct mlx4_en_dev *mdev = priv->mdev;
  536. struct mlx4_dev *dev = mdev->dev;
  537. int index = 0;
  538. int err = 0;
  539. int *qpn = &priv->base_qpn;
  540. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  541. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  542. priv->dev->dev_addr);
  543. index = mlx4_register_mac(dev, priv->port, mac);
  544. if (index < 0) {
  545. err = index;
  546. en_err(priv, "Failed adding MAC: %pM\n",
  547. priv->dev->dev_addr);
  548. return err;
  549. }
  550. en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);
  551. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  552. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  553. *qpn = base_qpn + index;
  554. return 0;
  555. }
  556. err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,
  557. MLX4_RES_USAGE_DRIVER);
  558. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  559. if (err) {
  560. en_err(priv, "Failed to reserve qp for mac registration\n");
  561. mlx4_unregister_mac(dev, priv->port, mac);
  562. return err;
  563. }
  564. return 0;
  565. }
  566. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  567. {
  568. struct mlx4_en_dev *mdev = priv->mdev;
  569. struct mlx4_dev *dev = mdev->dev;
  570. int qpn = priv->base_qpn;
  571. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  572. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  573. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  574. priv->dev->dev_addr);
  575. mlx4_unregister_mac(dev, priv->port, mac);
  576. } else {
  577. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  578. priv->port, qpn);
  579. mlx4_qp_release_range(dev, qpn, 1);
  580. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  581. }
  582. }
  583. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  584. unsigned char *new_mac, unsigned char *prev_mac)
  585. {
  586. struct mlx4_en_dev *mdev = priv->mdev;
  587. struct mlx4_dev *dev = mdev->dev;
  588. int err = 0;
  589. u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
  590. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  591. struct hlist_head *bucket;
  592. unsigned int mac_hash;
  593. struct mlx4_mac_entry *entry;
  594. struct hlist_node *tmp;
  595. u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
  596. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  597. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  598. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  599. mlx4_en_uc_steer_release(priv, entry->mac,
  600. qpn, entry->reg_id);
  601. mlx4_unregister_mac(dev, priv->port,
  602. prev_mac_u64);
  603. hlist_del_rcu(&entry->hlist);
  604. synchronize_rcu();
  605. memcpy(entry->mac, new_mac, ETH_ALEN);
  606. entry->reg_id = 0;
  607. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  608. hlist_add_head_rcu(&entry->hlist,
  609. &priv->mac_hash[mac_hash]);
  610. mlx4_register_mac(dev, priv->port, new_mac_u64);
  611. err = mlx4_en_uc_steer_add(priv, new_mac,
  612. &qpn,
  613. &entry->reg_id);
  614. if (err)
  615. return err;
  616. if (priv->tunnel_reg_id) {
  617. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  618. priv->tunnel_reg_id = 0;
  619. }
  620. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  621. &priv->tunnel_reg_id);
  622. return err;
  623. }
  624. }
  625. return -EINVAL;
  626. }
  627. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  628. }
  629. static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,
  630. unsigned char new_mac[ETH_ALEN + 2])
  631. {
  632. struct mlx4_en_dev *mdev = priv->mdev;
  633. int err;
  634. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))
  635. return;
  636. err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);
  637. if (err)
  638. en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",
  639. new_mac, priv->port, err);
  640. }
  641. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
  642. unsigned char new_mac[ETH_ALEN + 2])
  643. {
  644. int err = 0;
  645. if (priv->port_up) {
  646. /* Remove old MAC and insert the new one */
  647. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  648. new_mac, priv->current_mac);
  649. if (err)
  650. en_err(priv, "Failed changing HW MAC address\n");
  651. } else
  652. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  653. if (!err)
  654. memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
  655. return err;
  656. }
  657. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  658. {
  659. struct mlx4_en_priv *priv = netdev_priv(dev);
  660. struct mlx4_en_dev *mdev = priv->mdev;
  661. struct sockaddr *saddr = addr;
  662. unsigned char new_mac[ETH_ALEN + 2];
  663. int err;
  664. if (!is_valid_ether_addr(saddr->sa_data))
  665. return -EADDRNOTAVAIL;
  666. mutex_lock(&mdev->state_lock);
  667. memcpy(new_mac, saddr->sa_data, ETH_ALEN);
  668. err = mlx4_en_do_set_mac(priv, new_mac);
  669. if (err)
  670. goto out;
  671. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  672. mlx4_en_update_user_mac(priv, new_mac);
  673. out:
  674. mutex_unlock(&mdev->state_lock);
  675. return err;
  676. }
  677. static void mlx4_en_clear_list(struct net_device *dev)
  678. {
  679. struct mlx4_en_priv *priv = netdev_priv(dev);
  680. struct mlx4_en_mc_list *tmp, *mc_to_del;
  681. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  682. list_del(&mc_to_del->list);
  683. kfree(mc_to_del);
  684. }
  685. }
  686. static void mlx4_en_cache_mclist(struct net_device *dev)
  687. {
  688. struct mlx4_en_priv *priv = netdev_priv(dev);
  689. struct netdev_hw_addr *ha;
  690. struct mlx4_en_mc_list *tmp;
  691. mlx4_en_clear_list(dev);
  692. netdev_for_each_mc_addr(ha, dev) {
  693. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  694. if (!tmp) {
  695. mlx4_en_clear_list(dev);
  696. return;
  697. }
  698. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  699. list_add_tail(&tmp->list, &priv->mc_list);
  700. }
  701. }
  702. static void update_mclist_flags(struct mlx4_en_priv *priv,
  703. struct list_head *dst,
  704. struct list_head *src)
  705. {
  706. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  707. bool found;
  708. /* Find all the entries that should be removed from dst,
  709. * These are the entries that are not found in src
  710. */
  711. list_for_each_entry(dst_tmp, dst, list) {
  712. found = false;
  713. list_for_each_entry(src_tmp, src, list) {
  714. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  715. found = true;
  716. break;
  717. }
  718. }
  719. if (!found)
  720. dst_tmp->action = MCLIST_REM;
  721. }
  722. /* Add entries that exist in src but not in dst
  723. * mark them as need to add
  724. */
  725. list_for_each_entry(src_tmp, src, list) {
  726. found = false;
  727. list_for_each_entry(dst_tmp, dst, list) {
  728. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  729. dst_tmp->action = MCLIST_NONE;
  730. found = true;
  731. break;
  732. }
  733. }
  734. if (!found) {
  735. new_mc = kmemdup(src_tmp,
  736. sizeof(struct mlx4_en_mc_list),
  737. GFP_KERNEL);
  738. if (!new_mc)
  739. return;
  740. new_mc->action = MCLIST_ADD;
  741. list_add_tail(&new_mc->list, dst);
  742. }
  743. }
  744. }
  745. static void mlx4_en_set_rx_mode(struct net_device *dev)
  746. {
  747. struct mlx4_en_priv *priv = netdev_priv(dev);
  748. if (!priv->port_up)
  749. return;
  750. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  751. }
  752. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  753. struct mlx4_en_dev *mdev)
  754. {
  755. int err = 0;
  756. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  757. if (netif_msg_rx_status(priv))
  758. en_warn(priv, "Entering promiscuous mode\n");
  759. priv->flags |= MLX4_EN_FLAG_PROMISC;
  760. /* Enable promiscouos mode */
  761. switch (mdev->dev->caps.steering_mode) {
  762. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  763. err = mlx4_flow_steer_promisc_add(mdev->dev,
  764. priv->port,
  765. priv->base_qpn,
  766. MLX4_FS_ALL_DEFAULT);
  767. if (err)
  768. en_err(priv, "Failed enabling promiscuous mode\n");
  769. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  770. break;
  771. case MLX4_STEERING_MODE_B0:
  772. err = mlx4_unicast_promisc_add(mdev->dev,
  773. priv->base_qpn,
  774. priv->port);
  775. if (err)
  776. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  777. /* Add the default qp number as multicast
  778. * promisc
  779. */
  780. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  781. err = mlx4_multicast_promisc_add(mdev->dev,
  782. priv->base_qpn,
  783. priv->port);
  784. if (err)
  785. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  786. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  787. }
  788. break;
  789. case MLX4_STEERING_MODE_A0:
  790. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  791. priv->port,
  792. priv->base_qpn,
  793. 1);
  794. if (err)
  795. en_err(priv, "Failed enabling promiscuous mode\n");
  796. break;
  797. }
  798. /* Disable port multicast filter (unconditionally) */
  799. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  800. 0, MLX4_MCAST_DISABLE);
  801. if (err)
  802. en_err(priv, "Failed disabling multicast filter\n");
  803. }
  804. }
  805. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  806. struct mlx4_en_dev *mdev)
  807. {
  808. int err = 0;
  809. if (netif_msg_rx_status(priv))
  810. en_warn(priv, "Leaving promiscuous mode\n");
  811. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  812. /* Disable promiscouos mode */
  813. switch (mdev->dev->caps.steering_mode) {
  814. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  815. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  816. priv->port,
  817. MLX4_FS_ALL_DEFAULT);
  818. if (err)
  819. en_err(priv, "Failed disabling promiscuous mode\n");
  820. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  821. break;
  822. case MLX4_STEERING_MODE_B0:
  823. err = mlx4_unicast_promisc_remove(mdev->dev,
  824. priv->base_qpn,
  825. priv->port);
  826. if (err)
  827. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  828. /* Disable Multicast promisc */
  829. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  830. err = mlx4_multicast_promisc_remove(mdev->dev,
  831. priv->base_qpn,
  832. priv->port);
  833. if (err)
  834. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  835. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  836. }
  837. break;
  838. case MLX4_STEERING_MODE_A0:
  839. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  840. priv->port,
  841. priv->base_qpn, 0);
  842. if (err)
  843. en_err(priv, "Failed disabling promiscuous mode\n");
  844. break;
  845. }
  846. }
  847. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  848. struct net_device *dev,
  849. struct mlx4_en_dev *mdev)
  850. {
  851. struct mlx4_en_mc_list *mclist, *tmp;
  852. u64 mcast_addr = 0;
  853. u8 mc_list[16] = {0};
  854. int err = 0;
  855. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  856. if (dev->flags & IFF_ALLMULTI) {
  857. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  858. 0, MLX4_MCAST_DISABLE);
  859. if (err)
  860. en_err(priv, "Failed disabling multicast filter\n");
  861. /* Add the default qp number as multicast promisc */
  862. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  863. switch (mdev->dev->caps.steering_mode) {
  864. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  865. err = mlx4_flow_steer_promisc_add(mdev->dev,
  866. priv->port,
  867. priv->base_qpn,
  868. MLX4_FS_MC_DEFAULT);
  869. break;
  870. case MLX4_STEERING_MODE_B0:
  871. err = mlx4_multicast_promisc_add(mdev->dev,
  872. priv->base_qpn,
  873. priv->port);
  874. break;
  875. case MLX4_STEERING_MODE_A0:
  876. break;
  877. }
  878. if (err)
  879. en_err(priv, "Failed entering multicast promisc mode\n");
  880. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  881. }
  882. } else {
  883. /* Disable Multicast promisc */
  884. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  885. switch (mdev->dev->caps.steering_mode) {
  886. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  887. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  888. priv->port,
  889. MLX4_FS_MC_DEFAULT);
  890. break;
  891. case MLX4_STEERING_MODE_B0:
  892. err = mlx4_multicast_promisc_remove(mdev->dev,
  893. priv->base_qpn,
  894. priv->port);
  895. break;
  896. case MLX4_STEERING_MODE_A0:
  897. break;
  898. }
  899. if (err)
  900. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  901. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  902. }
  903. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  904. 0, MLX4_MCAST_DISABLE);
  905. if (err)
  906. en_err(priv, "Failed disabling multicast filter\n");
  907. /* Flush mcast filter and init it with broadcast address */
  908. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  909. 1, MLX4_MCAST_CONFIG);
  910. /* Update multicast list - we cache all addresses so they won't
  911. * change while HW is updated holding the command semaphor */
  912. netif_addr_lock_bh(dev);
  913. mlx4_en_cache_mclist(dev);
  914. netif_addr_unlock_bh(dev);
  915. list_for_each_entry(mclist, &priv->mc_list, list) {
  916. mcast_addr = mlx4_mac_to_u64(mclist->addr);
  917. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  918. mcast_addr, 0, MLX4_MCAST_CONFIG);
  919. }
  920. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  921. 0, MLX4_MCAST_ENABLE);
  922. if (err)
  923. en_err(priv, "Failed enabling multicast filter\n");
  924. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  925. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  926. if (mclist->action == MCLIST_REM) {
  927. /* detach this address and delete from list */
  928. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  929. mc_list[5] = priv->port;
  930. err = mlx4_multicast_detach(mdev->dev,
  931. priv->rss_map.indir_qp,
  932. mc_list,
  933. MLX4_PROT_ETH,
  934. mclist->reg_id);
  935. if (err)
  936. en_err(priv, "Fail to detach multicast address\n");
  937. if (mclist->tunnel_reg_id) {
  938. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  939. if (err)
  940. en_err(priv, "Failed to detach multicast address\n");
  941. }
  942. /* remove from list */
  943. list_del(&mclist->list);
  944. kfree(mclist);
  945. } else if (mclist->action == MCLIST_ADD) {
  946. /* attach the address */
  947. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  948. /* needed for B0 steering support */
  949. mc_list[5] = priv->port;
  950. err = mlx4_multicast_attach(mdev->dev,
  951. priv->rss_map.indir_qp,
  952. mc_list,
  953. priv->port, 0,
  954. MLX4_PROT_ETH,
  955. &mclist->reg_id);
  956. if (err)
  957. en_err(priv, "Fail to attach multicast address\n");
  958. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  959. &mclist->tunnel_reg_id);
  960. if (err)
  961. en_err(priv, "Failed to attach multicast address\n");
  962. }
  963. }
  964. }
  965. }
  966. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  967. struct net_device *dev,
  968. struct mlx4_en_dev *mdev)
  969. {
  970. struct netdev_hw_addr *ha;
  971. struct mlx4_mac_entry *entry;
  972. struct hlist_node *tmp;
  973. bool found;
  974. u64 mac;
  975. int err = 0;
  976. struct hlist_head *bucket;
  977. unsigned int i;
  978. int removed = 0;
  979. u32 prev_flags;
  980. /* Note that we do not need to protect our mac_hash traversal with rcu,
  981. * since all modification code is protected by mdev->state_lock
  982. */
  983. /* find what to remove */
  984. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  985. bucket = &priv->mac_hash[i];
  986. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  987. found = false;
  988. netdev_for_each_uc_addr(ha, dev) {
  989. if (ether_addr_equal_64bits(entry->mac,
  990. ha->addr)) {
  991. found = true;
  992. break;
  993. }
  994. }
  995. /* MAC address of the port is not in uc list */
  996. if (ether_addr_equal_64bits(entry->mac,
  997. priv->current_mac))
  998. found = true;
  999. if (!found) {
  1000. mac = mlx4_mac_to_u64(entry->mac);
  1001. mlx4_en_uc_steer_release(priv, entry->mac,
  1002. priv->base_qpn,
  1003. entry->reg_id);
  1004. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  1005. hlist_del_rcu(&entry->hlist);
  1006. kfree_rcu(entry, rcu);
  1007. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  1008. entry->mac, priv->port);
  1009. ++removed;
  1010. }
  1011. }
  1012. }
  1013. /* if we didn't remove anything, there is no use in trying to add
  1014. * again once we are in a forced promisc mode state
  1015. */
  1016. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  1017. return;
  1018. prev_flags = priv->flags;
  1019. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  1020. /* find what to add */
  1021. netdev_for_each_uc_addr(ha, dev) {
  1022. found = false;
  1023. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  1024. hlist_for_each_entry(entry, bucket, hlist) {
  1025. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  1026. found = true;
  1027. break;
  1028. }
  1029. }
  1030. if (!found) {
  1031. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1032. if (!entry) {
  1033. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  1034. ha->addr, priv->port);
  1035. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1036. break;
  1037. }
  1038. mac = mlx4_mac_to_u64(ha->addr);
  1039. memcpy(entry->mac, ha->addr, ETH_ALEN);
  1040. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  1041. if (err < 0) {
  1042. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  1043. ha->addr, priv->port, err);
  1044. kfree(entry);
  1045. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1046. break;
  1047. }
  1048. err = mlx4_en_uc_steer_add(priv, ha->addr,
  1049. &priv->base_qpn,
  1050. &entry->reg_id);
  1051. if (err) {
  1052. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  1053. ha->addr, priv->port, err);
  1054. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  1055. kfree(entry);
  1056. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1057. break;
  1058. } else {
  1059. unsigned int mac_hash;
  1060. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  1061. ha->addr, priv->port);
  1062. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  1063. bucket = &priv->mac_hash[mac_hash];
  1064. hlist_add_head_rcu(&entry->hlist, bucket);
  1065. }
  1066. }
  1067. }
  1068. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1069. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1070. priv->port);
  1071. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1072. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1073. priv->port);
  1074. }
  1075. }
  1076. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1077. {
  1078. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1079. rx_mode_task);
  1080. struct mlx4_en_dev *mdev = priv->mdev;
  1081. struct net_device *dev = priv->dev;
  1082. mutex_lock(&mdev->state_lock);
  1083. if (!mdev->device_up) {
  1084. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1085. goto out;
  1086. }
  1087. if (!priv->port_up) {
  1088. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1089. goto out;
  1090. }
  1091. if (!netif_carrier_ok(dev)) {
  1092. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1093. if (priv->port_state.link_state) {
  1094. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1095. netif_carrier_on(dev);
  1096. en_dbg(LINK, priv, "Link Up\n");
  1097. }
  1098. }
  1099. }
  1100. if (dev->priv_flags & IFF_UNICAST_FLT)
  1101. mlx4_en_do_uc_filter(priv, dev, mdev);
  1102. /* Promsicuous mode: disable all filters */
  1103. if ((dev->flags & IFF_PROMISC) ||
  1104. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1105. mlx4_en_set_promisc_mode(priv, mdev);
  1106. goto out;
  1107. }
  1108. /* Not in promiscuous mode */
  1109. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1110. mlx4_en_clear_promisc_mode(priv, mdev);
  1111. mlx4_en_do_multicast(priv, dev, mdev);
  1112. out:
  1113. mutex_unlock(&mdev->state_lock);
  1114. }
  1115. static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
  1116. {
  1117. u64 reg_id;
  1118. int err = 0;
  1119. int *qpn = &priv->base_qpn;
  1120. struct mlx4_mac_entry *entry;
  1121. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  1122. if (err)
  1123. return err;
  1124. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  1125. &priv->tunnel_reg_id);
  1126. if (err)
  1127. goto tunnel_err;
  1128. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1129. if (!entry) {
  1130. err = -ENOMEM;
  1131. goto alloc_err;
  1132. }
  1133. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  1134. memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
  1135. entry->reg_id = reg_id;
  1136. hlist_add_head_rcu(&entry->hlist,
  1137. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  1138. return 0;
  1139. alloc_err:
  1140. if (priv->tunnel_reg_id)
  1141. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1142. tunnel_err:
  1143. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  1144. return err;
  1145. }
  1146. static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
  1147. {
  1148. u64 mac;
  1149. unsigned int i;
  1150. int qpn = priv->base_qpn;
  1151. struct hlist_head *bucket;
  1152. struct hlist_node *tmp;
  1153. struct mlx4_mac_entry *entry;
  1154. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  1155. bucket = &priv->mac_hash[i];
  1156. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  1157. mac = mlx4_mac_to_u64(entry->mac);
  1158. en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
  1159. entry->mac);
  1160. mlx4_en_uc_steer_release(priv, entry->mac,
  1161. qpn, entry->reg_id);
  1162. mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
  1163. hlist_del_rcu(&entry->hlist);
  1164. kfree_rcu(entry, rcu);
  1165. }
  1166. }
  1167. if (priv->tunnel_reg_id) {
  1168. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1169. priv->tunnel_reg_id = 0;
  1170. }
  1171. }
  1172. static void mlx4_en_tx_timeout(struct net_device *dev)
  1173. {
  1174. struct mlx4_en_priv *priv = netdev_priv(dev);
  1175. struct mlx4_en_dev *mdev = priv->mdev;
  1176. int i;
  1177. if (netif_msg_timer(priv))
  1178. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1179. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1180. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i];
  1181. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1182. continue;
  1183. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1184. i, tx_ring->qpn, tx_ring->sp_cqn,
  1185. tx_ring->cons, tx_ring->prod);
  1186. }
  1187. priv->port_stats.tx_timeout++;
  1188. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1189. queue_work(mdev->workqueue, &priv->watchdog_task);
  1190. }
  1191. static void
  1192. mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
  1193. {
  1194. struct mlx4_en_priv *priv = netdev_priv(dev);
  1195. spin_lock_bh(&priv->stats_lock);
  1196. mlx4_en_fold_software_stats(dev);
  1197. netdev_stats_to_stats64(stats, &dev->stats);
  1198. spin_unlock_bh(&priv->stats_lock);
  1199. }
  1200. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1201. {
  1202. struct mlx4_en_cq *cq;
  1203. int i, t;
  1204. /* If we haven't received a specific coalescing setting
  1205. * (module param), we set the moderation parameters as follows:
  1206. * - moder_cnt is set to the number of mtu sized packets to
  1207. * satisfy our coalescing target.
  1208. * - moder_time is set to a fixed value.
  1209. */
  1210. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1211. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1212. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1213. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1214. en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1215. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1216. /* Setup cq moderation params */
  1217. for (i = 0; i < priv->rx_ring_num; i++) {
  1218. cq = priv->rx_cq[i];
  1219. cq->moder_cnt = priv->rx_frames;
  1220. cq->moder_time = priv->rx_usecs;
  1221. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1222. priv->last_moder_packets[i] = 0;
  1223. priv->last_moder_bytes[i] = 0;
  1224. }
  1225. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1226. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1227. cq = priv->tx_cq[t][i];
  1228. cq->moder_cnt = priv->tx_frames;
  1229. cq->moder_time = priv->tx_usecs;
  1230. }
  1231. }
  1232. /* Reset auto-moderation params */
  1233. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1234. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1235. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1236. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1237. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1238. priv->adaptive_rx_coal = 1;
  1239. priv->last_moder_jiffies = 0;
  1240. priv->last_moder_tx_packets = 0;
  1241. }
  1242. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1243. {
  1244. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1245. u32 pkt_rate_high, pkt_rate_low;
  1246. struct mlx4_en_cq *cq;
  1247. unsigned long packets;
  1248. unsigned long rate;
  1249. unsigned long avg_pkt_size;
  1250. unsigned long rx_packets;
  1251. unsigned long rx_bytes;
  1252. unsigned long rx_pkt_diff;
  1253. int moder_time;
  1254. int ring, err;
  1255. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1256. return;
  1257. pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
  1258. pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
  1259. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1260. rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
  1261. rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
  1262. rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
  1263. packets = rx_pkt_diff;
  1264. rate = packets * HZ / period;
  1265. avg_pkt_size = packets ? (rx_bytes -
  1266. priv->last_moder_bytes[ring]) / packets : 0;
  1267. /* Apply auto-moderation only when packet rate
  1268. * exceeds a rate that it matters */
  1269. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1270. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1271. if (rate <= pkt_rate_low)
  1272. moder_time = priv->rx_usecs_low;
  1273. else if (rate >= pkt_rate_high)
  1274. moder_time = priv->rx_usecs_high;
  1275. else
  1276. moder_time = (rate - pkt_rate_low) *
  1277. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1278. (pkt_rate_high - pkt_rate_low) +
  1279. priv->rx_usecs_low;
  1280. } else {
  1281. moder_time = priv->rx_usecs_low;
  1282. }
  1283. cq = priv->rx_cq[ring];
  1284. if (moder_time != priv->last_moder_time[ring] ||
  1285. cq->moder_cnt != priv->rx_frames) {
  1286. priv->last_moder_time[ring] = moder_time;
  1287. cq->moder_time = moder_time;
  1288. cq->moder_cnt = priv->rx_frames;
  1289. err = mlx4_en_set_cq_moder(priv, cq);
  1290. if (err)
  1291. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1292. ring);
  1293. }
  1294. priv->last_moder_packets[ring] = rx_packets;
  1295. priv->last_moder_bytes[ring] = rx_bytes;
  1296. }
  1297. priv->last_moder_jiffies = jiffies;
  1298. }
  1299. static void mlx4_en_do_get_stats(struct work_struct *work)
  1300. {
  1301. struct delayed_work *delay = to_delayed_work(work);
  1302. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1303. stats_task);
  1304. struct mlx4_en_dev *mdev = priv->mdev;
  1305. int err;
  1306. mutex_lock(&mdev->state_lock);
  1307. if (mdev->device_up) {
  1308. if (priv->port_up) {
  1309. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1310. if (err)
  1311. en_dbg(HW, priv, "Could not update stats\n");
  1312. mlx4_en_auto_moderation(priv);
  1313. }
  1314. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1315. }
  1316. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1317. mlx4_en_do_set_mac(priv, priv->current_mac);
  1318. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1319. }
  1320. mutex_unlock(&mdev->state_lock);
  1321. }
  1322. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1323. * periodically
  1324. */
  1325. static void mlx4_en_service_task(struct work_struct *work)
  1326. {
  1327. struct delayed_work *delay = to_delayed_work(work);
  1328. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1329. service_task);
  1330. struct mlx4_en_dev *mdev = priv->mdev;
  1331. mutex_lock(&mdev->state_lock);
  1332. if (mdev->device_up) {
  1333. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1334. mlx4_en_ptp_overflow_check(mdev);
  1335. mlx4_en_recover_from_oom(priv);
  1336. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1337. SERVICE_TASK_DELAY);
  1338. }
  1339. mutex_unlock(&mdev->state_lock);
  1340. }
  1341. static void mlx4_en_linkstate(struct work_struct *work)
  1342. {
  1343. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1344. linkstate_task);
  1345. struct mlx4_en_dev *mdev = priv->mdev;
  1346. int linkstate = priv->link_state;
  1347. mutex_lock(&mdev->state_lock);
  1348. /* If observable port state changed set carrier state and
  1349. * report to system log */
  1350. if (priv->last_link_state != linkstate) {
  1351. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1352. en_info(priv, "Link Down\n");
  1353. netif_carrier_off(priv->dev);
  1354. } else {
  1355. en_info(priv, "Link Up\n");
  1356. netif_carrier_on(priv->dev);
  1357. }
  1358. }
  1359. priv->last_link_state = linkstate;
  1360. mutex_unlock(&mdev->state_lock);
  1361. }
  1362. static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1363. {
  1364. struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
  1365. int numa_node = priv->mdev->dev->numa_node;
  1366. if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
  1367. return -ENOMEM;
  1368. cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
  1369. ring->affinity_mask);
  1370. return 0;
  1371. }
  1372. static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1373. {
  1374. free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
  1375. }
  1376. static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
  1377. int tx_ring_idx)
  1378. {
  1379. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
  1380. int rr_index = tx_ring_idx;
  1381. tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
  1382. tx_ring->recycle_ring = priv->rx_ring[rr_index];
  1383. en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
  1384. TX_XDP, tx_ring_idx, rr_index);
  1385. }
  1386. int mlx4_en_start_port(struct net_device *dev)
  1387. {
  1388. struct mlx4_en_priv *priv = netdev_priv(dev);
  1389. struct mlx4_en_dev *mdev = priv->mdev;
  1390. struct mlx4_en_cq *cq;
  1391. struct mlx4_en_tx_ring *tx_ring;
  1392. int rx_index = 0;
  1393. int err = 0;
  1394. int i, t;
  1395. int j;
  1396. u8 mc_list[16] = {0};
  1397. if (priv->port_up) {
  1398. en_dbg(DRV, priv, "start port called while port already up\n");
  1399. return 0;
  1400. }
  1401. INIT_LIST_HEAD(&priv->mc_list);
  1402. INIT_LIST_HEAD(&priv->curr_list);
  1403. INIT_LIST_HEAD(&priv->ethtool_list);
  1404. memset(&priv->ethtool_rules[0], 0,
  1405. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1406. /* Calculate Rx buf size */
  1407. dev->mtu = min(dev->mtu, priv->max_mtu);
  1408. mlx4_en_calc_rx_buf(dev);
  1409. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1410. /* Configure rx cq's and rings */
  1411. err = mlx4_en_activate_rx_rings(priv);
  1412. if (err) {
  1413. en_err(priv, "Failed to activate RX rings\n");
  1414. return err;
  1415. }
  1416. for (i = 0; i < priv->rx_ring_num; i++) {
  1417. cq = priv->rx_cq[i];
  1418. err = mlx4_en_init_affinity_hint(priv, i);
  1419. if (err) {
  1420. en_err(priv, "Failed preparing IRQ affinity hint\n");
  1421. goto cq_err;
  1422. }
  1423. err = mlx4_en_activate_cq(priv, cq, i);
  1424. if (err) {
  1425. en_err(priv, "Failed activating Rx CQ\n");
  1426. mlx4_en_free_affinity_hint(priv, i);
  1427. goto cq_err;
  1428. }
  1429. for (j = 0; j < cq->size; j++) {
  1430. struct mlx4_cqe *cqe = NULL;
  1431. cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
  1432. priv->cqe_factor;
  1433. cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1434. }
  1435. err = mlx4_en_set_cq_moder(priv, cq);
  1436. if (err) {
  1437. en_err(priv, "Failed setting cq moderation parameters\n");
  1438. mlx4_en_deactivate_cq(priv, cq);
  1439. mlx4_en_free_affinity_hint(priv, i);
  1440. goto cq_err;
  1441. }
  1442. mlx4_en_arm_cq(priv, cq);
  1443. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1444. ++rx_index;
  1445. }
  1446. /* Set qp number */
  1447. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1448. err = mlx4_en_get_qp(priv);
  1449. if (err) {
  1450. en_err(priv, "Failed getting eth qp\n");
  1451. goto cq_err;
  1452. }
  1453. mdev->mac_removed[priv->port] = 0;
  1454. priv->counter_index =
  1455. mlx4_get_default_counter_index(mdev->dev, priv->port);
  1456. err = mlx4_en_config_rss_steer(priv);
  1457. if (err) {
  1458. en_err(priv, "Failed configuring rss steering\n");
  1459. goto mac_err;
  1460. }
  1461. err = mlx4_en_create_drop_qp(priv);
  1462. if (err)
  1463. goto rss_err;
  1464. /* Configure tx cq's and rings */
  1465. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1466. u8 num_tx_rings_p_up = t == TX ?
  1467. priv->num_tx_rings_p_up : priv->tx_ring_num[t];
  1468. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1469. /* Configure cq */
  1470. cq = priv->tx_cq[t][i];
  1471. err = mlx4_en_activate_cq(priv, cq, i);
  1472. if (err) {
  1473. en_err(priv, "Failed allocating Tx CQ\n");
  1474. goto tx_err;
  1475. }
  1476. err = mlx4_en_set_cq_moder(priv, cq);
  1477. if (err) {
  1478. en_err(priv, "Failed setting cq moderation parameters\n");
  1479. mlx4_en_deactivate_cq(priv, cq);
  1480. goto tx_err;
  1481. }
  1482. en_dbg(DRV, priv,
  1483. "Resetting index of collapsed CQ:%d to -1\n", i);
  1484. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1485. /* Configure ring */
  1486. tx_ring = priv->tx_ring[t][i];
  1487. err = mlx4_en_activate_tx_ring(priv, tx_ring,
  1488. cq->mcq.cqn,
  1489. i / num_tx_rings_p_up);
  1490. if (err) {
  1491. en_err(priv, "Failed allocating Tx ring\n");
  1492. mlx4_en_deactivate_cq(priv, cq);
  1493. goto tx_err;
  1494. }
  1495. if (t != TX_XDP) {
  1496. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1497. tx_ring->recycle_ring = NULL;
  1498. /* Arm CQ for TX completions */
  1499. mlx4_en_arm_cq(priv, cq);
  1500. } else {
  1501. mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring);
  1502. mlx4_en_init_recycle_ring(priv, i);
  1503. /* XDP TX CQ should never be armed */
  1504. }
  1505. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1506. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1507. *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
  1508. }
  1509. }
  1510. /* Configure port */
  1511. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1512. priv->rx_skb_size + ETH_FCS_LEN,
  1513. priv->prof->tx_pause,
  1514. priv->prof->tx_ppp,
  1515. priv->prof->rx_pause,
  1516. priv->prof->rx_ppp);
  1517. if (err) {
  1518. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1519. priv->port, err);
  1520. goto tx_err;
  1521. }
  1522. err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
  1523. if (err) {
  1524. en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
  1525. dev->mtu, priv->port, err);
  1526. goto tx_err;
  1527. }
  1528. /* Set default qp number */
  1529. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1530. if (err) {
  1531. en_err(priv, "Failed setting default qp numbers\n");
  1532. goto tx_err;
  1533. }
  1534. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1535. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  1536. if (err) {
  1537. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1538. err);
  1539. goto tx_err;
  1540. }
  1541. }
  1542. /* Init port */
  1543. en_dbg(HW, priv, "Initializing port\n");
  1544. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1545. if (err) {
  1546. en_err(priv, "Failed Initializing port\n");
  1547. goto tx_err;
  1548. }
  1549. /* Set Unicast and VXLAN steering rules */
  1550. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
  1551. mlx4_en_set_rss_steer_rules(priv))
  1552. mlx4_warn(mdev, "Failed setting steering rules\n");
  1553. /* Attach rx QP to bradcast address */
  1554. eth_broadcast_addr(&mc_list[10]);
  1555. mc_list[5] = priv->port; /* needed for B0 steering support */
  1556. if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,
  1557. priv->port, 0, MLX4_PROT_ETH,
  1558. &priv->broadcast_id))
  1559. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1560. /* Must redo promiscuous mode setup. */
  1561. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1562. /* Schedule multicast task to populate multicast list */
  1563. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1564. if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1565. udp_tunnel_get_rx_info(dev);
  1566. priv->port_up = true;
  1567. /* Process all completions if exist to prevent
  1568. * the queues freezing if they are full
  1569. */
  1570. for (i = 0; i < priv->rx_ring_num; i++) {
  1571. local_bh_disable();
  1572. napi_schedule(&priv->rx_cq[i]->napi);
  1573. local_bh_enable();
  1574. }
  1575. netif_tx_start_all_queues(dev);
  1576. netif_device_attach(dev);
  1577. return 0;
  1578. tx_err:
  1579. if (t == MLX4_EN_NUM_TX_TYPES) {
  1580. t--;
  1581. i = priv->tx_ring_num[t];
  1582. }
  1583. while (t >= 0) {
  1584. while (i--) {
  1585. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1586. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1587. }
  1588. if (!t--)
  1589. break;
  1590. i = priv->tx_ring_num[t];
  1591. }
  1592. mlx4_en_destroy_drop_qp(priv);
  1593. rss_err:
  1594. mlx4_en_release_rss_steer(priv);
  1595. mac_err:
  1596. mlx4_en_put_qp(priv);
  1597. cq_err:
  1598. while (rx_index--) {
  1599. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1600. mlx4_en_free_affinity_hint(priv, rx_index);
  1601. }
  1602. for (i = 0; i < priv->rx_ring_num; i++)
  1603. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1604. return err; /* need to close devices */
  1605. }
  1606. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1607. {
  1608. struct mlx4_en_priv *priv = netdev_priv(dev);
  1609. struct mlx4_en_dev *mdev = priv->mdev;
  1610. struct mlx4_en_mc_list *mclist, *tmp;
  1611. struct ethtool_flow_id *flow, *tmp_flow;
  1612. int i, t;
  1613. u8 mc_list[16] = {0};
  1614. if (!priv->port_up) {
  1615. en_dbg(DRV, priv, "stop port called while port already down\n");
  1616. return;
  1617. }
  1618. /* close port*/
  1619. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1620. /* Synchronize with tx routine */
  1621. netif_tx_lock_bh(dev);
  1622. if (detach)
  1623. netif_device_detach(dev);
  1624. netif_tx_stop_all_queues(dev);
  1625. netif_tx_unlock_bh(dev);
  1626. netif_tx_disable(dev);
  1627. spin_lock_bh(&priv->stats_lock);
  1628. mlx4_en_fold_software_stats(dev);
  1629. /* Set port as not active */
  1630. priv->port_up = false;
  1631. spin_unlock_bh(&priv->stats_lock);
  1632. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  1633. /* Promsicuous mode */
  1634. if (mdev->dev->caps.steering_mode ==
  1635. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1636. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1637. MLX4_EN_FLAG_MC_PROMISC);
  1638. mlx4_flow_steer_promisc_remove(mdev->dev,
  1639. priv->port,
  1640. MLX4_FS_ALL_DEFAULT);
  1641. mlx4_flow_steer_promisc_remove(mdev->dev,
  1642. priv->port,
  1643. MLX4_FS_MC_DEFAULT);
  1644. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1645. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1646. /* Disable promiscouos mode */
  1647. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1648. priv->port);
  1649. /* Disable Multicast promisc */
  1650. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1651. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1652. priv->port);
  1653. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1654. }
  1655. }
  1656. /* Detach All multicasts */
  1657. eth_broadcast_addr(&mc_list[10]);
  1658. mc_list[5] = priv->port; /* needed for B0 steering support */
  1659. mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,
  1660. MLX4_PROT_ETH, priv->broadcast_id);
  1661. list_for_each_entry(mclist, &priv->curr_list, list) {
  1662. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1663. mc_list[5] = priv->port;
  1664. mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,
  1665. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1666. if (mclist->tunnel_reg_id)
  1667. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1668. }
  1669. mlx4_en_clear_list(dev);
  1670. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1671. list_del(&mclist->list);
  1672. kfree(mclist);
  1673. }
  1674. /* Flush multicast filter */
  1675. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1676. /* Remove flow steering rules for the port*/
  1677. if (mdev->dev->caps.steering_mode ==
  1678. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1679. ASSERT_RTNL();
  1680. list_for_each_entry_safe(flow, tmp_flow,
  1681. &priv->ethtool_list, list) {
  1682. mlx4_flow_detach(mdev->dev, flow->id);
  1683. list_del(&flow->list);
  1684. }
  1685. }
  1686. mlx4_en_destroy_drop_qp(priv);
  1687. /* Free TX Rings */
  1688. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1689. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1690. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1691. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1692. }
  1693. }
  1694. msleep(10);
  1695. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
  1696. for (i = 0; i < priv->tx_ring_num[t]; i++)
  1697. mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
  1698. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1699. mlx4_en_delete_rss_steer_rules(priv);
  1700. /* Free RSS qps */
  1701. mlx4_en_release_rss_steer(priv);
  1702. /* Unregister Mac address for the port */
  1703. mlx4_en_put_qp(priv);
  1704. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1705. mdev->mac_removed[priv->port] = 1;
  1706. /* Free RX Rings */
  1707. for (i = 0; i < priv->rx_ring_num; i++) {
  1708. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1709. napi_synchronize(&cq->napi);
  1710. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1711. mlx4_en_deactivate_cq(priv, cq);
  1712. mlx4_en_free_affinity_hint(priv, i);
  1713. }
  1714. }
  1715. static void mlx4_en_restart(struct work_struct *work)
  1716. {
  1717. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1718. watchdog_task);
  1719. struct mlx4_en_dev *mdev = priv->mdev;
  1720. struct net_device *dev = priv->dev;
  1721. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1722. rtnl_lock();
  1723. mutex_lock(&mdev->state_lock);
  1724. if (priv->port_up) {
  1725. mlx4_en_stop_port(dev, 1);
  1726. if (mlx4_en_start_port(dev))
  1727. en_err(priv, "Failed restarting port %d\n", priv->port);
  1728. }
  1729. mutex_unlock(&mdev->state_lock);
  1730. rtnl_unlock();
  1731. }
  1732. static void mlx4_en_clear_stats(struct net_device *dev)
  1733. {
  1734. struct mlx4_en_priv *priv = netdev_priv(dev);
  1735. struct mlx4_en_dev *mdev = priv->mdev;
  1736. struct mlx4_en_tx_ring **tx_ring;
  1737. int i;
  1738. if (!mlx4_is_slave(mdev->dev))
  1739. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1740. en_dbg(HW, priv, "Failed dumping statistics\n");
  1741. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1742. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1743. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1744. memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
  1745. memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
  1746. memset(&priv->rx_priority_flowstats, 0,
  1747. sizeof(priv->rx_priority_flowstats));
  1748. memset(&priv->tx_priority_flowstats, 0,
  1749. sizeof(priv->tx_priority_flowstats));
  1750. memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
  1751. tx_ring = priv->tx_ring[TX];
  1752. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1753. tx_ring[i]->bytes = 0;
  1754. tx_ring[i]->packets = 0;
  1755. tx_ring[i]->tx_csum = 0;
  1756. tx_ring[i]->tx_dropped = 0;
  1757. tx_ring[i]->queue_stopped = 0;
  1758. tx_ring[i]->wake_queue = 0;
  1759. tx_ring[i]->tso_packets = 0;
  1760. tx_ring[i]->xmit_more = 0;
  1761. }
  1762. for (i = 0; i < priv->rx_ring_num; i++) {
  1763. priv->rx_ring[i]->bytes = 0;
  1764. priv->rx_ring[i]->packets = 0;
  1765. priv->rx_ring[i]->csum_ok = 0;
  1766. priv->rx_ring[i]->csum_none = 0;
  1767. priv->rx_ring[i]->csum_complete = 0;
  1768. }
  1769. }
  1770. static int mlx4_en_open(struct net_device *dev)
  1771. {
  1772. struct mlx4_en_priv *priv = netdev_priv(dev);
  1773. struct mlx4_en_dev *mdev = priv->mdev;
  1774. int err = 0;
  1775. mutex_lock(&mdev->state_lock);
  1776. if (!mdev->device_up) {
  1777. en_err(priv, "Cannot open - device down/disabled\n");
  1778. err = -EBUSY;
  1779. goto out;
  1780. }
  1781. /* Reset HW statistics and SW counters */
  1782. mlx4_en_clear_stats(dev);
  1783. err = mlx4_en_start_port(dev);
  1784. if (err)
  1785. en_err(priv, "Failed starting port:%d\n", priv->port);
  1786. out:
  1787. mutex_unlock(&mdev->state_lock);
  1788. return err;
  1789. }
  1790. static int mlx4_en_close(struct net_device *dev)
  1791. {
  1792. struct mlx4_en_priv *priv = netdev_priv(dev);
  1793. struct mlx4_en_dev *mdev = priv->mdev;
  1794. en_dbg(IFDOWN, priv, "Close port called\n");
  1795. mutex_lock(&mdev->state_lock);
  1796. mlx4_en_stop_port(dev, 0);
  1797. netif_carrier_off(dev);
  1798. mutex_unlock(&mdev->state_lock);
  1799. return 0;
  1800. }
  1801. static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1802. {
  1803. int i, t;
  1804. #ifdef CONFIG_RFS_ACCEL
  1805. priv->dev->rx_cpu_rmap = NULL;
  1806. #endif
  1807. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1808. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1809. if (priv->tx_ring[t] && priv->tx_ring[t][i])
  1810. mlx4_en_destroy_tx_ring(priv,
  1811. &priv->tx_ring[t][i]);
  1812. if (priv->tx_cq[t] && priv->tx_cq[t][i])
  1813. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1814. }
  1815. kfree(priv->tx_ring[t]);
  1816. kfree(priv->tx_cq[t]);
  1817. }
  1818. for (i = 0; i < priv->rx_ring_num; i++) {
  1819. if (priv->rx_ring[i])
  1820. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1821. priv->prof->rx_ring_size, priv->stride);
  1822. if (priv->rx_cq[i])
  1823. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1824. }
  1825. }
  1826. static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1827. {
  1828. struct mlx4_en_port_profile *prof = priv->prof;
  1829. int i, t;
  1830. int node;
  1831. /* Create tx Rings */
  1832. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1833. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1834. node = cpu_to_node(i % num_online_cpus());
  1835. if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
  1836. prof->tx_ring_size, i, t, node))
  1837. goto err;
  1838. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
  1839. prof->tx_ring_size,
  1840. TXBB_SIZE, node, i))
  1841. goto err;
  1842. }
  1843. }
  1844. /* Create rx Rings */
  1845. for (i = 0; i < priv->rx_ring_num; i++) {
  1846. node = cpu_to_node(i % num_online_cpus());
  1847. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1848. prof->rx_ring_size, i, RX, node))
  1849. goto err;
  1850. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1851. prof->rx_ring_size, priv->stride,
  1852. node, i))
  1853. goto err;
  1854. }
  1855. #ifdef CONFIG_RFS_ACCEL
  1856. priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
  1857. #endif
  1858. return 0;
  1859. err:
  1860. en_err(priv, "Failed to allocate NIC resources\n");
  1861. for (i = 0; i < priv->rx_ring_num; i++) {
  1862. if (priv->rx_ring[i])
  1863. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1864. prof->rx_ring_size,
  1865. priv->stride);
  1866. if (priv->rx_cq[i])
  1867. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1868. }
  1869. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1870. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1871. if (priv->tx_ring[t][i])
  1872. mlx4_en_destroy_tx_ring(priv,
  1873. &priv->tx_ring[t][i]);
  1874. if (priv->tx_cq[t][i])
  1875. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1876. }
  1877. }
  1878. return -ENOMEM;
  1879. }
  1880. static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
  1881. struct mlx4_en_priv *src,
  1882. struct mlx4_en_port_profile *prof)
  1883. {
  1884. int t;
  1885. memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
  1886. sizeof(dst->hwtstamp_config));
  1887. dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;
  1888. dst->rx_ring_num = prof->rx_ring_num;
  1889. dst->flags = prof->flags;
  1890. dst->mdev = src->mdev;
  1891. dst->port = src->port;
  1892. dst->dev = src->dev;
  1893. dst->prof = prof;
  1894. dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1895. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1896. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1897. dst->tx_ring_num[t] = prof->tx_ring_num[t];
  1898. if (!dst->tx_ring_num[t])
  1899. continue;
  1900. dst->tx_ring[t] = kcalloc(MAX_TX_RINGS,
  1901. sizeof(struct mlx4_en_tx_ring *),
  1902. GFP_KERNEL);
  1903. if (!dst->tx_ring[t])
  1904. goto err_free_tx;
  1905. dst->tx_cq[t] = kcalloc(MAX_TX_RINGS,
  1906. sizeof(struct mlx4_en_cq *),
  1907. GFP_KERNEL);
  1908. if (!dst->tx_cq[t]) {
  1909. kfree(dst->tx_ring[t]);
  1910. goto err_free_tx;
  1911. }
  1912. }
  1913. return 0;
  1914. err_free_tx:
  1915. while (t--) {
  1916. kfree(dst->tx_ring[t]);
  1917. kfree(dst->tx_cq[t]);
  1918. }
  1919. return -ENOMEM;
  1920. }
  1921. static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
  1922. struct mlx4_en_priv *src)
  1923. {
  1924. int t;
  1925. memcpy(dst->rx_ring, src->rx_ring,
  1926. sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
  1927. memcpy(dst->rx_cq, src->rx_cq,
  1928. sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
  1929. memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
  1930. sizeof(dst->hwtstamp_config));
  1931. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1932. dst->tx_ring_num[t] = src->tx_ring_num[t];
  1933. dst->tx_ring[t] = src->tx_ring[t];
  1934. dst->tx_cq[t] = src->tx_cq[t];
  1935. }
  1936. dst->num_tx_rings_p_up = src->num_tx_rings_p_up;
  1937. dst->rx_ring_num = src->rx_ring_num;
  1938. memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
  1939. }
  1940. int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
  1941. struct mlx4_en_priv *tmp,
  1942. struct mlx4_en_port_profile *prof,
  1943. bool carry_xdp_prog)
  1944. {
  1945. struct bpf_prog *xdp_prog;
  1946. int i, t;
  1947. mlx4_en_copy_priv(tmp, priv, prof);
  1948. if (mlx4_en_alloc_resources(tmp)) {
  1949. en_warn(priv,
  1950. "%s: Resource allocation failed, using previous configuration\n",
  1951. __func__);
  1952. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1953. kfree(tmp->tx_ring[t]);
  1954. kfree(tmp->tx_cq[t]);
  1955. }
  1956. return -ENOMEM;
  1957. }
  1958. /* All rx_rings has the same xdp_prog. Pick the first one. */
  1959. xdp_prog = rcu_dereference_protected(
  1960. priv->rx_ring[0]->xdp_prog,
  1961. lockdep_is_held(&priv->mdev->state_lock));
  1962. if (xdp_prog && carry_xdp_prog) {
  1963. xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num);
  1964. if (IS_ERR(xdp_prog)) {
  1965. mlx4_en_free_resources(tmp);
  1966. return PTR_ERR(xdp_prog);
  1967. }
  1968. for (i = 0; i < tmp->rx_ring_num; i++)
  1969. rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
  1970. xdp_prog);
  1971. }
  1972. return 0;
  1973. }
  1974. void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
  1975. struct mlx4_en_priv *tmp)
  1976. {
  1977. mlx4_en_free_resources(priv);
  1978. mlx4_en_update_priv(priv, tmp);
  1979. }
  1980. void mlx4_en_destroy_netdev(struct net_device *dev)
  1981. {
  1982. struct mlx4_en_priv *priv = netdev_priv(dev);
  1983. struct mlx4_en_dev *mdev = priv->mdev;
  1984. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1985. /* Unregister device - this will close the port if it was up */
  1986. if (priv->registered) {
  1987. devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
  1988. priv->port));
  1989. unregister_netdev(dev);
  1990. }
  1991. if (priv->allocated)
  1992. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1993. cancel_delayed_work(&priv->stats_task);
  1994. cancel_delayed_work(&priv->service_task);
  1995. /* flush any pending task for this netdev */
  1996. flush_workqueue(mdev->workqueue);
  1997. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1998. mlx4_en_remove_timestamp(mdev);
  1999. /* Detach the netdev so tasks would not attempt to access it */
  2000. mutex_lock(&mdev->state_lock);
  2001. mdev->pndev[priv->port] = NULL;
  2002. mdev->upper[priv->port] = NULL;
  2003. #ifdef CONFIG_RFS_ACCEL
  2004. mlx4_en_cleanup_filters(priv);
  2005. #endif
  2006. mlx4_en_free_resources(priv);
  2007. mutex_unlock(&mdev->state_lock);
  2008. free_netdev(dev);
  2009. }
  2010. static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
  2011. {
  2012. struct mlx4_en_priv *priv = netdev_priv(dev);
  2013. if (mtu > MLX4_EN_MAX_XDP_MTU) {
  2014. en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
  2015. mtu, MLX4_EN_MAX_XDP_MTU);
  2016. return false;
  2017. }
  2018. return true;
  2019. }
  2020. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  2021. {
  2022. struct mlx4_en_priv *priv = netdev_priv(dev);
  2023. struct mlx4_en_dev *mdev = priv->mdev;
  2024. int err = 0;
  2025. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  2026. dev->mtu, new_mtu);
  2027. if (priv->tx_ring_num[TX_XDP] &&
  2028. !mlx4_en_check_xdp_mtu(dev, new_mtu))
  2029. return -EOPNOTSUPP;
  2030. dev->mtu = new_mtu;
  2031. if (netif_running(dev)) {
  2032. mutex_lock(&mdev->state_lock);
  2033. if (!mdev->device_up) {
  2034. /* NIC is probably restarting - let watchdog task reset
  2035. * the port */
  2036. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  2037. } else {
  2038. mlx4_en_stop_port(dev, 1);
  2039. err = mlx4_en_start_port(dev);
  2040. if (err) {
  2041. en_err(priv, "Failed restarting port:%d\n",
  2042. priv->port);
  2043. queue_work(mdev->workqueue, &priv->watchdog_task);
  2044. }
  2045. }
  2046. mutex_unlock(&mdev->state_lock);
  2047. }
  2048. return 0;
  2049. }
  2050. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  2051. {
  2052. struct mlx4_en_priv *priv = netdev_priv(dev);
  2053. struct mlx4_en_dev *mdev = priv->mdev;
  2054. struct hwtstamp_config config;
  2055. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  2056. return -EFAULT;
  2057. /* reserved for future extensions */
  2058. if (config.flags)
  2059. return -EINVAL;
  2060. /* device doesn't support time stamping */
  2061. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  2062. return -EINVAL;
  2063. /* TX HW timestamp */
  2064. switch (config.tx_type) {
  2065. case HWTSTAMP_TX_OFF:
  2066. case HWTSTAMP_TX_ON:
  2067. break;
  2068. default:
  2069. return -ERANGE;
  2070. }
  2071. /* RX HW timestamp */
  2072. switch (config.rx_filter) {
  2073. case HWTSTAMP_FILTER_NONE:
  2074. break;
  2075. case HWTSTAMP_FILTER_ALL:
  2076. case HWTSTAMP_FILTER_SOME:
  2077. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  2078. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  2079. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  2080. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  2081. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  2082. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  2083. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  2084. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  2085. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  2086. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  2087. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  2088. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  2089. case HWTSTAMP_FILTER_NTP_ALL:
  2090. config.rx_filter = HWTSTAMP_FILTER_ALL;
  2091. break;
  2092. default:
  2093. return -ERANGE;
  2094. }
  2095. if (mlx4_en_reset_config(dev, config, dev->features)) {
  2096. config.tx_type = HWTSTAMP_TX_OFF;
  2097. config.rx_filter = HWTSTAMP_FILTER_NONE;
  2098. }
  2099. return copy_to_user(ifr->ifr_data, &config,
  2100. sizeof(config)) ? -EFAULT : 0;
  2101. }
  2102. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  2103. {
  2104. struct mlx4_en_priv *priv = netdev_priv(dev);
  2105. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  2106. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  2107. }
  2108. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  2109. {
  2110. switch (cmd) {
  2111. case SIOCSHWTSTAMP:
  2112. return mlx4_en_hwtstamp_set(dev, ifr);
  2113. case SIOCGHWTSTAMP:
  2114. return mlx4_en_hwtstamp_get(dev, ifr);
  2115. default:
  2116. return -EOPNOTSUPP;
  2117. }
  2118. }
  2119. static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
  2120. netdev_features_t features)
  2121. {
  2122. struct mlx4_en_priv *en_priv = netdev_priv(netdev);
  2123. struct mlx4_en_dev *mdev = en_priv->mdev;
  2124. /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
  2125. * enable/disable make sure S-TAG flag is always in same state as
  2126. * C-TAG.
  2127. */
  2128. if (features & NETIF_F_HW_VLAN_CTAG_RX &&
  2129. !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2130. features |= NETIF_F_HW_VLAN_STAG_RX;
  2131. else
  2132. features &= ~NETIF_F_HW_VLAN_STAG_RX;
  2133. return features;
  2134. }
  2135. static int mlx4_en_set_features(struct net_device *netdev,
  2136. netdev_features_t features)
  2137. {
  2138. struct mlx4_en_priv *priv = netdev_priv(netdev);
  2139. bool reset = false;
  2140. int ret = 0;
  2141. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
  2142. en_info(priv, "Turn %s RX-FCS\n",
  2143. (features & NETIF_F_RXFCS) ? "ON" : "OFF");
  2144. reset = true;
  2145. }
  2146. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
  2147. u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
  2148. en_info(priv, "Turn %s RX-ALL\n",
  2149. ignore_fcs_value ? "ON" : "OFF");
  2150. ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
  2151. priv->port, ignore_fcs_value);
  2152. if (ret)
  2153. return ret;
  2154. }
  2155. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  2156. en_info(priv, "Turn %s RX vlan strip offload\n",
  2157. (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
  2158. reset = true;
  2159. }
  2160. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
  2161. en_info(priv, "Turn %s TX vlan strip offload\n",
  2162. (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
  2163. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
  2164. en_info(priv, "Turn %s TX S-VLAN strip offload\n",
  2165. (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
  2166. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
  2167. en_info(priv, "Turn %s loopback\n",
  2168. (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
  2169. mlx4_en_update_loopback_state(netdev, features);
  2170. }
  2171. if (reset) {
  2172. ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
  2173. features);
  2174. if (ret)
  2175. return ret;
  2176. }
  2177. return 0;
  2178. }
  2179. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  2180. {
  2181. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2182. struct mlx4_en_dev *mdev = en_priv->mdev;
  2183. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
  2184. }
  2185. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
  2186. __be16 vlan_proto)
  2187. {
  2188. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2189. struct mlx4_en_dev *mdev = en_priv->mdev;
  2190. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
  2191. vlan_proto);
  2192. }
  2193. static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
  2194. int max_tx_rate)
  2195. {
  2196. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2197. struct mlx4_en_dev *mdev = en_priv->mdev;
  2198. return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
  2199. max_tx_rate);
  2200. }
  2201. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  2202. {
  2203. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2204. struct mlx4_en_dev *mdev = en_priv->mdev;
  2205. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  2206. }
  2207. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  2208. {
  2209. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2210. struct mlx4_en_dev *mdev = en_priv->mdev;
  2211. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  2212. }
  2213. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  2214. {
  2215. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2216. struct mlx4_en_dev *mdev = en_priv->mdev;
  2217. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  2218. }
  2219. static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
  2220. struct ifla_vf_stats *vf_stats)
  2221. {
  2222. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2223. struct mlx4_en_dev *mdev = en_priv->mdev;
  2224. return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
  2225. }
  2226. #define PORT_ID_BYTE_LEN 8
  2227. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  2228. struct netdev_phys_item_id *ppid)
  2229. {
  2230. struct mlx4_en_priv *priv = netdev_priv(dev);
  2231. struct mlx4_dev *mdev = priv->mdev->dev;
  2232. int i;
  2233. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  2234. if (!phys_port_id)
  2235. return -EOPNOTSUPP;
  2236. ppid->id_len = sizeof(phys_port_id);
  2237. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  2238. ppid->id[i] = phys_port_id & 0xff;
  2239. phys_port_id >>= 8;
  2240. }
  2241. return 0;
  2242. }
  2243. static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
  2244. {
  2245. int ret;
  2246. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2247. vxlan_add_task);
  2248. ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
  2249. if (ret)
  2250. goto out;
  2251. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2252. VXLAN_STEER_BY_OUTER_MAC, 1);
  2253. out:
  2254. if (ret) {
  2255. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2256. return;
  2257. }
  2258. /* set offloads */
  2259. priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2260. NETIF_F_RXCSUM |
  2261. NETIF_F_TSO | NETIF_F_TSO6 |
  2262. NETIF_F_GSO_UDP_TUNNEL |
  2263. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2264. NETIF_F_GSO_PARTIAL;
  2265. }
  2266. static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
  2267. {
  2268. int ret;
  2269. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2270. vxlan_del_task);
  2271. /* unset offloads */
  2272. priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2273. NETIF_F_RXCSUM |
  2274. NETIF_F_TSO | NETIF_F_TSO6 |
  2275. NETIF_F_GSO_UDP_TUNNEL |
  2276. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2277. NETIF_F_GSO_PARTIAL);
  2278. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2279. VXLAN_STEER_BY_OUTER_MAC, 0);
  2280. if (ret)
  2281. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2282. priv->vxlan_port = 0;
  2283. }
  2284. static void mlx4_en_add_vxlan_port(struct net_device *dev,
  2285. struct udp_tunnel_info *ti)
  2286. {
  2287. struct mlx4_en_priv *priv = netdev_priv(dev);
  2288. __be16 port = ti->port;
  2289. __be16 current_port;
  2290. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2291. return;
  2292. if (ti->sa_family != AF_INET)
  2293. return;
  2294. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2295. return;
  2296. current_port = priv->vxlan_port;
  2297. if (current_port && current_port != port) {
  2298. en_warn(priv, "vxlan port %d configured, can't add port %d\n",
  2299. ntohs(current_port), ntohs(port));
  2300. return;
  2301. }
  2302. priv->vxlan_port = port;
  2303. queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
  2304. }
  2305. static void mlx4_en_del_vxlan_port(struct net_device *dev,
  2306. struct udp_tunnel_info *ti)
  2307. {
  2308. struct mlx4_en_priv *priv = netdev_priv(dev);
  2309. __be16 port = ti->port;
  2310. __be16 current_port;
  2311. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2312. return;
  2313. if (ti->sa_family != AF_INET)
  2314. return;
  2315. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2316. return;
  2317. current_port = priv->vxlan_port;
  2318. if (current_port != port) {
  2319. en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
  2320. return;
  2321. }
  2322. queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
  2323. }
  2324. static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
  2325. struct net_device *dev,
  2326. netdev_features_t features)
  2327. {
  2328. features = vlan_features_check(skb, features);
  2329. features = vxlan_features_check(skb, features);
  2330. /* The ConnectX-3 doesn't support outer IPv6 checksums but it does
  2331. * support inner IPv6 checksums and segmentation so we need to
  2332. * strip that feature if this is an IPv6 encapsulated frame.
  2333. */
  2334. if (skb->encapsulation &&
  2335. (skb->ip_summed == CHECKSUM_PARTIAL)) {
  2336. struct mlx4_en_priv *priv = netdev_priv(dev);
  2337. if (!priv->vxlan_port ||
  2338. (ip_hdr(skb)->version != 4) ||
  2339. (udp_hdr(skb)->dest != priv->vxlan_port))
  2340. features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
  2341. }
  2342. return features;
  2343. }
  2344. static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
  2345. {
  2346. struct mlx4_en_priv *priv = netdev_priv(dev);
  2347. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
  2348. struct mlx4_update_qp_params params;
  2349. int err;
  2350. if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
  2351. return -EOPNOTSUPP;
  2352. /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
  2353. if (maxrate >> 12) {
  2354. params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
  2355. params.rate_val = maxrate / 1000;
  2356. } else if (maxrate) {
  2357. params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
  2358. params.rate_val = maxrate;
  2359. } else { /* zero serves to revoke the QP rate-limitation */
  2360. params.rate_unit = 0;
  2361. params.rate_val = 0;
  2362. }
  2363. err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
  2364. &params);
  2365. return err;
  2366. }
  2367. static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
  2368. {
  2369. struct mlx4_en_priv *priv = netdev_priv(dev);
  2370. struct mlx4_en_dev *mdev = priv->mdev;
  2371. struct mlx4_en_port_profile new_prof;
  2372. struct bpf_prog *old_prog;
  2373. struct mlx4_en_priv *tmp;
  2374. int tx_changed = 0;
  2375. int xdp_ring_num;
  2376. int port_up = 0;
  2377. int err;
  2378. int i;
  2379. xdp_ring_num = prog ? priv->rx_ring_num : 0;
  2380. /* No need to reconfigure buffers when simply swapping the
  2381. * program for a new one.
  2382. */
  2383. if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
  2384. if (prog) {
  2385. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2386. if (IS_ERR(prog))
  2387. return PTR_ERR(prog);
  2388. }
  2389. mutex_lock(&mdev->state_lock);
  2390. for (i = 0; i < priv->rx_ring_num; i++) {
  2391. old_prog = rcu_dereference_protected(
  2392. priv->rx_ring[i]->xdp_prog,
  2393. lockdep_is_held(&mdev->state_lock));
  2394. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2395. if (old_prog)
  2396. bpf_prog_put(old_prog);
  2397. }
  2398. mutex_unlock(&mdev->state_lock);
  2399. return 0;
  2400. }
  2401. if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
  2402. return -EOPNOTSUPP;
  2403. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  2404. if (!tmp)
  2405. return -ENOMEM;
  2406. if (prog) {
  2407. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2408. if (IS_ERR(prog)) {
  2409. err = PTR_ERR(prog);
  2410. goto out;
  2411. }
  2412. }
  2413. mutex_lock(&mdev->state_lock);
  2414. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  2415. new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
  2416. if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
  2417. tx_changed = 1;
  2418. new_prof.tx_ring_num[TX] =
  2419. MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
  2420. en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
  2421. }
  2422. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
  2423. if (err) {
  2424. if (prog)
  2425. bpf_prog_sub(prog, priv->rx_ring_num - 1);
  2426. goto unlock_out;
  2427. }
  2428. if (priv->port_up) {
  2429. port_up = 1;
  2430. mlx4_en_stop_port(dev, 1);
  2431. }
  2432. mlx4_en_safe_replace_resources(priv, tmp);
  2433. if (tx_changed)
  2434. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2435. for (i = 0; i < priv->rx_ring_num; i++) {
  2436. old_prog = rcu_dereference_protected(
  2437. priv->rx_ring[i]->xdp_prog,
  2438. lockdep_is_held(&mdev->state_lock));
  2439. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2440. if (old_prog)
  2441. bpf_prog_put(old_prog);
  2442. }
  2443. if (port_up) {
  2444. err = mlx4_en_start_port(dev);
  2445. if (err) {
  2446. en_err(priv, "Failed starting port %d for XDP change\n",
  2447. priv->port);
  2448. queue_work(mdev->workqueue, &priv->watchdog_task);
  2449. }
  2450. }
  2451. unlock_out:
  2452. mutex_unlock(&mdev->state_lock);
  2453. out:
  2454. kfree(tmp);
  2455. return err;
  2456. }
  2457. static u32 mlx4_xdp_query(struct net_device *dev)
  2458. {
  2459. struct mlx4_en_priv *priv = netdev_priv(dev);
  2460. struct mlx4_en_dev *mdev = priv->mdev;
  2461. const struct bpf_prog *xdp_prog;
  2462. u32 prog_id = 0;
  2463. if (!priv->tx_ring_num[TX_XDP])
  2464. return prog_id;
  2465. mutex_lock(&mdev->state_lock);
  2466. xdp_prog = rcu_dereference_protected(
  2467. priv->rx_ring[0]->xdp_prog,
  2468. lockdep_is_held(&mdev->state_lock));
  2469. if (xdp_prog)
  2470. prog_id = xdp_prog->aux->id;
  2471. mutex_unlock(&mdev->state_lock);
  2472. return prog_id;
  2473. }
  2474. static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp)
  2475. {
  2476. switch (xdp->command) {
  2477. case XDP_SETUP_PROG:
  2478. return mlx4_xdp_set(dev, xdp->prog);
  2479. case XDP_QUERY_PROG:
  2480. xdp->prog_id = mlx4_xdp_query(dev);
  2481. return 0;
  2482. default:
  2483. return -EINVAL;
  2484. }
  2485. }
  2486. static const struct net_device_ops mlx4_netdev_ops = {
  2487. .ndo_open = mlx4_en_open,
  2488. .ndo_stop = mlx4_en_close,
  2489. .ndo_start_xmit = mlx4_en_xmit,
  2490. .ndo_select_queue = mlx4_en_select_queue,
  2491. .ndo_get_stats64 = mlx4_en_get_stats64,
  2492. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2493. .ndo_set_mac_address = mlx4_en_set_mac,
  2494. .ndo_validate_addr = eth_validate_addr,
  2495. .ndo_change_mtu = mlx4_en_change_mtu,
  2496. .ndo_do_ioctl = mlx4_en_ioctl,
  2497. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2498. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2499. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2500. .ndo_set_features = mlx4_en_set_features,
  2501. .ndo_fix_features = mlx4_en_fix_features,
  2502. .ndo_setup_tc = __mlx4_en_setup_tc,
  2503. #ifdef CONFIG_RFS_ACCEL
  2504. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2505. #endif
  2506. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2507. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2508. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2509. .ndo_features_check = mlx4_en_features_check,
  2510. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2511. .ndo_bpf = mlx4_xdp,
  2512. };
  2513. static const struct net_device_ops mlx4_netdev_ops_master = {
  2514. .ndo_open = mlx4_en_open,
  2515. .ndo_stop = mlx4_en_close,
  2516. .ndo_start_xmit = mlx4_en_xmit,
  2517. .ndo_select_queue = mlx4_en_select_queue,
  2518. .ndo_get_stats64 = mlx4_en_get_stats64,
  2519. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2520. .ndo_set_mac_address = mlx4_en_set_mac,
  2521. .ndo_validate_addr = eth_validate_addr,
  2522. .ndo_change_mtu = mlx4_en_change_mtu,
  2523. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2524. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2525. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2526. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  2527. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  2528. .ndo_set_vf_rate = mlx4_en_set_vf_rate,
  2529. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  2530. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  2531. .ndo_get_vf_stats = mlx4_en_get_vf_stats,
  2532. .ndo_get_vf_config = mlx4_en_get_vf_config,
  2533. .ndo_set_features = mlx4_en_set_features,
  2534. .ndo_fix_features = mlx4_en_fix_features,
  2535. .ndo_setup_tc = __mlx4_en_setup_tc,
  2536. #ifdef CONFIG_RFS_ACCEL
  2537. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2538. #endif
  2539. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2540. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2541. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2542. .ndo_features_check = mlx4_en_features_check,
  2543. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2544. .ndo_bpf = mlx4_xdp,
  2545. };
  2546. struct mlx4_en_bond {
  2547. struct work_struct work;
  2548. struct mlx4_en_priv *priv;
  2549. int is_bonded;
  2550. struct mlx4_port_map port_map;
  2551. };
  2552. static void mlx4_en_bond_work(struct work_struct *work)
  2553. {
  2554. struct mlx4_en_bond *bond = container_of(work,
  2555. struct mlx4_en_bond,
  2556. work);
  2557. int err = 0;
  2558. struct mlx4_dev *dev = bond->priv->mdev->dev;
  2559. if (bond->is_bonded) {
  2560. if (!mlx4_is_bonded(dev)) {
  2561. err = mlx4_bond(dev);
  2562. if (err)
  2563. en_err(bond->priv, "Fail to bond device\n");
  2564. }
  2565. if (!err) {
  2566. err = mlx4_port_map_set(dev, &bond->port_map);
  2567. if (err)
  2568. en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
  2569. bond->port_map.port1,
  2570. bond->port_map.port2,
  2571. err);
  2572. }
  2573. } else if (mlx4_is_bonded(dev)) {
  2574. err = mlx4_unbond(dev);
  2575. if (err)
  2576. en_err(bond->priv, "Fail to unbond device\n");
  2577. }
  2578. dev_put(bond->priv->dev);
  2579. kfree(bond);
  2580. }
  2581. static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
  2582. u8 v2p_p1, u8 v2p_p2)
  2583. {
  2584. struct mlx4_en_bond *bond = NULL;
  2585. bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
  2586. if (!bond)
  2587. return -ENOMEM;
  2588. INIT_WORK(&bond->work, mlx4_en_bond_work);
  2589. bond->priv = priv;
  2590. bond->is_bonded = is_bonded;
  2591. bond->port_map.port1 = v2p_p1;
  2592. bond->port_map.port2 = v2p_p2;
  2593. dev_hold(priv->dev);
  2594. queue_work(priv->mdev->workqueue, &bond->work);
  2595. return 0;
  2596. }
  2597. int mlx4_en_netdev_event(struct notifier_block *this,
  2598. unsigned long event, void *ptr)
  2599. {
  2600. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  2601. u8 port = 0;
  2602. struct mlx4_en_dev *mdev;
  2603. struct mlx4_dev *dev;
  2604. int i, num_eth_ports = 0;
  2605. bool do_bond = true;
  2606. struct mlx4_en_priv *priv;
  2607. u8 v2p_port1 = 0;
  2608. u8 v2p_port2 = 0;
  2609. if (!net_eq(dev_net(ndev), &init_net))
  2610. return NOTIFY_DONE;
  2611. mdev = container_of(this, struct mlx4_en_dev, nb);
  2612. dev = mdev->dev;
  2613. /* Go into this mode only when two network devices set on two ports
  2614. * of the same mlx4 device are slaves of the same bonding master
  2615. */
  2616. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
  2617. ++num_eth_ports;
  2618. if (!port && (mdev->pndev[i] == ndev))
  2619. port = i;
  2620. mdev->upper[i] = mdev->pndev[i] ?
  2621. netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
  2622. /* condition not met: network device is a slave */
  2623. if (!mdev->upper[i])
  2624. do_bond = false;
  2625. if (num_eth_ports < 2)
  2626. continue;
  2627. /* condition not met: same master */
  2628. if (mdev->upper[i] != mdev->upper[i-1])
  2629. do_bond = false;
  2630. }
  2631. /* condition not met: 2 salves */
  2632. do_bond = (num_eth_ports == 2) ? do_bond : false;
  2633. /* handle only events that come with enough info */
  2634. if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
  2635. return NOTIFY_DONE;
  2636. priv = netdev_priv(ndev);
  2637. if (do_bond) {
  2638. struct netdev_notifier_bonding_info *notifier_info = ptr;
  2639. struct netdev_bonding_info *bonding_info =
  2640. &notifier_info->bonding_info;
  2641. /* required mode 1, 2 or 4 */
  2642. if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
  2643. (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
  2644. (bonding_info->master.bond_mode != BOND_MODE_8023AD))
  2645. do_bond = false;
  2646. /* require exactly 2 slaves */
  2647. if (bonding_info->master.num_slaves != 2)
  2648. do_bond = false;
  2649. /* calc v2p */
  2650. if (do_bond) {
  2651. if (bonding_info->master.bond_mode ==
  2652. BOND_MODE_ACTIVEBACKUP) {
  2653. /* in active-backup mode virtual ports are
  2654. * mapped to the physical port of the active
  2655. * slave */
  2656. if (bonding_info->slave.state ==
  2657. BOND_STATE_BACKUP) {
  2658. if (port == 1) {
  2659. v2p_port1 = 2;
  2660. v2p_port2 = 2;
  2661. } else {
  2662. v2p_port1 = 1;
  2663. v2p_port2 = 1;
  2664. }
  2665. } else { /* BOND_STATE_ACTIVE */
  2666. if (port == 1) {
  2667. v2p_port1 = 1;
  2668. v2p_port2 = 1;
  2669. } else {
  2670. v2p_port1 = 2;
  2671. v2p_port2 = 2;
  2672. }
  2673. }
  2674. } else { /* Active-Active */
  2675. /* in active-active mode a virtual port is
  2676. * mapped to the native physical port if and only
  2677. * if the physical port is up */
  2678. __s8 link = bonding_info->slave.link;
  2679. if (port == 1)
  2680. v2p_port2 = 2;
  2681. else
  2682. v2p_port1 = 1;
  2683. if ((link == BOND_LINK_UP) ||
  2684. (link == BOND_LINK_FAIL)) {
  2685. if (port == 1)
  2686. v2p_port1 = 1;
  2687. else
  2688. v2p_port2 = 2;
  2689. } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
  2690. if (port == 1)
  2691. v2p_port1 = 2;
  2692. else
  2693. v2p_port2 = 1;
  2694. }
  2695. }
  2696. }
  2697. }
  2698. mlx4_en_queue_bond_work(priv, do_bond,
  2699. v2p_port1, v2p_port2);
  2700. return NOTIFY_DONE;
  2701. }
  2702. void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
  2703. struct mlx4_en_stats_bitmap *stats_bitmap,
  2704. u8 rx_ppp, u8 rx_pause,
  2705. u8 tx_ppp, u8 tx_pause)
  2706. {
  2707. int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
  2708. if (!mlx4_is_slave(dev) &&
  2709. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
  2710. mutex_lock(&stats_bitmap->mutex);
  2711. bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
  2712. if (rx_ppp)
  2713. bitmap_set(stats_bitmap->bitmap, last_i,
  2714. NUM_FLOW_PRIORITY_STATS_RX);
  2715. last_i += NUM_FLOW_PRIORITY_STATS_RX;
  2716. if (rx_pause && !(rx_ppp))
  2717. bitmap_set(stats_bitmap->bitmap, last_i,
  2718. NUM_FLOW_STATS_RX);
  2719. last_i += NUM_FLOW_STATS_RX;
  2720. if (tx_ppp)
  2721. bitmap_set(stats_bitmap->bitmap, last_i,
  2722. NUM_FLOW_PRIORITY_STATS_TX);
  2723. last_i += NUM_FLOW_PRIORITY_STATS_TX;
  2724. if (tx_pause && !(tx_ppp))
  2725. bitmap_set(stats_bitmap->bitmap, last_i,
  2726. NUM_FLOW_STATS_TX);
  2727. last_i += NUM_FLOW_STATS_TX;
  2728. mutex_unlock(&stats_bitmap->mutex);
  2729. }
  2730. }
  2731. void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
  2732. struct mlx4_en_stats_bitmap *stats_bitmap,
  2733. u8 rx_ppp, u8 rx_pause,
  2734. u8 tx_ppp, u8 tx_pause)
  2735. {
  2736. int last_i = 0;
  2737. mutex_init(&stats_bitmap->mutex);
  2738. bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
  2739. if (mlx4_is_slave(dev)) {
  2740. bitmap_set(stats_bitmap->bitmap, last_i +
  2741. MLX4_FIND_NETDEV_STAT(rx_packets), 1);
  2742. bitmap_set(stats_bitmap->bitmap, last_i +
  2743. MLX4_FIND_NETDEV_STAT(tx_packets), 1);
  2744. bitmap_set(stats_bitmap->bitmap, last_i +
  2745. MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
  2746. bitmap_set(stats_bitmap->bitmap, last_i +
  2747. MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
  2748. bitmap_set(stats_bitmap->bitmap, last_i +
  2749. MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
  2750. bitmap_set(stats_bitmap->bitmap, last_i +
  2751. MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
  2752. } else {
  2753. bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
  2754. }
  2755. last_i += NUM_MAIN_STATS;
  2756. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
  2757. last_i += NUM_PORT_STATS;
  2758. if (mlx4_is_master(dev))
  2759. bitmap_set(stats_bitmap->bitmap, last_i,
  2760. NUM_PF_STATS);
  2761. last_i += NUM_PF_STATS;
  2762. mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
  2763. rx_ppp, rx_pause,
  2764. tx_ppp, tx_pause);
  2765. last_i += NUM_FLOW_STATS;
  2766. if (!mlx4_is_slave(dev))
  2767. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
  2768. last_i += NUM_PKT_STATS;
  2769. bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
  2770. last_i += NUM_XDP_STATS;
  2771. if (!mlx4_is_slave(dev))
  2772. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS);
  2773. last_i += NUM_PHY_STATS;
  2774. }
  2775. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  2776. struct mlx4_en_port_profile *prof)
  2777. {
  2778. struct net_device *dev;
  2779. struct mlx4_en_priv *priv;
  2780. int i, t;
  2781. int err;
  2782. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  2783. MAX_TX_RINGS, MAX_RX_RINGS);
  2784. if (dev == NULL)
  2785. return -ENOMEM;
  2786. netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
  2787. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2788. SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
  2789. dev->dev_port = port - 1;
  2790. /*
  2791. * Initialize driver private data
  2792. */
  2793. priv = netdev_priv(dev);
  2794. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2795. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  2796. spin_lock_init(&priv->stats_lock);
  2797. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2798. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2799. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2800. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2801. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2802. INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
  2803. INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
  2804. #ifdef CONFIG_RFS_ACCEL
  2805. INIT_LIST_HEAD(&priv->filters);
  2806. spin_lock_init(&priv->filters_lock);
  2807. #endif
  2808. priv->dev = dev;
  2809. priv->mdev = mdev;
  2810. priv->ddev = &mdev->pdev->dev;
  2811. priv->prof = prof;
  2812. priv->port = port;
  2813. priv->port_up = false;
  2814. priv->flags = prof->flags;
  2815. priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
  2816. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2817. MLX4_WQE_CTRL_SOLICITED);
  2818. priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up;
  2819. priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
  2820. netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
  2821. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  2822. priv->tx_ring_num[t] = prof->tx_ring_num[t];
  2823. if (!priv->tx_ring_num[t])
  2824. continue;
  2825. priv->tx_ring[t] = kcalloc(MAX_TX_RINGS,
  2826. sizeof(struct mlx4_en_tx_ring *),
  2827. GFP_KERNEL);
  2828. if (!priv->tx_ring[t]) {
  2829. err = -ENOMEM;
  2830. goto out;
  2831. }
  2832. priv->tx_cq[t] = kcalloc(MAX_TX_RINGS,
  2833. sizeof(struct mlx4_en_cq *),
  2834. GFP_KERNEL);
  2835. if (!priv->tx_cq[t]) {
  2836. err = -ENOMEM;
  2837. goto out;
  2838. }
  2839. }
  2840. priv->rx_ring_num = prof->rx_ring_num;
  2841. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2842. priv->cqe_size = mdev->dev->caps.cqe_size;
  2843. priv->mac_index = -1;
  2844. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2845. #ifdef CONFIG_MLX4_EN_DCB
  2846. if (!mlx4_is_slave(priv->mdev->dev)) {
  2847. u8 prio;
  2848. for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
  2849. priv->ets.prio_tc[prio] = prio;
  2850. priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR;
  2851. }
  2852. priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
  2853. DCB_CAP_DCBX_VER_IEEE;
  2854. priv->flags |= MLX4_EN_DCB_ENABLED;
  2855. priv->cee_config.pfc_state = false;
  2856. for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
  2857. priv->cee_config.dcb_pfc[i] = pfc_disabled;
  2858. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
  2859. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2860. } else {
  2861. en_info(priv, "enabling only PFC DCB ops\n");
  2862. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2863. }
  2864. }
  2865. #endif
  2866. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2867. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2868. /* Query for default mac and max mtu */
  2869. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2870. if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
  2871. MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
  2872. priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
  2873. /* Set default MAC */
  2874. dev->addr_len = ETH_ALEN;
  2875. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2876. if (!is_valid_ether_addr(dev->dev_addr)) {
  2877. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2878. priv->port, dev->dev_addr);
  2879. err = -EINVAL;
  2880. goto out;
  2881. } else if (mlx4_is_slave(priv->mdev->dev) &&
  2882. (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
  2883. /* Random MAC was assigned in mlx4_slave_cap
  2884. * in mlx4_core module
  2885. */
  2886. dev->addr_assign_type |= NET_ADDR_RANDOM;
  2887. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2888. }
  2889. memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
  2890. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2891. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2892. err = mlx4_en_alloc_resources(priv);
  2893. if (err)
  2894. goto out;
  2895. /* Initialize time stamping config */
  2896. priv->hwtstamp_config.flags = 0;
  2897. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2898. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2899. /* Allocate page for receive rings */
  2900. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2901. MLX4_EN_PAGE_SIZE);
  2902. if (err) {
  2903. en_err(priv, "Failed to allocate page for rx qps\n");
  2904. goto out;
  2905. }
  2906. priv->allocated = 1;
  2907. /*
  2908. * Initialize netdev entry points
  2909. */
  2910. if (mlx4_is_master(priv->mdev->dev))
  2911. dev->netdev_ops = &mlx4_netdev_ops_master;
  2912. else
  2913. dev->netdev_ops = &mlx4_netdev_ops;
  2914. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2915. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2916. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2917. dev->ethtool_ops = &mlx4_en_ethtool_ops;
  2918. /*
  2919. * Set driver features
  2920. */
  2921. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2922. if (mdev->LSO_support)
  2923. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2924. dev->vlan_features = dev->hw_features;
  2925. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2926. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2927. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2928. NETIF_F_HW_VLAN_CTAG_FILTER;
  2929. dev->hw_features |= NETIF_F_LOOPBACK |
  2930. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2931. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
  2932. dev->features |= NETIF_F_HW_VLAN_STAG_RX |
  2933. NETIF_F_HW_VLAN_STAG_FILTER;
  2934. dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
  2935. }
  2936. if (mlx4_is_slave(mdev->dev)) {
  2937. bool vlan_offload_disabled;
  2938. int phv;
  2939. err = get_phv_bit(mdev->dev, port, &phv);
  2940. if (!err && phv) {
  2941. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2942. priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
  2943. }
  2944. err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
  2945. &vlan_offload_disabled);
  2946. if (!err && vlan_offload_disabled) {
  2947. dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2948. NETIF_F_HW_VLAN_CTAG_RX |
  2949. NETIF_F_HW_VLAN_STAG_TX |
  2950. NETIF_F_HW_VLAN_STAG_RX);
  2951. dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2952. NETIF_F_HW_VLAN_CTAG_RX |
  2953. NETIF_F_HW_VLAN_STAG_TX |
  2954. NETIF_F_HW_VLAN_STAG_RX);
  2955. }
  2956. } else {
  2957. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
  2958. !(mdev->dev->caps.flags2 &
  2959. MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2960. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2961. }
  2962. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
  2963. dev->hw_features |= NETIF_F_RXFCS;
  2964. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
  2965. dev->hw_features |= NETIF_F_RXALL;
  2966. if (mdev->dev->caps.steering_mode ==
  2967. MLX4_STEERING_MODE_DEVICE_MANAGED &&
  2968. mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
  2969. dev->hw_features |= NETIF_F_NTUPLE;
  2970. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2971. dev->priv_flags |= IFF_UNICAST_FLT;
  2972. /* Setting a default hash function value */
  2973. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
  2974. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2975. } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
  2976. priv->rss_hash_fn = ETH_RSS_HASH_XOR;
  2977. } else {
  2978. en_warn(priv,
  2979. "No RSS hash capabilities exposed, using Toeplitz\n");
  2980. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2981. }
  2982. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2983. dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
  2984. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2985. NETIF_F_GSO_PARTIAL;
  2986. dev->features |= NETIF_F_GSO_UDP_TUNNEL |
  2987. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2988. NETIF_F_GSO_PARTIAL;
  2989. dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
  2990. }
  2991. /* MTU range: 68 - hw-specific max */
  2992. dev->min_mtu = ETH_MIN_MTU;
  2993. dev->max_mtu = priv->max_mtu;
  2994. mdev->pndev[port] = dev;
  2995. mdev->upper[port] = NULL;
  2996. netif_carrier_off(dev);
  2997. mlx4_en_set_default_moderation(priv);
  2998. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
  2999. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  3000. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  3001. /* Configure port */
  3002. mlx4_en_calc_rx_buf(dev);
  3003. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  3004. priv->rx_skb_size + ETH_FCS_LEN,
  3005. prof->tx_pause, prof->tx_ppp,
  3006. prof->rx_pause, prof->rx_ppp);
  3007. if (err) {
  3008. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  3009. priv->port, err);
  3010. goto out;
  3011. }
  3012. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  3013. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  3014. if (err) {
  3015. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  3016. err);
  3017. goto out;
  3018. }
  3019. }
  3020. /* Init port */
  3021. en_warn(priv, "Initializing port\n");
  3022. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  3023. if (err) {
  3024. en_err(priv, "Failed Initializing port\n");
  3025. goto out;
  3026. }
  3027. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  3028. /* Initialize time stamp mechanism */
  3029. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  3030. mlx4_en_init_timestamp(mdev);
  3031. queue_delayed_work(mdev->workqueue, &priv->service_task,
  3032. SERVICE_TASK_DELAY);
  3033. mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
  3034. mdev->profile.prof[priv->port].rx_ppp,
  3035. mdev->profile.prof[priv->port].rx_pause,
  3036. mdev->profile.prof[priv->port].tx_ppp,
  3037. mdev->profile.prof[priv->port].tx_pause);
  3038. err = register_netdev(dev);
  3039. if (err) {
  3040. en_err(priv, "Netdev registration failed for port %d\n", port);
  3041. goto out;
  3042. }
  3043. priv->registered = 1;
  3044. devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
  3045. dev);
  3046. return 0;
  3047. out:
  3048. mlx4_en_destroy_netdev(dev);
  3049. return err;
  3050. }
  3051. int mlx4_en_reset_config(struct net_device *dev,
  3052. struct hwtstamp_config ts_config,
  3053. netdev_features_t features)
  3054. {
  3055. struct mlx4_en_priv *priv = netdev_priv(dev);
  3056. struct mlx4_en_dev *mdev = priv->mdev;
  3057. struct mlx4_en_port_profile new_prof;
  3058. struct mlx4_en_priv *tmp;
  3059. int port_up = 0;
  3060. int err = 0;
  3061. if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
  3062. priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
  3063. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  3064. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
  3065. return 0; /* Nothing to change */
  3066. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  3067. (features & NETIF_F_HW_VLAN_CTAG_RX) &&
  3068. (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
  3069. en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
  3070. return -EINVAL;
  3071. }
  3072. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  3073. if (!tmp)
  3074. return -ENOMEM;
  3075. mutex_lock(&mdev->state_lock);
  3076. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  3077. memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
  3078. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
  3079. if (err)
  3080. goto out;
  3081. if (priv->port_up) {
  3082. port_up = 1;
  3083. mlx4_en_stop_port(dev, 1);
  3084. }
  3085. mlx4_en_safe_replace_resources(priv, tmp);
  3086. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  3087. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  3088. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3089. else
  3090. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3091. } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
  3092. /* RX time-stamping is OFF, update the RX vlan offload
  3093. * to the latest wanted state
  3094. */
  3095. if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
  3096. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3097. else
  3098. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3099. }
  3100. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
  3101. if (features & NETIF_F_RXFCS)
  3102. dev->features |= NETIF_F_RXFCS;
  3103. else
  3104. dev->features &= ~NETIF_F_RXFCS;
  3105. }
  3106. /* RX vlan offload and RX time-stamping can't co-exist !
  3107. * Regardless of the caller's choice,
  3108. * Turn Off RX vlan offload in case of time-stamping is ON
  3109. */
  3110. if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
  3111. if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
  3112. en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
  3113. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3114. }
  3115. if (port_up) {
  3116. err = mlx4_en_start_port(dev);
  3117. if (err)
  3118. en_err(priv, "Failed starting port\n");
  3119. }
  3120. out:
  3121. mutex_unlock(&mdev->state_lock);
  3122. kfree(tmp);
  3123. if (!err)
  3124. netdev_features_change(dev);
  3125. return err;
  3126. }