ixgbevf_main.c 130 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 1999 - 2018 Intel Corporation. */
  3. /******************************************************************************
  4. Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
  5. ******************************************************************************/
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/types.h>
  8. #include <linux/bitops.h>
  9. #include <linux/module.h>
  10. #include <linux/pci.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/vmalloc.h>
  13. #include <linux/string.h>
  14. #include <linux/in.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/sctp.h>
  18. #include <linux/ipv6.h>
  19. #include <linux/slab.h>
  20. #include <net/checksum.h>
  21. #include <net/ip6_checksum.h>
  22. #include <linux/ethtool.h>
  23. #include <linux/if.h>
  24. #include <linux/if_vlan.h>
  25. #include <linux/prefetch.h>
  26. #include <net/mpls.h>
  27. #include <linux/bpf.h>
  28. #include <linux/bpf_trace.h>
  29. #include <linux/atomic.h>
  30. #include "ixgbevf.h"
  31. const char ixgbevf_driver_name[] = "ixgbevf";
  32. static const char ixgbevf_driver_string[] =
  33. "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
  34. #define DRV_VERSION "4.1.0-k"
  35. const char ixgbevf_driver_version[] = DRV_VERSION;
  36. static char ixgbevf_copyright[] =
  37. "Copyright (c) 2009 - 2015 Intel Corporation.";
  38. static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
  39. [board_82599_vf] = &ixgbevf_82599_vf_info,
  40. [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
  41. [board_X540_vf] = &ixgbevf_X540_vf_info,
  42. [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
  43. [board_X550_vf] = &ixgbevf_X550_vf_info,
  44. [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
  45. [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
  46. [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
  47. [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
  48. };
  49. /* ixgbevf_pci_tbl - PCI Device ID Table
  50. *
  51. * Wildcard entries (PCI_ANY_ID) should come last
  52. * Last entry must be all 0s
  53. *
  54. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  55. * Class, Class Mask, private data (not used) }
  56. */
  57. static const struct pci_device_id ixgbevf_pci_tbl[] = {
  58. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
  59. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
  60. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
  61. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
  62. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
  63. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
  64. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
  65. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
  66. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
  67. /* required last entry */
  68. {0, }
  69. };
  70. MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
  71. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  72. MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
  73. MODULE_LICENSE("GPL");
  74. MODULE_VERSION(DRV_VERSION);
  75. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  76. static int debug = -1;
  77. module_param(debug, int, 0);
  78. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  79. static struct workqueue_struct *ixgbevf_wq;
  80. static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
  81. {
  82. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  83. !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
  84. !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
  85. queue_work(ixgbevf_wq, &adapter->service_task);
  86. }
  87. static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
  88. {
  89. BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
  90. /* flush memory to make sure state is correct before next watchdog */
  91. smp_mb__before_atomic();
  92. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  93. }
  94. /* forward decls */
  95. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
  96. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
  97. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
  98. static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer);
  99. static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
  100. struct ixgbevf_rx_buffer *old_buff);
  101. static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
  102. {
  103. struct ixgbevf_adapter *adapter = hw->back;
  104. if (!hw->hw_addr)
  105. return;
  106. hw->hw_addr = NULL;
  107. dev_err(&adapter->pdev->dev, "Adapter removed\n");
  108. if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  109. ixgbevf_service_event_schedule(adapter);
  110. }
  111. static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
  112. {
  113. u32 value;
  114. /* The following check not only optimizes a bit by not
  115. * performing a read on the status register when the
  116. * register just read was a status register read that
  117. * returned IXGBE_FAILED_READ_REG. It also blocks any
  118. * potential recursion.
  119. */
  120. if (reg == IXGBE_VFSTATUS) {
  121. ixgbevf_remove_adapter(hw);
  122. return;
  123. }
  124. value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
  125. if (value == IXGBE_FAILED_READ_REG)
  126. ixgbevf_remove_adapter(hw);
  127. }
  128. u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
  129. {
  130. u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
  131. u32 value;
  132. if (IXGBE_REMOVED(reg_addr))
  133. return IXGBE_FAILED_READ_REG;
  134. value = readl(reg_addr + reg);
  135. if (unlikely(value == IXGBE_FAILED_READ_REG))
  136. ixgbevf_check_remove(hw, reg);
  137. return value;
  138. }
  139. /**
  140. * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
  141. * @adapter: pointer to adapter struct
  142. * @direction: 0 for Rx, 1 for Tx, -1 for other causes
  143. * @queue: queue to map the corresponding interrupt to
  144. * @msix_vector: the vector to map to the corresponding queue
  145. **/
  146. static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
  147. u8 queue, u8 msix_vector)
  148. {
  149. u32 ivar, index;
  150. struct ixgbe_hw *hw = &adapter->hw;
  151. if (direction == -1) {
  152. /* other causes */
  153. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  154. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
  155. ivar &= ~0xFF;
  156. ivar |= msix_vector;
  157. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
  158. } else {
  159. /* Tx or Rx causes */
  160. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  161. index = ((16 * (queue & 1)) + (8 * direction));
  162. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
  163. ivar &= ~(0xFF << index);
  164. ivar |= (msix_vector << index);
  165. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
  166. }
  167. }
  168. static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
  169. {
  170. return ring->stats.packets;
  171. }
  172. static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
  173. {
  174. struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
  175. struct ixgbe_hw *hw = &adapter->hw;
  176. u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
  177. u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
  178. if (head != tail)
  179. return (head < tail) ?
  180. tail - head : (tail + ring->count - head);
  181. return 0;
  182. }
  183. static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
  184. {
  185. u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
  186. u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
  187. u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
  188. clear_check_for_tx_hang(tx_ring);
  189. /* Check for a hung queue, but be thorough. This verifies
  190. * that a transmit has been completed since the previous
  191. * check AND there is at least one packet pending. The
  192. * ARMED bit is set to indicate a potential hang.
  193. */
  194. if ((tx_done_old == tx_done) && tx_pending) {
  195. /* make sure it is true for two checks in a row */
  196. return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
  197. &tx_ring->state);
  198. }
  199. /* reset the countdown */
  200. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
  201. /* update completed stats and continue */
  202. tx_ring->tx_stats.tx_done_old = tx_done;
  203. return false;
  204. }
  205. static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
  206. {
  207. /* Do the reset outside of interrupt context */
  208. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  209. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  210. ixgbevf_service_event_schedule(adapter);
  211. }
  212. }
  213. /**
  214. * ixgbevf_tx_timeout - Respond to a Tx Hang
  215. * @netdev: network interface device structure
  216. **/
  217. static void ixgbevf_tx_timeout(struct net_device *netdev)
  218. {
  219. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  220. ixgbevf_tx_timeout_reset(adapter);
  221. }
  222. /**
  223. * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
  224. * @q_vector: board private structure
  225. * @tx_ring: tx ring to clean
  226. * @napi_budget: Used to determine if we are in netpoll
  227. **/
  228. static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
  229. struct ixgbevf_ring *tx_ring, int napi_budget)
  230. {
  231. struct ixgbevf_adapter *adapter = q_vector->adapter;
  232. struct ixgbevf_tx_buffer *tx_buffer;
  233. union ixgbe_adv_tx_desc *tx_desc;
  234. unsigned int total_bytes = 0, total_packets = 0;
  235. unsigned int budget = tx_ring->count / 2;
  236. unsigned int i = tx_ring->next_to_clean;
  237. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  238. return true;
  239. tx_buffer = &tx_ring->tx_buffer_info[i];
  240. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  241. i -= tx_ring->count;
  242. do {
  243. union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
  244. /* if next_to_watch is not set then there is no work pending */
  245. if (!eop_desc)
  246. break;
  247. /* prevent any other reads prior to eop_desc */
  248. smp_rmb();
  249. /* if DD is not set pending work has not been completed */
  250. if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
  251. break;
  252. /* clear next_to_watch to prevent false hangs */
  253. tx_buffer->next_to_watch = NULL;
  254. /* update the statistics for this packet */
  255. total_bytes += tx_buffer->bytecount;
  256. total_packets += tx_buffer->gso_segs;
  257. /* free the skb */
  258. if (ring_is_xdp(tx_ring))
  259. page_frag_free(tx_buffer->data);
  260. else
  261. napi_consume_skb(tx_buffer->skb, napi_budget);
  262. /* unmap skb header data */
  263. dma_unmap_single(tx_ring->dev,
  264. dma_unmap_addr(tx_buffer, dma),
  265. dma_unmap_len(tx_buffer, len),
  266. DMA_TO_DEVICE);
  267. /* clear tx_buffer data */
  268. dma_unmap_len_set(tx_buffer, len, 0);
  269. /* unmap remaining buffers */
  270. while (tx_desc != eop_desc) {
  271. tx_buffer++;
  272. tx_desc++;
  273. i++;
  274. if (unlikely(!i)) {
  275. i -= tx_ring->count;
  276. tx_buffer = tx_ring->tx_buffer_info;
  277. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  278. }
  279. /* unmap any remaining paged data */
  280. if (dma_unmap_len(tx_buffer, len)) {
  281. dma_unmap_page(tx_ring->dev,
  282. dma_unmap_addr(tx_buffer, dma),
  283. dma_unmap_len(tx_buffer, len),
  284. DMA_TO_DEVICE);
  285. dma_unmap_len_set(tx_buffer, len, 0);
  286. }
  287. }
  288. /* move us one more past the eop_desc for start of next pkt */
  289. tx_buffer++;
  290. tx_desc++;
  291. i++;
  292. if (unlikely(!i)) {
  293. i -= tx_ring->count;
  294. tx_buffer = tx_ring->tx_buffer_info;
  295. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  296. }
  297. /* issue prefetch for next Tx descriptor */
  298. prefetch(tx_desc);
  299. /* update budget accounting */
  300. budget--;
  301. } while (likely(budget));
  302. i += tx_ring->count;
  303. tx_ring->next_to_clean = i;
  304. u64_stats_update_begin(&tx_ring->syncp);
  305. tx_ring->stats.bytes += total_bytes;
  306. tx_ring->stats.packets += total_packets;
  307. u64_stats_update_end(&tx_ring->syncp);
  308. q_vector->tx.total_bytes += total_bytes;
  309. q_vector->tx.total_packets += total_packets;
  310. if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
  311. struct ixgbe_hw *hw = &adapter->hw;
  312. union ixgbe_adv_tx_desc *eop_desc;
  313. eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
  314. pr_err("Detected Tx Unit Hang%s\n"
  315. " Tx Queue <%d>\n"
  316. " TDH, TDT <%x>, <%x>\n"
  317. " next_to_use <%x>\n"
  318. " next_to_clean <%x>\n"
  319. "tx_buffer_info[next_to_clean]\n"
  320. " next_to_watch <%p>\n"
  321. " eop_desc->wb.status <%x>\n"
  322. " time_stamp <%lx>\n"
  323. " jiffies <%lx>\n",
  324. ring_is_xdp(tx_ring) ? " XDP" : "",
  325. tx_ring->queue_index,
  326. IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
  327. IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
  328. tx_ring->next_to_use, i,
  329. eop_desc, (eop_desc ? eop_desc->wb.status : 0),
  330. tx_ring->tx_buffer_info[i].time_stamp, jiffies);
  331. if (!ring_is_xdp(tx_ring))
  332. netif_stop_subqueue(tx_ring->netdev,
  333. tx_ring->queue_index);
  334. /* schedule immediate reset if we believe we hung */
  335. ixgbevf_tx_timeout_reset(adapter);
  336. return true;
  337. }
  338. if (ring_is_xdp(tx_ring))
  339. return !!budget;
  340. #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
  341. if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
  342. (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
  343. /* Make sure that anybody stopping the queue after this
  344. * sees the new next_to_clean.
  345. */
  346. smp_mb();
  347. if (__netif_subqueue_stopped(tx_ring->netdev,
  348. tx_ring->queue_index) &&
  349. !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  350. netif_wake_subqueue(tx_ring->netdev,
  351. tx_ring->queue_index);
  352. ++tx_ring->tx_stats.restart_queue;
  353. }
  354. }
  355. return !!budget;
  356. }
  357. /**
  358. * ixgbevf_rx_skb - Helper function to determine proper Rx method
  359. * @q_vector: structure containing interrupt and ring information
  360. * @skb: packet to send up
  361. **/
  362. static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
  363. struct sk_buff *skb)
  364. {
  365. napi_gro_receive(&q_vector->napi, skb);
  366. }
  367. #define IXGBE_RSS_L4_TYPES_MASK \
  368. ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
  369. (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
  370. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
  371. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
  372. static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
  373. union ixgbe_adv_rx_desc *rx_desc,
  374. struct sk_buff *skb)
  375. {
  376. u16 rss_type;
  377. if (!(ring->netdev->features & NETIF_F_RXHASH))
  378. return;
  379. rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
  380. IXGBE_RXDADV_RSSTYPE_MASK;
  381. if (!rss_type)
  382. return;
  383. skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
  384. (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
  385. PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
  386. }
  387. /**
  388. * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
  389. * @ring: structure containig ring specific data
  390. * @rx_desc: current Rx descriptor being processed
  391. * @skb: skb currently being received and modified
  392. **/
  393. static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
  394. union ixgbe_adv_rx_desc *rx_desc,
  395. struct sk_buff *skb)
  396. {
  397. skb_checksum_none_assert(skb);
  398. /* Rx csum disabled */
  399. if (!(ring->netdev->features & NETIF_F_RXCSUM))
  400. return;
  401. /* if IP and error */
  402. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
  403. ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
  404. ring->rx_stats.csum_err++;
  405. return;
  406. }
  407. if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
  408. return;
  409. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
  410. ring->rx_stats.csum_err++;
  411. return;
  412. }
  413. /* It must be a TCP or UDP packet with a valid checksum */
  414. skb->ip_summed = CHECKSUM_UNNECESSARY;
  415. }
  416. /**
  417. * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
  418. * @rx_ring: rx descriptor ring packet is being transacted on
  419. * @rx_desc: pointer to the EOP Rx descriptor
  420. * @skb: pointer to current skb being populated
  421. *
  422. * This function checks the ring, descriptor, and packet information in
  423. * order to populate the checksum, VLAN, protocol, and other fields within
  424. * the skb.
  425. **/
  426. static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
  427. union ixgbe_adv_rx_desc *rx_desc,
  428. struct sk_buff *skb)
  429. {
  430. ixgbevf_rx_hash(rx_ring, rx_desc, skb);
  431. ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
  432. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
  433. u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
  434. unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
  435. if (test_bit(vid & VLAN_VID_MASK, active_vlans))
  436. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  437. }
  438. skb->protocol = eth_type_trans(skb, rx_ring->netdev);
  439. }
  440. static
  441. struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring,
  442. const unsigned int size)
  443. {
  444. struct ixgbevf_rx_buffer *rx_buffer;
  445. rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
  446. prefetchw(rx_buffer->page);
  447. /* we are reusing so sync this buffer for CPU use */
  448. dma_sync_single_range_for_cpu(rx_ring->dev,
  449. rx_buffer->dma,
  450. rx_buffer->page_offset,
  451. size,
  452. DMA_FROM_DEVICE);
  453. rx_buffer->pagecnt_bias--;
  454. return rx_buffer;
  455. }
  456. static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring,
  457. struct ixgbevf_rx_buffer *rx_buffer,
  458. struct sk_buff *skb)
  459. {
  460. if (ixgbevf_can_reuse_rx_page(rx_buffer)) {
  461. /* hand second half of page back to the ring */
  462. ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
  463. } else {
  464. if (IS_ERR(skb))
  465. /* We are not reusing the buffer so unmap it and free
  466. * any references we are holding to it
  467. */
  468. dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
  469. ixgbevf_rx_pg_size(rx_ring),
  470. DMA_FROM_DEVICE,
  471. IXGBEVF_RX_DMA_ATTR);
  472. __page_frag_cache_drain(rx_buffer->page,
  473. rx_buffer->pagecnt_bias);
  474. }
  475. /* clear contents of rx_buffer */
  476. rx_buffer->page = NULL;
  477. }
  478. /**
  479. * ixgbevf_is_non_eop - process handling of non-EOP buffers
  480. * @rx_ring: Rx ring being processed
  481. * @rx_desc: Rx descriptor for current buffer
  482. *
  483. * This function updates next to clean. If the buffer is an EOP buffer
  484. * this function exits returning false, otherwise it will place the
  485. * sk_buff in the next buffer to be chained and return true indicating
  486. * that this is in fact a non-EOP buffer.
  487. **/
  488. static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
  489. union ixgbe_adv_rx_desc *rx_desc)
  490. {
  491. u32 ntc = rx_ring->next_to_clean + 1;
  492. /* fetch, update, and store next to clean */
  493. ntc = (ntc < rx_ring->count) ? ntc : 0;
  494. rx_ring->next_to_clean = ntc;
  495. prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
  496. if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
  497. return false;
  498. return true;
  499. }
  500. static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring)
  501. {
  502. return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0;
  503. }
  504. static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
  505. struct ixgbevf_rx_buffer *bi)
  506. {
  507. struct page *page = bi->page;
  508. dma_addr_t dma;
  509. /* since we are recycling buffers we should seldom need to alloc */
  510. if (likely(page))
  511. return true;
  512. /* alloc new page for storage */
  513. page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring));
  514. if (unlikely(!page)) {
  515. rx_ring->rx_stats.alloc_rx_page_failed++;
  516. return false;
  517. }
  518. /* map page for use */
  519. dma = dma_map_page_attrs(rx_ring->dev, page, 0,
  520. ixgbevf_rx_pg_size(rx_ring),
  521. DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR);
  522. /* if mapping failed free memory back to system since
  523. * there isn't much point in holding memory we can't use
  524. */
  525. if (dma_mapping_error(rx_ring->dev, dma)) {
  526. __free_pages(page, ixgbevf_rx_pg_order(rx_ring));
  527. rx_ring->rx_stats.alloc_rx_page_failed++;
  528. return false;
  529. }
  530. bi->dma = dma;
  531. bi->page = page;
  532. bi->page_offset = ixgbevf_rx_offset(rx_ring);
  533. bi->pagecnt_bias = 1;
  534. rx_ring->rx_stats.alloc_rx_page++;
  535. return true;
  536. }
  537. /**
  538. * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
  539. * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
  540. * @cleaned_count: number of buffers to replace
  541. **/
  542. static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
  543. u16 cleaned_count)
  544. {
  545. union ixgbe_adv_rx_desc *rx_desc;
  546. struct ixgbevf_rx_buffer *bi;
  547. unsigned int i = rx_ring->next_to_use;
  548. /* nothing to do or no valid netdev defined */
  549. if (!cleaned_count || !rx_ring->netdev)
  550. return;
  551. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  552. bi = &rx_ring->rx_buffer_info[i];
  553. i -= rx_ring->count;
  554. do {
  555. if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
  556. break;
  557. /* sync the buffer for use by the device */
  558. dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
  559. bi->page_offset,
  560. ixgbevf_rx_bufsz(rx_ring),
  561. DMA_FROM_DEVICE);
  562. /* Refresh the desc even if pkt_addr didn't change
  563. * because each write-back erases this info.
  564. */
  565. rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
  566. rx_desc++;
  567. bi++;
  568. i++;
  569. if (unlikely(!i)) {
  570. rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
  571. bi = rx_ring->rx_buffer_info;
  572. i -= rx_ring->count;
  573. }
  574. /* clear the length for the next_to_use descriptor */
  575. rx_desc->wb.upper.length = 0;
  576. cleaned_count--;
  577. } while (cleaned_count);
  578. i += rx_ring->count;
  579. if (rx_ring->next_to_use != i) {
  580. /* record the next descriptor to use */
  581. rx_ring->next_to_use = i;
  582. /* update next to alloc since we have filled the ring */
  583. rx_ring->next_to_alloc = i;
  584. /* Force memory writes to complete before letting h/w
  585. * know there are new descriptors to fetch. (Only
  586. * applicable for weak-ordered memory model archs,
  587. * such as IA-64).
  588. */
  589. wmb();
  590. ixgbevf_write_tail(rx_ring, i);
  591. }
  592. }
  593. /**
  594. * ixgbevf_cleanup_headers - Correct corrupted or empty headers
  595. * @rx_ring: rx descriptor ring packet is being transacted on
  596. * @rx_desc: pointer to the EOP Rx descriptor
  597. * @skb: pointer to current skb being fixed
  598. *
  599. * Check for corrupted packet headers caused by senders on the local L2
  600. * embedded NIC switch not setting up their Tx Descriptors right. These
  601. * should be very rare.
  602. *
  603. * Also address the case where we are pulling data in on pages only
  604. * and as such no data is present in the skb header.
  605. *
  606. * In addition if skb is not at least 60 bytes we need to pad it so that
  607. * it is large enough to qualify as a valid Ethernet frame.
  608. *
  609. * Returns true if an error was encountered and skb was freed.
  610. **/
  611. static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
  612. union ixgbe_adv_rx_desc *rx_desc,
  613. struct sk_buff *skb)
  614. {
  615. /* XDP packets use error pointer so abort at this point */
  616. if (IS_ERR(skb))
  617. return true;
  618. /* verify that the packet does not have any known errors */
  619. if (unlikely(ixgbevf_test_staterr(rx_desc,
  620. IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
  621. struct net_device *netdev = rx_ring->netdev;
  622. if (!(netdev->features & NETIF_F_RXALL)) {
  623. dev_kfree_skb_any(skb);
  624. return true;
  625. }
  626. }
  627. /* if eth_skb_pad returns an error the skb was freed */
  628. if (eth_skb_pad(skb))
  629. return true;
  630. return false;
  631. }
  632. /**
  633. * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
  634. * @rx_ring: rx descriptor ring to store buffers on
  635. * @old_buff: donor buffer to have page reused
  636. *
  637. * Synchronizes page for reuse by the adapter
  638. **/
  639. static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
  640. struct ixgbevf_rx_buffer *old_buff)
  641. {
  642. struct ixgbevf_rx_buffer *new_buff;
  643. u16 nta = rx_ring->next_to_alloc;
  644. new_buff = &rx_ring->rx_buffer_info[nta];
  645. /* update, and store next to alloc */
  646. nta++;
  647. rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
  648. /* transfer page from old buffer to new buffer */
  649. new_buff->page = old_buff->page;
  650. new_buff->dma = old_buff->dma;
  651. new_buff->page_offset = old_buff->page_offset;
  652. new_buff->pagecnt_bias = old_buff->pagecnt_bias;
  653. }
  654. static inline bool ixgbevf_page_is_reserved(struct page *page)
  655. {
  656. return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
  657. }
  658. static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer)
  659. {
  660. unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
  661. struct page *page = rx_buffer->page;
  662. /* avoid re-using remote pages */
  663. if (unlikely(ixgbevf_page_is_reserved(page)))
  664. return false;
  665. #if (PAGE_SIZE < 8192)
  666. /* if we are only owner of page we can reuse it */
  667. if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
  668. return false;
  669. #else
  670. #define IXGBEVF_LAST_OFFSET \
  671. (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048)
  672. if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET)
  673. return false;
  674. #endif
  675. /* If we have drained the page fragment pool we need to update
  676. * the pagecnt_bias and page count so that we fully restock the
  677. * number of references the driver holds.
  678. */
  679. if (unlikely(!pagecnt_bias)) {
  680. page_ref_add(page, USHRT_MAX);
  681. rx_buffer->pagecnt_bias = USHRT_MAX;
  682. }
  683. return true;
  684. }
  685. /**
  686. * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
  687. * @rx_ring: rx descriptor ring to transact packets on
  688. * @rx_buffer: buffer containing page to add
  689. * @skb: sk_buff to place the data into
  690. * @size: size of buffer to be added
  691. *
  692. * This function will add the data contained in rx_buffer->page to the skb.
  693. **/
  694. static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
  695. struct ixgbevf_rx_buffer *rx_buffer,
  696. struct sk_buff *skb,
  697. unsigned int size)
  698. {
  699. #if (PAGE_SIZE < 8192)
  700. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  701. #else
  702. unsigned int truesize = ring_uses_build_skb(rx_ring) ?
  703. SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
  704. SKB_DATA_ALIGN(size);
  705. #endif
  706. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
  707. rx_buffer->page_offset, size, truesize);
  708. #if (PAGE_SIZE < 8192)
  709. rx_buffer->page_offset ^= truesize;
  710. #else
  711. rx_buffer->page_offset += truesize;
  712. #endif
  713. }
  714. static
  715. struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring,
  716. struct ixgbevf_rx_buffer *rx_buffer,
  717. struct xdp_buff *xdp,
  718. union ixgbe_adv_rx_desc *rx_desc)
  719. {
  720. unsigned int size = xdp->data_end - xdp->data;
  721. #if (PAGE_SIZE < 8192)
  722. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  723. #else
  724. unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
  725. xdp->data_hard_start);
  726. #endif
  727. unsigned int headlen;
  728. struct sk_buff *skb;
  729. /* prefetch first cache line of first page */
  730. prefetch(xdp->data);
  731. #if L1_CACHE_BYTES < 128
  732. prefetch(xdp->data + L1_CACHE_BYTES);
  733. #endif
  734. /* Note, we get here by enabling legacy-rx via:
  735. *
  736. * ethtool --set-priv-flags <dev> legacy-rx on
  737. *
  738. * In this mode, we currently get 0 extra XDP headroom as
  739. * opposed to having legacy-rx off, where we process XDP
  740. * packets going to stack via ixgbevf_build_skb().
  741. *
  742. * For ixgbevf_construct_skb() mode it means that the
  743. * xdp->data_meta will always point to xdp->data, since
  744. * the helper cannot expand the head. Should this ever
  745. * changed in future for legacy-rx mode on, then lets also
  746. * add xdp->data_meta handling here.
  747. */
  748. /* allocate a skb to store the frags */
  749. skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE);
  750. if (unlikely(!skb))
  751. return NULL;
  752. /* Determine available headroom for copy */
  753. headlen = size;
  754. if (headlen > IXGBEVF_RX_HDR_SIZE)
  755. headlen = eth_get_headlen(xdp->data, IXGBEVF_RX_HDR_SIZE);
  756. /* align pull length to size of long to optimize memcpy performance */
  757. memcpy(__skb_put(skb, headlen), xdp->data,
  758. ALIGN(headlen, sizeof(long)));
  759. /* update all of the pointers */
  760. size -= headlen;
  761. if (size) {
  762. skb_add_rx_frag(skb, 0, rx_buffer->page,
  763. (xdp->data + headlen) -
  764. page_address(rx_buffer->page),
  765. size, truesize);
  766. #if (PAGE_SIZE < 8192)
  767. rx_buffer->page_offset ^= truesize;
  768. #else
  769. rx_buffer->page_offset += truesize;
  770. #endif
  771. } else {
  772. rx_buffer->pagecnt_bias++;
  773. }
  774. return skb;
  775. }
  776. static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
  777. u32 qmask)
  778. {
  779. struct ixgbe_hw *hw = &adapter->hw;
  780. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
  781. }
  782. static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring,
  783. struct ixgbevf_rx_buffer *rx_buffer,
  784. struct xdp_buff *xdp,
  785. union ixgbe_adv_rx_desc *rx_desc)
  786. {
  787. unsigned int metasize = xdp->data - xdp->data_meta;
  788. #if (PAGE_SIZE < 8192)
  789. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  790. #else
  791. unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
  792. SKB_DATA_ALIGN(xdp->data_end -
  793. xdp->data_hard_start);
  794. #endif
  795. struct sk_buff *skb;
  796. /* Prefetch first cache line of first page. If xdp->data_meta
  797. * is unused, this points to xdp->data, otherwise, we likely
  798. * have a consumer accessing first few bytes of meta data,
  799. * and then actual data.
  800. */
  801. prefetch(xdp->data_meta);
  802. #if L1_CACHE_BYTES < 128
  803. prefetch(xdp->data_meta + L1_CACHE_BYTES);
  804. #endif
  805. /* build an skb around the page buffer */
  806. skb = build_skb(xdp->data_hard_start, truesize);
  807. if (unlikely(!skb))
  808. return NULL;
  809. /* update pointers within the skb to store the data */
  810. skb_reserve(skb, xdp->data - xdp->data_hard_start);
  811. __skb_put(skb, xdp->data_end - xdp->data);
  812. if (metasize)
  813. skb_metadata_set(skb, metasize);
  814. /* update buffer offset */
  815. #if (PAGE_SIZE < 8192)
  816. rx_buffer->page_offset ^= truesize;
  817. #else
  818. rx_buffer->page_offset += truesize;
  819. #endif
  820. return skb;
  821. }
  822. #define IXGBEVF_XDP_PASS 0
  823. #define IXGBEVF_XDP_CONSUMED 1
  824. #define IXGBEVF_XDP_TX 2
  825. static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,
  826. struct xdp_buff *xdp)
  827. {
  828. struct ixgbevf_tx_buffer *tx_buffer;
  829. union ixgbe_adv_tx_desc *tx_desc;
  830. u32 len, cmd_type;
  831. dma_addr_t dma;
  832. u16 i;
  833. len = xdp->data_end - xdp->data;
  834. if (unlikely(!ixgbevf_desc_unused(ring)))
  835. return IXGBEVF_XDP_CONSUMED;
  836. dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
  837. if (dma_mapping_error(ring->dev, dma))
  838. return IXGBEVF_XDP_CONSUMED;
  839. /* record the location of the first descriptor for this packet */
  840. i = ring->next_to_use;
  841. tx_buffer = &ring->tx_buffer_info[i];
  842. dma_unmap_len_set(tx_buffer, len, len);
  843. dma_unmap_addr_set(tx_buffer, dma, dma);
  844. tx_buffer->data = xdp->data;
  845. tx_buffer->bytecount = len;
  846. tx_buffer->gso_segs = 1;
  847. tx_buffer->protocol = 0;
  848. /* Populate minimal context descriptor that will provide for the
  849. * fact that we are expected to process Ethernet frames.
  850. */
  851. if (!test_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state)) {
  852. struct ixgbe_adv_tx_context_desc *context_desc;
  853. set_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
  854. context_desc = IXGBEVF_TX_CTXTDESC(ring, 0);
  855. context_desc->vlan_macip_lens =
  856. cpu_to_le32(ETH_HLEN << IXGBE_ADVTXD_MACLEN_SHIFT);
  857. context_desc->seqnum_seed = 0;
  858. context_desc->type_tucmd_mlhl =
  859. cpu_to_le32(IXGBE_TXD_CMD_DEXT |
  860. IXGBE_ADVTXD_DTYP_CTXT);
  861. context_desc->mss_l4len_idx = 0;
  862. i = 1;
  863. }
  864. /* put descriptor type bits */
  865. cmd_type = IXGBE_ADVTXD_DTYP_DATA |
  866. IXGBE_ADVTXD_DCMD_DEXT |
  867. IXGBE_ADVTXD_DCMD_IFCS;
  868. cmd_type |= len | IXGBE_TXD_CMD;
  869. tx_desc = IXGBEVF_TX_DESC(ring, i);
  870. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  871. tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
  872. tx_desc->read.olinfo_status =
  873. cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) |
  874. IXGBE_ADVTXD_CC);
  875. /* Avoid any potential race with cleanup */
  876. smp_wmb();
  877. /* set next_to_watch value indicating a packet is present */
  878. i++;
  879. if (i == ring->count)
  880. i = 0;
  881. tx_buffer->next_to_watch = tx_desc;
  882. ring->next_to_use = i;
  883. return IXGBEVF_XDP_TX;
  884. }
  885. static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,
  886. struct ixgbevf_ring *rx_ring,
  887. struct xdp_buff *xdp)
  888. {
  889. int result = IXGBEVF_XDP_PASS;
  890. struct ixgbevf_ring *xdp_ring;
  891. struct bpf_prog *xdp_prog;
  892. u32 act;
  893. rcu_read_lock();
  894. xdp_prog = READ_ONCE(rx_ring->xdp_prog);
  895. if (!xdp_prog)
  896. goto xdp_out;
  897. act = bpf_prog_run_xdp(xdp_prog, xdp);
  898. switch (act) {
  899. case XDP_PASS:
  900. break;
  901. case XDP_TX:
  902. xdp_ring = adapter->xdp_ring[rx_ring->queue_index];
  903. result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp);
  904. break;
  905. default:
  906. bpf_warn_invalid_xdp_action(act);
  907. /* fallthrough */
  908. case XDP_ABORTED:
  909. trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
  910. /* fallthrough -- handle aborts by dropping packet */
  911. case XDP_DROP:
  912. result = IXGBEVF_XDP_CONSUMED;
  913. break;
  914. }
  915. xdp_out:
  916. rcu_read_unlock();
  917. return ERR_PTR(-result);
  918. }
  919. static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring,
  920. struct ixgbevf_rx_buffer *rx_buffer,
  921. unsigned int size)
  922. {
  923. #if (PAGE_SIZE < 8192)
  924. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  925. rx_buffer->page_offset ^= truesize;
  926. #else
  927. unsigned int truesize = ring_uses_build_skb(rx_ring) ?
  928. SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
  929. SKB_DATA_ALIGN(size);
  930. rx_buffer->page_offset += truesize;
  931. #endif
  932. }
  933. static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
  934. struct ixgbevf_ring *rx_ring,
  935. int budget)
  936. {
  937. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  938. struct ixgbevf_adapter *adapter = q_vector->adapter;
  939. u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
  940. struct sk_buff *skb = rx_ring->skb;
  941. bool xdp_xmit = false;
  942. struct xdp_buff xdp;
  943. xdp.rxq = &rx_ring->xdp_rxq;
  944. while (likely(total_rx_packets < budget)) {
  945. struct ixgbevf_rx_buffer *rx_buffer;
  946. union ixgbe_adv_rx_desc *rx_desc;
  947. unsigned int size;
  948. /* return some buffers to hardware, one at a time is too slow */
  949. if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
  950. ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
  951. cleaned_count = 0;
  952. }
  953. rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
  954. size = le16_to_cpu(rx_desc->wb.upper.length);
  955. if (!size)
  956. break;
  957. /* This memory barrier is needed to keep us from reading
  958. * any other fields out of the rx_desc until we know the
  959. * RXD_STAT_DD bit is set
  960. */
  961. rmb();
  962. rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size);
  963. /* retrieve a buffer from the ring */
  964. if (!skb) {
  965. xdp.data = page_address(rx_buffer->page) +
  966. rx_buffer->page_offset;
  967. xdp.data_meta = xdp.data;
  968. xdp.data_hard_start = xdp.data -
  969. ixgbevf_rx_offset(rx_ring);
  970. xdp.data_end = xdp.data + size;
  971. skb = ixgbevf_run_xdp(adapter, rx_ring, &xdp);
  972. }
  973. if (IS_ERR(skb)) {
  974. if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) {
  975. xdp_xmit = true;
  976. ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,
  977. size);
  978. } else {
  979. rx_buffer->pagecnt_bias++;
  980. }
  981. total_rx_packets++;
  982. total_rx_bytes += size;
  983. } else if (skb) {
  984. ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size);
  985. } else if (ring_uses_build_skb(rx_ring)) {
  986. skb = ixgbevf_build_skb(rx_ring, rx_buffer,
  987. &xdp, rx_desc);
  988. } else {
  989. skb = ixgbevf_construct_skb(rx_ring, rx_buffer,
  990. &xdp, rx_desc);
  991. }
  992. /* exit if we failed to retrieve a buffer */
  993. if (!skb) {
  994. rx_ring->rx_stats.alloc_rx_buff_failed++;
  995. rx_buffer->pagecnt_bias++;
  996. break;
  997. }
  998. ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb);
  999. cleaned_count++;
  1000. /* fetch next buffer in frame if non-eop */
  1001. if (ixgbevf_is_non_eop(rx_ring, rx_desc))
  1002. continue;
  1003. /* verify the packet layout is correct */
  1004. if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
  1005. skb = NULL;
  1006. continue;
  1007. }
  1008. /* probably a little skewed due to removing CRC */
  1009. total_rx_bytes += skb->len;
  1010. /* Workaround hardware that can't do proper VEPA multicast
  1011. * source pruning.
  1012. */
  1013. if ((skb->pkt_type == PACKET_BROADCAST ||
  1014. skb->pkt_type == PACKET_MULTICAST) &&
  1015. ether_addr_equal(rx_ring->netdev->dev_addr,
  1016. eth_hdr(skb)->h_source)) {
  1017. dev_kfree_skb_irq(skb);
  1018. continue;
  1019. }
  1020. /* populate checksum, VLAN, and protocol */
  1021. ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
  1022. ixgbevf_rx_skb(q_vector, skb);
  1023. /* reset skb pointer */
  1024. skb = NULL;
  1025. /* update budget accounting */
  1026. total_rx_packets++;
  1027. }
  1028. /* place incomplete frames back on ring for completion */
  1029. rx_ring->skb = skb;
  1030. if (xdp_xmit) {
  1031. struct ixgbevf_ring *xdp_ring =
  1032. adapter->xdp_ring[rx_ring->queue_index];
  1033. /* Force memory writes to complete before letting h/w
  1034. * know there are new descriptors to fetch.
  1035. */
  1036. wmb();
  1037. ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use);
  1038. }
  1039. u64_stats_update_begin(&rx_ring->syncp);
  1040. rx_ring->stats.packets += total_rx_packets;
  1041. rx_ring->stats.bytes += total_rx_bytes;
  1042. u64_stats_update_end(&rx_ring->syncp);
  1043. q_vector->rx.total_packets += total_rx_packets;
  1044. q_vector->rx.total_bytes += total_rx_bytes;
  1045. return total_rx_packets;
  1046. }
  1047. /**
  1048. * ixgbevf_poll - NAPI polling calback
  1049. * @napi: napi struct with our devices info in it
  1050. * @budget: amount of work driver is allowed to do this pass, in packets
  1051. *
  1052. * This function will clean more than one or more rings associated with a
  1053. * q_vector.
  1054. **/
  1055. static int ixgbevf_poll(struct napi_struct *napi, int budget)
  1056. {
  1057. struct ixgbevf_q_vector *q_vector =
  1058. container_of(napi, struct ixgbevf_q_vector, napi);
  1059. struct ixgbevf_adapter *adapter = q_vector->adapter;
  1060. struct ixgbevf_ring *ring;
  1061. int per_ring_budget, work_done = 0;
  1062. bool clean_complete = true;
  1063. ixgbevf_for_each_ring(ring, q_vector->tx) {
  1064. if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
  1065. clean_complete = false;
  1066. }
  1067. if (budget <= 0)
  1068. return budget;
  1069. /* attempt to distribute budget to each queue fairly, but don't allow
  1070. * the budget to go below 1 because we'll exit polling
  1071. */
  1072. if (q_vector->rx.count > 1)
  1073. per_ring_budget = max(budget/q_vector->rx.count, 1);
  1074. else
  1075. per_ring_budget = budget;
  1076. ixgbevf_for_each_ring(ring, q_vector->rx) {
  1077. int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
  1078. per_ring_budget);
  1079. work_done += cleaned;
  1080. if (cleaned >= per_ring_budget)
  1081. clean_complete = false;
  1082. }
  1083. /* If all work not completed, return budget and keep polling */
  1084. if (!clean_complete)
  1085. return budget;
  1086. /* all work done, exit the polling mode */
  1087. napi_complete_done(napi, work_done);
  1088. if (adapter->rx_itr_setting == 1)
  1089. ixgbevf_set_itr(q_vector);
  1090. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  1091. !test_bit(__IXGBEVF_REMOVING, &adapter->state))
  1092. ixgbevf_irq_enable_queues(adapter,
  1093. BIT(q_vector->v_idx));
  1094. return 0;
  1095. }
  1096. /**
  1097. * ixgbevf_write_eitr - write VTEITR register in hardware specific way
  1098. * @q_vector: structure containing interrupt and ring information
  1099. **/
  1100. void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
  1101. {
  1102. struct ixgbevf_adapter *adapter = q_vector->adapter;
  1103. struct ixgbe_hw *hw = &adapter->hw;
  1104. int v_idx = q_vector->v_idx;
  1105. u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
  1106. /* set the WDIS bit to not clear the timer bits and cause an
  1107. * immediate assertion of the interrupt
  1108. */
  1109. itr_reg |= IXGBE_EITR_CNT_WDIS;
  1110. IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
  1111. }
  1112. /**
  1113. * ixgbevf_configure_msix - Configure MSI-X hardware
  1114. * @adapter: board private structure
  1115. *
  1116. * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
  1117. * interrupts.
  1118. **/
  1119. static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
  1120. {
  1121. struct ixgbevf_q_vector *q_vector;
  1122. int q_vectors, v_idx;
  1123. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1124. adapter->eims_enable_mask = 0;
  1125. /* Populate the IVAR table and set the ITR values to the
  1126. * corresponding register.
  1127. */
  1128. for (v_idx = 0; v_idx < q_vectors; v_idx++) {
  1129. struct ixgbevf_ring *ring;
  1130. q_vector = adapter->q_vector[v_idx];
  1131. ixgbevf_for_each_ring(ring, q_vector->rx)
  1132. ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
  1133. ixgbevf_for_each_ring(ring, q_vector->tx)
  1134. ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
  1135. if (q_vector->tx.ring && !q_vector->rx.ring) {
  1136. /* Tx only vector */
  1137. if (adapter->tx_itr_setting == 1)
  1138. q_vector->itr = IXGBE_12K_ITR;
  1139. else
  1140. q_vector->itr = adapter->tx_itr_setting;
  1141. } else {
  1142. /* Rx or Rx/Tx vector */
  1143. if (adapter->rx_itr_setting == 1)
  1144. q_vector->itr = IXGBE_20K_ITR;
  1145. else
  1146. q_vector->itr = adapter->rx_itr_setting;
  1147. }
  1148. /* add q_vector eims value to global eims_enable_mask */
  1149. adapter->eims_enable_mask |= BIT(v_idx);
  1150. ixgbevf_write_eitr(q_vector);
  1151. }
  1152. ixgbevf_set_ivar(adapter, -1, 1, v_idx);
  1153. /* setup eims_other and add value to global eims_enable_mask */
  1154. adapter->eims_other = BIT(v_idx);
  1155. adapter->eims_enable_mask |= adapter->eims_other;
  1156. }
  1157. enum latency_range {
  1158. lowest_latency = 0,
  1159. low_latency = 1,
  1160. bulk_latency = 2,
  1161. latency_invalid = 255
  1162. };
  1163. /**
  1164. * ixgbevf_update_itr - update the dynamic ITR value based on statistics
  1165. * @q_vector: structure containing interrupt and ring information
  1166. * @ring_container: structure containing ring performance data
  1167. *
  1168. * Stores a new ITR value based on packets and byte
  1169. * counts during the last interrupt. The advantage of per interrupt
  1170. * computation is faster updates and more accurate ITR for the current
  1171. * traffic pattern. Constants in this function were computed
  1172. * based on theoretical maximum wire speed and thresholds were set based
  1173. * on testing data as well as attempting to minimize response time
  1174. * while increasing bulk throughput.
  1175. **/
  1176. static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
  1177. struct ixgbevf_ring_container *ring_container)
  1178. {
  1179. int bytes = ring_container->total_bytes;
  1180. int packets = ring_container->total_packets;
  1181. u32 timepassed_us;
  1182. u64 bytes_perint;
  1183. u8 itr_setting = ring_container->itr;
  1184. if (packets == 0)
  1185. return;
  1186. /* simple throttle rate management
  1187. * 0-20MB/s lowest (100000 ints/s)
  1188. * 20-100MB/s low (20000 ints/s)
  1189. * 100-1249MB/s bulk (12000 ints/s)
  1190. */
  1191. /* what was last interrupt timeslice? */
  1192. timepassed_us = q_vector->itr >> 2;
  1193. bytes_perint = bytes / timepassed_us; /* bytes/usec */
  1194. switch (itr_setting) {
  1195. case lowest_latency:
  1196. if (bytes_perint > 10)
  1197. itr_setting = low_latency;
  1198. break;
  1199. case low_latency:
  1200. if (bytes_perint > 20)
  1201. itr_setting = bulk_latency;
  1202. else if (bytes_perint <= 10)
  1203. itr_setting = lowest_latency;
  1204. break;
  1205. case bulk_latency:
  1206. if (bytes_perint <= 20)
  1207. itr_setting = low_latency;
  1208. break;
  1209. }
  1210. /* clear work counters since we have the values we need */
  1211. ring_container->total_bytes = 0;
  1212. ring_container->total_packets = 0;
  1213. /* write updated itr to ring container */
  1214. ring_container->itr = itr_setting;
  1215. }
  1216. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
  1217. {
  1218. u32 new_itr = q_vector->itr;
  1219. u8 current_itr;
  1220. ixgbevf_update_itr(q_vector, &q_vector->tx);
  1221. ixgbevf_update_itr(q_vector, &q_vector->rx);
  1222. current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
  1223. switch (current_itr) {
  1224. /* counts and packets in update_itr are dependent on these numbers */
  1225. case lowest_latency:
  1226. new_itr = IXGBE_100K_ITR;
  1227. break;
  1228. case low_latency:
  1229. new_itr = IXGBE_20K_ITR;
  1230. break;
  1231. case bulk_latency:
  1232. new_itr = IXGBE_12K_ITR;
  1233. break;
  1234. default:
  1235. break;
  1236. }
  1237. if (new_itr != q_vector->itr) {
  1238. /* do an exponential smoothing */
  1239. new_itr = (10 * new_itr * q_vector->itr) /
  1240. ((9 * new_itr) + q_vector->itr);
  1241. /* save the algorithm value here */
  1242. q_vector->itr = new_itr;
  1243. ixgbevf_write_eitr(q_vector);
  1244. }
  1245. }
  1246. static irqreturn_t ixgbevf_msix_other(int irq, void *data)
  1247. {
  1248. struct ixgbevf_adapter *adapter = data;
  1249. struct ixgbe_hw *hw = &adapter->hw;
  1250. hw->mac.get_link_status = 1;
  1251. ixgbevf_service_event_schedule(adapter);
  1252. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
  1253. return IRQ_HANDLED;
  1254. }
  1255. /**
  1256. * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
  1257. * @irq: unused
  1258. * @data: pointer to our q_vector struct for this interrupt vector
  1259. **/
  1260. static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
  1261. {
  1262. struct ixgbevf_q_vector *q_vector = data;
  1263. /* EIAM disabled interrupts (on this vector) for us */
  1264. if (q_vector->rx.ring || q_vector->tx.ring)
  1265. napi_schedule_irqoff(&q_vector->napi);
  1266. return IRQ_HANDLED;
  1267. }
  1268. /**
  1269. * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
  1270. * @adapter: board private structure
  1271. *
  1272. * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
  1273. * interrupts from the kernel.
  1274. **/
  1275. static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
  1276. {
  1277. struct net_device *netdev = adapter->netdev;
  1278. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1279. unsigned int ri = 0, ti = 0;
  1280. int vector, err;
  1281. for (vector = 0; vector < q_vectors; vector++) {
  1282. struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
  1283. struct msix_entry *entry = &adapter->msix_entries[vector];
  1284. if (q_vector->tx.ring && q_vector->rx.ring) {
  1285. snprintf(q_vector->name, sizeof(q_vector->name),
  1286. "%s-TxRx-%u", netdev->name, ri++);
  1287. ti++;
  1288. } else if (q_vector->rx.ring) {
  1289. snprintf(q_vector->name, sizeof(q_vector->name),
  1290. "%s-rx-%u", netdev->name, ri++);
  1291. } else if (q_vector->tx.ring) {
  1292. snprintf(q_vector->name, sizeof(q_vector->name),
  1293. "%s-tx-%u", netdev->name, ti++);
  1294. } else {
  1295. /* skip this unused q_vector */
  1296. continue;
  1297. }
  1298. err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
  1299. q_vector->name, q_vector);
  1300. if (err) {
  1301. hw_dbg(&adapter->hw,
  1302. "request_irq failed for MSIX interrupt Error: %d\n",
  1303. err);
  1304. goto free_queue_irqs;
  1305. }
  1306. }
  1307. err = request_irq(adapter->msix_entries[vector].vector,
  1308. &ixgbevf_msix_other, 0, netdev->name, adapter);
  1309. if (err) {
  1310. hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
  1311. err);
  1312. goto free_queue_irqs;
  1313. }
  1314. return 0;
  1315. free_queue_irqs:
  1316. while (vector) {
  1317. vector--;
  1318. free_irq(adapter->msix_entries[vector].vector,
  1319. adapter->q_vector[vector]);
  1320. }
  1321. /* This failure is non-recoverable - it indicates the system is
  1322. * out of MSIX vector resources and the VF driver cannot run
  1323. * without them. Set the number of msix vectors to zero
  1324. * indicating that not enough can be allocated. The error
  1325. * will be returned to the user indicating device open failed.
  1326. * Any further attempts to force the driver to open will also
  1327. * fail. The only way to recover is to unload the driver and
  1328. * reload it again. If the system has recovered some MSIX
  1329. * vectors then it may succeed.
  1330. */
  1331. adapter->num_msix_vectors = 0;
  1332. return err;
  1333. }
  1334. /**
  1335. * ixgbevf_request_irq - initialize interrupts
  1336. * @adapter: board private structure
  1337. *
  1338. * Attempts to configure interrupts using the best available
  1339. * capabilities of the hardware and kernel.
  1340. **/
  1341. static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
  1342. {
  1343. int err = ixgbevf_request_msix_irqs(adapter);
  1344. if (err)
  1345. hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
  1346. return err;
  1347. }
  1348. static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
  1349. {
  1350. int i, q_vectors;
  1351. if (!adapter->msix_entries)
  1352. return;
  1353. q_vectors = adapter->num_msix_vectors;
  1354. i = q_vectors - 1;
  1355. free_irq(adapter->msix_entries[i].vector, adapter);
  1356. i--;
  1357. for (; i >= 0; i--) {
  1358. /* free only the irqs that were actually requested */
  1359. if (!adapter->q_vector[i]->rx.ring &&
  1360. !adapter->q_vector[i]->tx.ring)
  1361. continue;
  1362. free_irq(adapter->msix_entries[i].vector,
  1363. adapter->q_vector[i]);
  1364. }
  1365. }
  1366. /**
  1367. * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
  1368. * @adapter: board private structure
  1369. **/
  1370. static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
  1371. {
  1372. struct ixgbe_hw *hw = &adapter->hw;
  1373. int i;
  1374. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
  1375. IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
  1376. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
  1377. IXGBE_WRITE_FLUSH(hw);
  1378. for (i = 0; i < adapter->num_msix_vectors; i++)
  1379. synchronize_irq(adapter->msix_entries[i].vector);
  1380. }
  1381. /**
  1382. * ixgbevf_irq_enable - Enable default interrupt generation settings
  1383. * @adapter: board private structure
  1384. **/
  1385. static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
  1386. {
  1387. struct ixgbe_hw *hw = &adapter->hw;
  1388. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
  1389. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
  1390. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
  1391. }
  1392. /**
  1393. * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
  1394. * @adapter: board private structure
  1395. * @ring: structure containing ring specific data
  1396. *
  1397. * Configure the Tx descriptor ring after a reset.
  1398. **/
  1399. static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
  1400. struct ixgbevf_ring *ring)
  1401. {
  1402. struct ixgbe_hw *hw = &adapter->hw;
  1403. u64 tdba = ring->dma;
  1404. int wait_loop = 10;
  1405. u32 txdctl = IXGBE_TXDCTL_ENABLE;
  1406. u8 reg_idx = ring->reg_idx;
  1407. /* disable queue to avoid issues while updating state */
  1408. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
  1409. IXGBE_WRITE_FLUSH(hw);
  1410. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
  1411. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
  1412. IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
  1413. ring->count * sizeof(union ixgbe_adv_tx_desc));
  1414. /* disable head writeback */
  1415. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
  1416. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
  1417. /* enable relaxed ordering */
  1418. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
  1419. (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
  1420. IXGBE_DCA_TXCTRL_DATA_RRO_EN));
  1421. /* reset head and tail pointers */
  1422. IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
  1423. IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
  1424. ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
  1425. /* reset ntu and ntc to place SW in sync with hardwdare */
  1426. ring->next_to_clean = 0;
  1427. ring->next_to_use = 0;
  1428. /* In order to avoid issues WTHRESH + PTHRESH should always be equal
  1429. * to or less than the number of on chip descriptors, which is
  1430. * currently 40.
  1431. */
  1432. txdctl |= (8 << 16); /* WTHRESH = 8 */
  1433. /* Setting PTHRESH to 32 both improves performance */
  1434. txdctl |= (1u << 8) | /* HTHRESH = 1 */
  1435. 32; /* PTHRESH = 32 */
  1436. /* reinitialize tx_buffer_info */
  1437. memset(ring->tx_buffer_info, 0,
  1438. sizeof(struct ixgbevf_tx_buffer) * ring->count);
  1439. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
  1440. clear_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
  1441. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
  1442. /* poll to verify queue is enabled */
  1443. do {
  1444. usleep_range(1000, 2000);
  1445. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
  1446. } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
  1447. if (!wait_loop)
  1448. hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
  1449. }
  1450. /**
  1451. * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
  1452. * @adapter: board private structure
  1453. *
  1454. * Configure the Tx unit of the MAC after a reset.
  1455. **/
  1456. static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
  1457. {
  1458. u32 i;
  1459. /* Setup the HW Tx Head and Tail descriptor pointers */
  1460. for (i = 0; i < adapter->num_tx_queues; i++)
  1461. ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
  1462. for (i = 0; i < adapter->num_xdp_queues; i++)
  1463. ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]);
  1464. }
  1465. #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
  1466. static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter,
  1467. struct ixgbevf_ring *ring, int index)
  1468. {
  1469. struct ixgbe_hw *hw = &adapter->hw;
  1470. u32 srrctl;
  1471. srrctl = IXGBE_SRRCTL_DROP_EN;
  1472. srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
  1473. if (ring_uses_large_buffer(ring))
  1474. srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  1475. else
  1476. srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  1477. srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
  1478. IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
  1479. }
  1480. static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
  1481. {
  1482. struct ixgbe_hw *hw = &adapter->hw;
  1483. /* PSRTYPE must be initialized in 82599 */
  1484. u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
  1485. IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
  1486. IXGBE_PSRTYPE_L2HDR;
  1487. if (adapter->num_rx_queues > 1)
  1488. psrtype |= BIT(29);
  1489. IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
  1490. }
  1491. #define IXGBEVF_MAX_RX_DESC_POLL 10
  1492. static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
  1493. struct ixgbevf_ring *ring)
  1494. {
  1495. struct ixgbe_hw *hw = &adapter->hw;
  1496. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1497. u32 rxdctl;
  1498. u8 reg_idx = ring->reg_idx;
  1499. if (IXGBE_REMOVED(hw->hw_addr))
  1500. return;
  1501. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1502. rxdctl &= ~IXGBE_RXDCTL_ENABLE;
  1503. /* write value back with RXDCTL.ENABLE bit cleared */
  1504. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1505. /* the hardware may take up to 100us to really disable the Rx queue */
  1506. do {
  1507. udelay(10);
  1508. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1509. } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
  1510. if (!wait_loop)
  1511. pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
  1512. reg_idx);
  1513. }
  1514. static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
  1515. struct ixgbevf_ring *ring)
  1516. {
  1517. struct ixgbe_hw *hw = &adapter->hw;
  1518. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1519. u32 rxdctl;
  1520. u8 reg_idx = ring->reg_idx;
  1521. if (IXGBE_REMOVED(hw->hw_addr))
  1522. return;
  1523. do {
  1524. usleep_range(1000, 2000);
  1525. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1526. } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
  1527. if (!wait_loop)
  1528. pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
  1529. reg_idx);
  1530. }
  1531. /**
  1532. * ixgbevf_init_rss_key - Initialize adapter RSS key
  1533. * @adapter: device handle
  1534. *
  1535. * Allocates and initializes the RSS key if it is not allocated.
  1536. **/
  1537. static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
  1538. {
  1539. u32 *rss_key;
  1540. if (!adapter->rss_key) {
  1541. rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
  1542. if (unlikely(!rss_key))
  1543. return -ENOMEM;
  1544. netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
  1545. adapter->rss_key = rss_key;
  1546. }
  1547. return 0;
  1548. }
  1549. static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
  1550. {
  1551. struct ixgbe_hw *hw = &adapter->hw;
  1552. u32 vfmrqc = 0, vfreta = 0;
  1553. u16 rss_i = adapter->num_rx_queues;
  1554. u8 i, j;
  1555. /* Fill out hash function seeds */
  1556. for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
  1557. IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
  1558. for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
  1559. if (j == rss_i)
  1560. j = 0;
  1561. adapter->rss_indir_tbl[i] = j;
  1562. vfreta |= j << (i & 0x3) * 8;
  1563. if ((i & 3) == 3) {
  1564. IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
  1565. vfreta = 0;
  1566. }
  1567. }
  1568. /* Perform hash on these packet types */
  1569. vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
  1570. IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
  1571. IXGBE_VFMRQC_RSS_FIELD_IPV6 |
  1572. IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
  1573. vfmrqc |= IXGBE_VFMRQC_RSSEN;
  1574. IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
  1575. }
  1576. static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
  1577. struct ixgbevf_ring *ring)
  1578. {
  1579. struct ixgbe_hw *hw = &adapter->hw;
  1580. union ixgbe_adv_rx_desc *rx_desc;
  1581. u64 rdba = ring->dma;
  1582. u32 rxdctl;
  1583. u8 reg_idx = ring->reg_idx;
  1584. /* disable queue to avoid issues while updating state */
  1585. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1586. ixgbevf_disable_rx_queue(adapter, ring);
  1587. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
  1588. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
  1589. IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
  1590. ring->count * sizeof(union ixgbe_adv_rx_desc));
  1591. #ifndef CONFIG_SPARC
  1592. /* enable relaxed ordering */
  1593. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
  1594. IXGBE_DCA_RXCTRL_DESC_RRO_EN);
  1595. #else
  1596. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
  1597. IXGBE_DCA_RXCTRL_DESC_RRO_EN |
  1598. IXGBE_DCA_RXCTRL_DATA_WRO_EN);
  1599. #endif
  1600. /* reset head and tail pointers */
  1601. IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
  1602. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
  1603. ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
  1604. /* initialize rx_buffer_info */
  1605. memset(ring->rx_buffer_info, 0,
  1606. sizeof(struct ixgbevf_rx_buffer) * ring->count);
  1607. /* initialize Rx descriptor 0 */
  1608. rx_desc = IXGBEVF_RX_DESC(ring, 0);
  1609. rx_desc->wb.upper.length = 0;
  1610. /* reset ntu and ntc to place SW in sync with hardwdare */
  1611. ring->next_to_clean = 0;
  1612. ring->next_to_use = 0;
  1613. ring->next_to_alloc = 0;
  1614. ixgbevf_configure_srrctl(adapter, ring, reg_idx);
  1615. /* RXDCTL.RLPML does not work on 82599 */
  1616. if (adapter->hw.mac.type != ixgbe_mac_82599_vf) {
  1617. rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
  1618. IXGBE_RXDCTL_RLPML_EN);
  1619. #if (PAGE_SIZE < 8192)
  1620. /* Limit the maximum frame size so we don't overrun the skb */
  1621. if (ring_uses_build_skb(ring) &&
  1622. !ring_uses_large_buffer(ring))
  1623. rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB |
  1624. IXGBE_RXDCTL_RLPML_EN;
  1625. #endif
  1626. }
  1627. rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
  1628. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1629. ixgbevf_rx_desc_queue_enable(adapter, ring);
  1630. ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
  1631. }
  1632. static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter,
  1633. struct ixgbevf_ring *rx_ring)
  1634. {
  1635. struct net_device *netdev = adapter->netdev;
  1636. unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  1637. /* set build_skb and buffer size flags */
  1638. clear_ring_build_skb_enabled(rx_ring);
  1639. clear_ring_uses_large_buffer(rx_ring);
  1640. if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
  1641. return;
  1642. set_ring_build_skb_enabled(rx_ring);
  1643. if (PAGE_SIZE < 8192) {
  1644. if (max_frame <= IXGBEVF_MAX_FRAME_BUILD_SKB)
  1645. return;
  1646. set_ring_uses_large_buffer(rx_ring);
  1647. }
  1648. }
  1649. /**
  1650. * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
  1651. * @adapter: board private structure
  1652. *
  1653. * Configure the Rx unit of the MAC after a reset.
  1654. **/
  1655. static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
  1656. {
  1657. struct ixgbe_hw *hw = &adapter->hw;
  1658. struct net_device *netdev = adapter->netdev;
  1659. int i, ret;
  1660. ixgbevf_setup_psrtype(adapter);
  1661. if (hw->mac.type >= ixgbe_mac_X550_vf)
  1662. ixgbevf_setup_vfmrqc(adapter);
  1663. spin_lock_bh(&adapter->mbx_lock);
  1664. /* notify the PF of our intent to use this size of frame */
  1665. ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
  1666. spin_unlock_bh(&adapter->mbx_lock);
  1667. if (ret)
  1668. dev_err(&adapter->pdev->dev,
  1669. "Failed to set MTU at %d\n", netdev->mtu);
  1670. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1671. * the Base and Length of the Rx Descriptor Ring
  1672. */
  1673. for (i = 0; i < adapter->num_rx_queues; i++) {
  1674. struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
  1675. ixgbevf_set_rx_buffer_len(adapter, rx_ring);
  1676. ixgbevf_configure_rx_ring(adapter, rx_ring);
  1677. }
  1678. }
  1679. static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
  1680. __be16 proto, u16 vid)
  1681. {
  1682. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1683. struct ixgbe_hw *hw = &adapter->hw;
  1684. int err;
  1685. spin_lock_bh(&adapter->mbx_lock);
  1686. /* add VID to filter table */
  1687. err = hw->mac.ops.set_vfta(hw, vid, 0, true);
  1688. spin_unlock_bh(&adapter->mbx_lock);
  1689. /* translate error return types so error makes sense */
  1690. if (err == IXGBE_ERR_MBX)
  1691. return -EIO;
  1692. if (err == IXGBE_ERR_INVALID_ARGUMENT)
  1693. return -EACCES;
  1694. set_bit(vid, adapter->active_vlans);
  1695. return err;
  1696. }
  1697. static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
  1698. __be16 proto, u16 vid)
  1699. {
  1700. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1701. struct ixgbe_hw *hw = &adapter->hw;
  1702. int err;
  1703. spin_lock_bh(&adapter->mbx_lock);
  1704. /* remove VID from filter table */
  1705. err = hw->mac.ops.set_vfta(hw, vid, 0, false);
  1706. spin_unlock_bh(&adapter->mbx_lock);
  1707. clear_bit(vid, adapter->active_vlans);
  1708. return err;
  1709. }
  1710. static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
  1711. {
  1712. u16 vid;
  1713. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  1714. ixgbevf_vlan_rx_add_vid(adapter->netdev,
  1715. htons(ETH_P_8021Q), vid);
  1716. }
  1717. static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
  1718. {
  1719. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1720. struct ixgbe_hw *hw = &adapter->hw;
  1721. int count = 0;
  1722. if (!netdev_uc_empty(netdev)) {
  1723. struct netdev_hw_addr *ha;
  1724. netdev_for_each_uc_addr(ha, netdev) {
  1725. hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
  1726. udelay(200);
  1727. }
  1728. } else {
  1729. /* If the list is empty then send message to PF driver to
  1730. * clear all MAC VLANs on this VF.
  1731. */
  1732. hw->mac.ops.set_uc_addr(hw, 0, NULL);
  1733. }
  1734. return count;
  1735. }
  1736. /**
  1737. * ixgbevf_set_rx_mode - Multicast and unicast set
  1738. * @netdev: network interface device structure
  1739. *
  1740. * The set_rx_method entry point is called whenever the multicast address
  1741. * list, unicast address list or the network interface flags are updated.
  1742. * This routine is responsible for configuring the hardware for proper
  1743. * multicast mode and configuring requested unicast filters.
  1744. **/
  1745. static void ixgbevf_set_rx_mode(struct net_device *netdev)
  1746. {
  1747. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1748. struct ixgbe_hw *hw = &adapter->hw;
  1749. unsigned int flags = netdev->flags;
  1750. int xcast_mode;
  1751. /* request the most inclusive mode we need */
  1752. if (flags & IFF_PROMISC)
  1753. xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
  1754. else if (flags & IFF_ALLMULTI)
  1755. xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
  1756. else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
  1757. xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
  1758. else
  1759. xcast_mode = IXGBEVF_XCAST_MODE_NONE;
  1760. spin_lock_bh(&adapter->mbx_lock);
  1761. hw->mac.ops.update_xcast_mode(hw, xcast_mode);
  1762. /* reprogram multicast list */
  1763. hw->mac.ops.update_mc_addr_list(hw, netdev);
  1764. ixgbevf_write_uc_addr_list(netdev);
  1765. spin_unlock_bh(&adapter->mbx_lock);
  1766. }
  1767. static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
  1768. {
  1769. int q_idx;
  1770. struct ixgbevf_q_vector *q_vector;
  1771. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1772. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1773. q_vector = adapter->q_vector[q_idx];
  1774. napi_enable(&q_vector->napi);
  1775. }
  1776. }
  1777. static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
  1778. {
  1779. int q_idx;
  1780. struct ixgbevf_q_vector *q_vector;
  1781. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1782. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1783. q_vector = adapter->q_vector[q_idx];
  1784. napi_disable(&q_vector->napi);
  1785. }
  1786. }
  1787. static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
  1788. {
  1789. struct ixgbe_hw *hw = &adapter->hw;
  1790. unsigned int def_q = 0;
  1791. unsigned int num_tcs = 0;
  1792. unsigned int num_rx_queues = adapter->num_rx_queues;
  1793. unsigned int num_tx_queues = adapter->num_tx_queues;
  1794. int err;
  1795. spin_lock_bh(&adapter->mbx_lock);
  1796. /* fetch queue configuration from the PF */
  1797. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  1798. spin_unlock_bh(&adapter->mbx_lock);
  1799. if (err)
  1800. return err;
  1801. if (num_tcs > 1) {
  1802. /* we need only one Tx queue */
  1803. num_tx_queues = 1;
  1804. /* update default Tx ring register index */
  1805. adapter->tx_ring[0]->reg_idx = def_q;
  1806. /* we need as many queues as traffic classes */
  1807. num_rx_queues = num_tcs;
  1808. }
  1809. /* if we have a bad config abort request queue reset */
  1810. if ((adapter->num_rx_queues != num_rx_queues) ||
  1811. (adapter->num_tx_queues != num_tx_queues)) {
  1812. /* force mailbox timeout to prevent further messages */
  1813. hw->mbx.timeout = 0;
  1814. /* wait for watchdog to come around and bail us out */
  1815. set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
  1816. }
  1817. return 0;
  1818. }
  1819. static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
  1820. {
  1821. ixgbevf_configure_dcb(adapter);
  1822. ixgbevf_set_rx_mode(adapter->netdev);
  1823. ixgbevf_restore_vlan(adapter);
  1824. ixgbevf_configure_tx(adapter);
  1825. ixgbevf_configure_rx(adapter);
  1826. }
  1827. static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
  1828. {
  1829. /* Only save pre-reset stats if there are some */
  1830. if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
  1831. adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
  1832. adapter->stats.base_vfgprc;
  1833. adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
  1834. adapter->stats.base_vfgptc;
  1835. adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
  1836. adapter->stats.base_vfgorc;
  1837. adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
  1838. adapter->stats.base_vfgotc;
  1839. adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
  1840. adapter->stats.base_vfmprc;
  1841. }
  1842. }
  1843. static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
  1844. {
  1845. struct ixgbe_hw *hw = &adapter->hw;
  1846. adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
  1847. adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
  1848. adapter->stats.last_vfgorc |=
  1849. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
  1850. adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
  1851. adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
  1852. adapter->stats.last_vfgotc |=
  1853. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
  1854. adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
  1855. adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
  1856. adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
  1857. adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
  1858. adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
  1859. adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
  1860. }
  1861. static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
  1862. {
  1863. struct ixgbe_hw *hw = &adapter->hw;
  1864. int api[] = { ixgbe_mbox_api_13,
  1865. ixgbe_mbox_api_12,
  1866. ixgbe_mbox_api_11,
  1867. ixgbe_mbox_api_10,
  1868. ixgbe_mbox_api_unknown };
  1869. int err, idx = 0;
  1870. spin_lock_bh(&adapter->mbx_lock);
  1871. while (api[idx] != ixgbe_mbox_api_unknown) {
  1872. err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
  1873. if (!err)
  1874. break;
  1875. idx++;
  1876. }
  1877. spin_unlock_bh(&adapter->mbx_lock);
  1878. }
  1879. static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
  1880. {
  1881. struct net_device *netdev = adapter->netdev;
  1882. struct ixgbe_hw *hw = &adapter->hw;
  1883. ixgbevf_configure_msix(adapter);
  1884. spin_lock_bh(&adapter->mbx_lock);
  1885. if (is_valid_ether_addr(hw->mac.addr))
  1886. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  1887. else
  1888. hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
  1889. spin_unlock_bh(&adapter->mbx_lock);
  1890. smp_mb__before_atomic();
  1891. clear_bit(__IXGBEVF_DOWN, &adapter->state);
  1892. ixgbevf_napi_enable_all(adapter);
  1893. /* clear any pending interrupts, may auto mask */
  1894. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  1895. ixgbevf_irq_enable(adapter);
  1896. /* enable transmits */
  1897. netif_tx_start_all_queues(netdev);
  1898. ixgbevf_save_reset_stats(adapter);
  1899. ixgbevf_init_last_counter_stats(adapter);
  1900. hw->mac.get_link_status = 1;
  1901. mod_timer(&adapter->service_timer, jiffies);
  1902. }
  1903. void ixgbevf_up(struct ixgbevf_adapter *adapter)
  1904. {
  1905. ixgbevf_configure(adapter);
  1906. ixgbevf_up_complete(adapter);
  1907. }
  1908. /**
  1909. * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
  1910. * @rx_ring: ring to free buffers from
  1911. **/
  1912. static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
  1913. {
  1914. u16 i = rx_ring->next_to_clean;
  1915. /* Free Rx ring sk_buff */
  1916. if (rx_ring->skb) {
  1917. dev_kfree_skb(rx_ring->skb);
  1918. rx_ring->skb = NULL;
  1919. }
  1920. /* Free all the Rx ring pages */
  1921. while (i != rx_ring->next_to_alloc) {
  1922. struct ixgbevf_rx_buffer *rx_buffer;
  1923. rx_buffer = &rx_ring->rx_buffer_info[i];
  1924. /* Invalidate cache lines that may have been written to by
  1925. * device so that we avoid corrupting memory.
  1926. */
  1927. dma_sync_single_range_for_cpu(rx_ring->dev,
  1928. rx_buffer->dma,
  1929. rx_buffer->page_offset,
  1930. ixgbevf_rx_bufsz(rx_ring),
  1931. DMA_FROM_DEVICE);
  1932. /* free resources associated with mapping */
  1933. dma_unmap_page_attrs(rx_ring->dev,
  1934. rx_buffer->dma,
  1935. ixgbevf_rx_pg_size(rx_ring),
  1936. DMA_FROM_DEVICE,
  1937. IXGBEVF_RX_DMA_ATTR);
  1938. __page_frag_cache_drain(rx_buffer->page,
  1939. rx_buffer->pagecnt_bias);
  1940. i++;
  1941. if (i == rx_ring->count)
  1942. i = 0;
  1943. }
  1944. rx_ring->next_to_alloc = 0;
  1945. rx_ring->next_to_clean = 0;
  1946. rx_ring->next_to_use = 0;
  1947. }
  1948. /**
  1949. * ixgbevf_clean_tx_ring - Free Tx Buffers
  1950. * @tx_ring: ring to be cleaned
  1951. **/
  1952. static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
  1953. {
  1954. u16 i = tx_ring->next_to_clean;
  1955. struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
  1956. while (i != tx_ring->next_to_use) {
  1957. union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
  1958. /* Free all the Tx ring sk_buffs */
  1959. if (ring_is_xdp(tx_ring))
  1960. page_frag_free(tx_buffer->data);
  1961. else
  1962. dev_kfree_skb_any(tx_buffer->skb);
  1963. /* unmap skb header data */
  1964. dma_unmap_single(tx_ring->dev,
  1965. dma_unmap_addr(tx_buffer, dma),
  1966. dma_unmap_len(tx_buffer, len),
  1967. DMA_TO_DEVICE);
  1968. /* check for eop_desc to determine the end of the packet */
  1969. eop_desc = tx_buffer->next_to_watch;
  1970. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  1971. /* unmap remaining buffers */
  1972. while (tx_desc != eop_desc) {
  1973. tx_buffer++;
  1974. tx_desc++;
  1975. i++;
  1976. if (unlikely(i == tx_ring->count)) {
  1977. i = 0;
  1978. tx_buffer = tx_ring->tx_buffer_info;
  1979. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  1980. }
  1981. /* unmap any remaining paged data */
  1982. if (dma_unmap_len(tx_buffer, len))
  1983. dma_unmap_page(tx_ring->dev,
  1984. dma_unmap_addr(tx_buffer, dma),
  1985. dma_unmap_len(tx_buffer, len),
  1986. DMA_TO_DEVICE);
  1987. }
  1988. /* move us one more past the eop_desc for start of next pkt */
  1989. tx_buffer++;
  1990. i++;
  1991. if (unlikely(i == tx_ring->count)) {
  1992. i = 0;
  1993. tx_buffer = tx_ring->tx_buffer_info;
  1994. }
  1995. }
  1996. /* reset next_to_use and next_to_clean */
  1997. tx_ring->next_to_use = 0;
  1998. tx_ring->next_to_clean = 0;
  1999. }
  2000. /**
  2001. * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
  2002. * @adapter: board private structure
  2003. **/
  2004. static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
  2005. {
  2006. int i;
  2007. for (i = 0; i < adapter->num_rx_queues; i++)
  2008. ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
  2009. }
  2010. /**
  2011. * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
  2012. * @adapter: board private structure
  2013. **/
  2014. static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
  2015. {
  2016. int i;
  2017. for (i = 0; i < adapter->num_tx_queues; i++)
  2018. ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
  2019. for (i = 0; i < adapter->num_xdp_queues; i++)
  2020. ixgbevf_clean_tx_ring(adapter->xdp_ring[i]);
  2021. }
  2022. void ixgbevf_down(struct ixgbevf_adapter *adapter)
  2023. {
  2024. struct net_device *netdev = adapter->netdev;
  2025. struct ixgbe_hw *hw = &adapter->hw;
  2026. int i;
  2027. /* signal that we are down to the interrupt handler */
  2028. if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
  2029. return; /* do nothing if already down */
  2030. /* disable all enabled Rx queues */
  2031. for (i = 0; i < adapter->num_rx_queues; i++)
  2032. ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
  2033. usleep_range(10000, 20000);
  2034. netif_tx_stop_all_queues(netdev);
  2035. /* call carrier off first to avoid false dev_watchdog timeouts */
  2036. netif_carrier_off(netdev);
  2037. netif_tx_disable(netdev);
  2038. ixgbevf_irq_disable(adapter);
  2039. ixgbevf_napi_disable_all(adapter);
  2040. del_timer_sync(&adapter->service_timer);
  2041. /* disable transmits in the hardware now that interrupts are off */
  2042. for (i = 0; i < adapter->num_tx_queues; i++) {
  2043. u8 reg_idx = adapter->tx_ring[i]->reg_idx;
  2044. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
  2045. IXGBE_TXDCTL_SWFLSH);
  2046. }
  2047. for (i = 0; i < adapter->num_xdp_queues; i++) {
  2048. u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
  2049. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
  2050. IXGBE_TXDCTL_SWFLSH);
  2051. }
  2052. if (!pci_channel_offline(adapter->pdev))
  2053. ixgbevf_reset(adapter);
  2054. ixgbevf_clean_all_tx_rings(adapter);
  2055. ixgbevf_clean_all_rx_rings(adapter);
  2056. }
  2057. void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
  2058. {
  2059. WARN_ON(in_interrupt());
  2060. while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
  2061. msleep(1);
  2062. ixgbevf_down(adapter);
  2063. ixgbevf_up(adapter);
  2064. clear_bit(__IXGBEVF_RESETTING, &adapter->state);
  2065. }
  2066. void ixgbevf_reset(struct ixgbevf_adapter *adapter)
  2067. {
  2068. struct ixgbe_hw *hw = &adapter->hw;
  2069. struct net_device *netdev = adapter->netdev;
  2070. if (hw->mac.ops.reset_hw(hw)) {
  2071. hw_dbg(hw, "PF still resetting\n");
  2072. } else {
  2073. hw->mac.ops.init_hw(hw);
  2074. ixgbevf_negotiate_api(adapter);
  2075. }
  2076. if (is_valid_ether_addr(adapter->hw.mac.addr)) {
  2077. ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
  2078. ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
  2079. }
  2080. adapter->last_reset = jiffies;
  2081. }
  2082. static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
  2083. int vectors)
  2084. {
  2085. int vector_threshold;
  2086. /* We'll want at least 2 (vector_threshold):
  2087. * 1) TxQ[0] + RxQ[0] handler
  2088. * 2) Other (Link Status Change, etc.)
  2089. */
  2090. vector_threshold = MIN_MSIX_COUNT;
  2091. /* The more we get, the more we will assign to Tx/Rx Cleanup
  2092. * for the separate queues...where Rx Cleanup >= Tx Cleanup.
  2093. * Right now, we simply care about how many we'll get; we'll
  2094. * set them up later while requesting irq's.
  2095. */
  2096. vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  2097. vector_threshold, vectors);
  2098. if (vectors < 0) {
  2099. dev_err(&adapter->pdev->dev,
  2100. "Unable to allocate MSI-X interrupts\n");
  2101. kfree(adapter->msix_entries);
  2102. adapter->msix_entries = NULL;
  2103. return vectors;
  2104. }
  2105. /* Adjust for only the vectors we'll use, which is minimum
  2106. * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
  2107. * vectors we were allocated.
  2108. */
  2109. adapter->num_msix_vectors = vectors;
  2110. return 0;
  2111. }
  2112. /**
  2113. * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
  2114. * @adapter: board private structure to initialize
  2115. *
  2116. * This is the top level queue allocation routine. The order here is very
  2117. * important, starting with the "most" number of features turned on at once,
  2118. * and ending with the smallest set of features. This way large combinations
  2119. * can be allocated if they're turned on, and smaller combinations are the
  2120. * fallthrough conditions.
  2121. *
  2122. **/
  2123. static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
  2124. {
  2125. struct ixgbe_hw *hw = &adapter->hw;
  2126. unsigned int def_q = 0;
  2127. unsigned int num_tcs = 0;
  2128. int err;
  2129. /* Start with base case */
  2130. adapter->num_rx_queues = 1;
  2131. adapter->num_tx_queues = 1;
  2132. adapter->num_xdp_queues = 0;
  2133. spin_lock_bh(&adapter->mbx_lock);
  2134. /* fetch queue configuration from the PF */
  2135. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  2136. spin_unlock_bh(&adapter->mbx_lock);
  2137. if (err)
  2138. return;
  2139. /* we need as many queues as traffic classes */
  2140. if (num_tcs > 1) {
  2141. adapter->num_rx_queues = num_tcs;
  2142. } else {
  2143. u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
  2144. switch (hw->api_version) {
  2145. case ixgbe_mbox_api_11:
  2146. case ixgbe_mbox_api_12:
  2147. case ixgbe_mbox_api_13:
  2148. if (adapter->xdp_prog &&
  2149. hw->mac.max_tx_queues == rss)
  2150. rss = rss > 3 ? 2 : 1;
  2151. adapter->num_rx_queues = rss;
  2152. adapter->num_tx_queues = rss;
  2153. adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0;
  2154. default:
  2155. break;
  2156. }
  2157. }
  2158. }
  2159. /**
  2160. * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
  2161. * @adapter: board private structure to initialize
  2162. *
  2163. * Attempt to configure the interrupts using the best available
  2164. * capabilities of the hardware and the kernel.
  2165. **/
  2166. static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
  2167. {
  2168. int vector, v_budget;
  2169. /* It's easy to be greedy for MSI-X vectors, but it really
  2170. * doesn't do us much good if we have a lot more vectors
  2171. * than CPU's. So let's be conservative and only ask for
  2172. * (roughly) the same number of vectors as there are CPU's.
  2173. * The default is to use pairs of vectors.
  2174. */
  2175. v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
  2176. v_budget = min_t(int, v_budget, num_online_cpus());
  2177. v_budget += NON_Q_VECTORS;
  2178. adapter->msix_entries = kcalloc(v_budget,
  2179. sizeof(struct msix_entry), GFP_KERNEL);
  2180. if (!adapter->msix_entries)
  2181. return -ENOMEM;
  2182. for (vector = 0; vector < v_budget; vector++)
  2183. adapter->msix_entries[vector].entry = vector;
  2184. /* A failure in MSI-X entry allocation isn't fatal, but the VF driver
  2185. * does not support any other modes, so we will simply fail here. Note
  2186. * that we clean up the msix_entries pointer else-where.
  2187. */
  2188. return ixgbevf_acquire_msix_vectors(adapter, v_budget);
  2189. }
  2190. static void ixgbevf_add_ring(struct ixgbevf_ring *ring,
  2191. struct ixgbevf_ring_container *head)
  2192. {
  2193. ring->next = head->ring;
  2194. head->ring = ring;
  2195. head->count++;
  2196. }
  2197. /**
  2198. * ixgbevf_alloc_q_vector - Allocate memory for a single interrupt vector
  2199. * @adapter: board private structure to initialize
  2200. * @v_idx: index of vector in adapter struct
  2201. * @txr_count: number of Tx rings for q vector
  2202. * @txr_idx: index of first Tx ring to assign
  2203. * @xdp_count: total number of XDP rings to allocate
  2204. * @xdp_idx: index of first XDP ring to allocate
  2205. * @rxr_count: number of Rx rings for q vector
  2206. * @rxr_idx: index of first Rx ring to assign
  2207. *
  2208. * We allocate one q_vector. If allocation fails we return -ENOMEM.
  2209. **/
  2210. static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx,
  2211. int txr_count, int txr_idx,
  2212. int xdp_count, int xdp_idx,
  2213. int rxr_count, int rxr_idx)
  2214. {
  2215. struct ixgbevf_q_vector *q_vector;
  2216. int reg_idx = txr_idx + xdp_idx;
  2217. struct ixgbevf_ring *ring;
  2218. int ring_count, size;
  2219. ring_count = txr_count + xdp_count + rxr_count;
  2220. size = sizeof(*q_vector) + (sizeof(*ring) * ring_count);
  2221. /* allocate q_vector and rings */
  2222. q_vector = kzalloc(size, GFP_KERNEL);
  2223. if (!q_vector)
  2224. return -ENOMEM;
  2225. /* initialize NAPI */
  2226. netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll, 64);
  2227. /* tie q_vector and adapter together */
  2228. adapter->q_vector[v_idx] = q_vector;
  2229. q_vector->adapter = adapter;
  2230. q_vector->v_idx = v_idx;
  2231. /* initialize pointer to rings */
  2232. ring = q_vector->ring;
  2233. while (txr_count) {
  2234. /* assign generic ring traits */
  2235. ring->dev = &adapter->pdev->dev;
  2236. ring->netdev = adapter->netdev;
  2237. /* configure backlink on ring */
  2238. ring->q_vector = q_vector;
  2239. /* update q_vector Tx values */
  2240. ixgbevf_add_ring(ring, &q_vector->tx);
  2241. /* apply Tx specific ring traits */
  2242. ring->count = adapter->tx_ring_count;
  2243. ring->queue_index = txr_idx;
  2244. ring->reg_idx = reg_idx;
  2245. /* assign ring to adapter */
  2246. adapter->tx_ring[txr_idx] = ring;
  2247. /* update count and index */
  2248. txr_count--;
  2249. txr_idx++;
  2250. reg_idx++;
  2251. /* push pointer to next ring */
  2252. ring++;
  2253. }
  2254. while (xdp_count) {
  2255. /* assign generic ring traits */
  2256. ring->dev = &adapter->pdev->dev;
  2257. ring->netdev = adapter->netdev;
  2258. /* configure backlink on ring */
  2259. ring->q_vector = q_vector;
  2260. /* update q_vector Tx values */
  2261. ixgbevf_add_ring(ring, &q_vector->tx);
  2262. /* apply Tx specific ring traits */
  2263. ring->count = adapter->tx_ring_count;
  2264. ring->queue_index = xdp_idx;
  2265. ring->reg_idx = reg_idx;
  2266. set_ring_xdp(ring);
  2267. /* assign ring to adapter */
  2268. adapter->xdp_ring[xdp_idx] = ring;
  2269. /* update count and index */
  2270. xdp_count--;
  2271. xdp_idx++;
  2272. reg_idx++;
  2273. /* push pointer to next ring */
  2274. ring++;
  2275. }
  2276. while (rxr_count) {
  2277. /* assign generic ring traits */
  2278. ring->dev = &adapter->pdev->dev;
  2279. ring->netdev = adapter->netdev;
  2280. /* configure backlink on ring */
  2281. ring->q_vector = q_vector;
  2282. /* update q_vector Rx values */
  2283. ixgbevf_add_ring(ring, &q_vector->rx);
  2284. /* apply Rx specific ring traits */
  2285. ring->count = adapter->rx_ring_count;
  2286. ring->queue_index = rxr_idx;
  2287. ring->reg_idx = rxr_idx;
  2288. /* assign ring to adapter */
  2289. adapter->rx_ring[rxr_idx] = ring;
  2290. /* update count and index */
  2291. rxr_count--;
  2292. rxr_idx++;
  2293. /* push pointer to next ring */
  2294. ring++;
  2295. }
  2296. return 0;
  2297. }
  2298. /**
  2299. * ixgbevf_free_q_vector - Free memory allocated for specific interrupt vector
  2300. * @adapter: board private structure to initialize
  2301. * @v_idx: index of vector in adapter struct
  2302. *
  2303. * This function frees the memory allocated to the q_vector. In addition if
  2304. * NAPI is enabled it will delete any references to the NAPI struct prior
  2305. * to freeing the q_vector.
  2306. **/
  2307. static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx)
  2308. {
  2309. struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx];
  2310. struct ixgbevf_ring *ring;
  2311. ixgbevf_for_each_ring(ring, q_vector->tx) {
  2312. if (ring_is_xdp(ring))
  2313. adapter->xdp_ring[ring->queue_index] = NULL;
  2314. else
  2315. adapter->tx_ring[ring->queue_index] = NULL;
  2316. }
  2317. ixgbevf_for_each_ring(ring, q_vector->rx)
  2318. adapter->rx_ring[ring->queue_index] = NULL;
  2319. adapter->q_vector[v_idx] = NULL;
  2320. netif_napi_del(&q_vector->napi);
  2321. /* ixgbevf_get_stats() might access the rings on this vector,
  2322. * we must wait a grace period before freeing it.
  2323. */
  2324. kfree_rcu(q_vector, rcu);
  2325. }
  2326. /**
  2327. * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
  2328. * @adapter: board private structure to initialize
  2329. *
  2330. * We allocate one q_vector per queue interrupt. If allocation fails we
  2331. * return -ENOMEM.
  2332. **/
  2333. static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
  2334. {
  2335. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2336. int rxr_remaining = adapter->num_rx_queues;
  2337. int txr_remaining = adapter->num_tx_queues;
  2338. int xdp_remaining = adapter->num_xdp_queues;
  2339. int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0;
  2340. int err;
  2341. if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) {
  2342. for (; rxr_remaining; v_idx++, q_vectors--) {
  2343. int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
  2344. err = ixgbevf_alloc_q_vector(adapter, v_idx,
  2345. 0, 0, 0, 0, rqpv, rxr_idx);
  2346. if (err)
  2347. goto err_out;
  2348. /* update counts and index */
  2349. rxr_remaining -= rqpv;
  2350. rxr_idx += rqpv;
  2351. }
  2352. }
  2353. for (; q_vectors; v_idx++, q_vectors--) {
  2354. int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
  2355. int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);
  2356. int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors);
  2357. err = ixgbevf_alloc_q_vector(adapter, v_idx,
  2358. tqpv, txr_idx,
  2359. xqpv, xdp_idx,
  2360. rqpv, rxr_idx);
  2361. if (err)
  2362. goto err_out;
  2363. /* update counts and index */
  2364. rxr_remaining -= rqpv;
  2365. rxr_idx += rqpv;
  2366. txr_remaining -= tqpv;
  2367. txr_idx += tqpv;
  2368. xdp_remaining -= xqpv;
  2369. xdp_idx += xqpv;
  2370. }
  2371. return 0;
  2372. err_out:
  2373. while (v_idx) {
  2374. v_idx--;
  2375. ixgbevf_free_q_vector(adapter, v_idx);
  2376. }
  2377. return -ENOMEM;
  2378. }
  2379. /**
  2380. * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
  2381. * @adapter: board private structure to initialize
  2382. *
  2383. * This function frees the memory allocated to the q_vectors. In addition if
  2384. * NAPI is enabled it will delete any references to the NAPI struct prior
  2385. * to freeing the q_vector.
  2386. **/
  2387. static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
  2388. {
  2389. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2390. while (q_vectors) {
  2391. q_vectors--;
  2392. ixgbevf_free_q_vector(adapter, q_vectors);
  2393. }
  2394. }
  2395. /**
  2396. * ixgbevf_reset_interrupt_capability - Reset MSIX setup
  2397. * @adapter: board private structure
  2398. *
  2399. **/
  2400. static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
  2401. {
  2402. if (!adapter->msix_entries)
  2403. return;
  2404. pci_disable_msix(adapter->pdev);
  2405. kfree(adapter->msix_entries);
  2406. adapter->msix_entries = NULL;
  2407. }
  2408. /**
  2409. * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
  2410. * @adapter: board private structure to initialize
  2411. *
  2412. **/
  2413. static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2414. {
  2415. int err;
  2416. /* Number of supported queues */
  2417. ixgbevf_set_num_queues(adapter);
  2418. err = ixgbevf_set_interrupt_capability(adapter);
  2419. if (err) {
  2420. hw_dbg(&adapter->hw,
  2421. "Unable to setup interrupt capabilities\n");
  2422. goto err_set_interrupt;
  2423. }
  2424. err = ixgbevf_alloc_q_vectors(adapter);
  2425. if (err) {
  2426. hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
  2427. goto err_alloc_q_vectors;
  2428. }
  2429. hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n",
  2430. (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
  2431. adapter->num_rx_queues, adapter->num_tx_queues,
  2432. adapter->num_xdp_queues);
  2433. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2434. return 0;
  2435. err_alloc_q_vectors:
  2436. ixgbevf_reset_interrupt_capability(adapter);
  2437. err_set_interrupt:
  2438. return err;
  2439. }
  2440. /**
  2441. * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
  2442. * @adapter: board private structure to clear interrupt scheme on
  2443. *
  2444. * We go through and clear interrupt specific resources and reset the structure
  2445. * to pre-load conditions
  2446. **/
  2447. static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2448. {
  2449. adapter->num_tx_queues = 0;
  2450. adapter->num_xdp_queues = 0;
  2451. adapter->num_rx_queues = 0;
  2452. ixgbevf_free_q_vectors(adapter);
  2453. ixgbevf_reset_interrupt_capability(adapter);
  2454. }
  2455. /**
  2456. * ixgbevf_sw_init - Initialize general software structures
  2457. * @adapter: board private structure to initialize
  2458. *
  2459. * ixgbevf_sw_init initializes the Adapter private data structure.
  2460. * Fields are initialized based on PCI device information and
  2461. * OS network device settings (MTU size).
  2462. **/
  2463. static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
  2464. {
  2465. struct ixgbe_hw *hw = &adapter->hw;
  2466. struct pci_dev *pdev = adapter->pdev;
  2467. struct net_device *netdev = adapter->netdev;
  2468. int err;
  2469. /* PCI config space info */
  2470. hw->vendor_id = pdev->vendor;
  2471. hw->device_id = pdev->device;
  2472. hw->revision_id = pdev->revision;
  2473. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  2474. hw->subsystem_device_id = pdev->subsystem_device;
  2475. hw->mbx.ops.init_params(hw);
  2476. if (hw->mac.type >= ixgbe_mac_X550_vf) {
  2477. err = ixgbevf_init_rss_key(adapter);
  2478. if (err)
  2479. goto out;
  2480. }
  2481. /* assume legacy case in which PF would only give VF 2 queues */
  2482. hw->mac.max_tx_queues = 2;
  2483. hw->mac.max_rx_queues = 2;
  2484. /* lock to protect mailbox accesses */
  2485. spin_lock_init(&adapter->mbx_lock);
  2486. err = hw->mac.ops.reset_hw(hw);
  2487. if (err) {
  2488. dev_info(&pdev->dev,
  2489. "PF still in reset state. Is the PF interface up?\n");
  2490. } else {
  2491. err = hw->mac.ops.init_hw(hw);
  2492. if (err) {
  2493. pr_err("init_shared_code failed: %d\n", err);
  2494. goto out;
  2495. }
  2496. ixgbevf_negotiate_api(adapter);
  2497. err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
  2498. if (err)
  2499. dev_info(&pdev->dev, "Error reading MAC address\n");
  2500. else if (is_zero_ether_addr(adapter->hw.mac.addr))
  2501. dev_info(&pdev->dev,
  2502. "MAC address not assigned by administrator.\n");
  2503. ether_addr_copy(netdev->dev_addr, hw->mac.addr);
  2504. }
  2505. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2506. dev_info(&pdev->dev, "Assigning random MAC address\n");
  2507. eth_hw_addr_random(netdev);
  2508. ether_addr_copy(hw->mac.addr, netdev->dev_addr);
  2509. ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
  2510. }
  2511. /* Enable dynamic interrupt throttling rates */
  2512. adapter->rx_itr_setting = 1;
  2513. adapter->tx_itr_setting = 1;
  2514. /* set default ring sizes */
  2515. adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
  2516. adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
  2517. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2518. return 0;
  2519. out:
  2520. return err;
  2521. }
  2522. #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
  2523. { \
  2524. u32 current_counter = IXGBE_READ_REG(hw, reg); \
  2525. if (current_counter < last_counter) \
  2526. counter += 0x100000000LL; \
  2527. last_counter = current_counter; \
  2528. counter &= 0xFFFFFFFF00000000LL; \
  2529. counter |= current_counter; \
  2530. }
  2531. #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
  2532. { \
  2533. u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
  2534. u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
  2535. u64 current_counter = (current_counter_msb << 32) | \
  2536. current_counter_lsb; \
  2537. if (current_counter < last_counter) \
  2538. counter += 0x1000000000LL; \
  2539. last_counter = current_counter; \
  2540. counter &= 0xFFFFFFF000000000LL; \
  2541. counter |= current_counter; \
  2542. }
  2543. /**
  2544. * ixgbevf_update_stats - Update the board statistics counters.
  2545. * @adapter: board private structure
  2546. **/
  2547. void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
  2548. {
  2549. struct ixgbe_hw *hw = &adapter->hw;
  2550. u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
  2551. u64 alloc_rx_page = 0, hw_csum_rx_error = 0;
  2552. int i;
  2553. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2554. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2555. return;
  2556. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
  2557. adapter->stats.vfgprc);
  2558. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
  2559. adapter->stats.vfgptc);
  2560. UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
  2561. adapter->stats.last_vfgorc,
  2562. adapter->stats.vfgorc);
  2563. UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
  2564. adapter->stats.last_vfgotc,
  2565. adapter->stats.vfgotc);
  2566. UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
  2567. adapter->stats.vfmprc);
  2568. for (i = 0; i < adapter->num_rx_queues; i++) {
  2569. struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
  2570. hw_csum_rx_error += rx_ring->rx_stats.csum_err;
  2571. alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
  2572. alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
  2573. alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
  2574. }
  2575. adapter->hw_csum_rx_error = hw_csum_rx_error;
  2576. adapter->alloc_rx_page_failed = alloc_rx_page_failed;
  2577. adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
  2578. adapter->alloc_rx_page = alloc_rx_page;
  2579. }
  2580. /**
  2581. * ixgbevf_service_timer - Timer Call-back
  2582. * @t: pointer to timer_list struct
  2583. **/
  2584. static void ixgbevf_service_timer(struct timer_list *t)
  2585. {
  2586. struct ixgbevf_adapter *adapter = from_timer(adapter, t,
  2587. service_timer);
  2588. /* Reset the timer */
  2589. mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
  2590. ixgbevf_service_event_schedule(adapter);
  2591. }
  2592. static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
  2593. {
  2594. if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
  2595. return;
  2596. rtnl_lock();
  2597. /* If we're already down or resetting, just bail */
  2598. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2599. test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
  2600. test_bit(__IXGBEVF_RESETTING, &adapter->state)) {
  2601. rtnl_unlock();
  2602. return;
  2603. }
  2604. adapter->tx_timeout_count++;
  2605. ixgbevf_reinit_locked(adapter);
  2606. rtnl_unlock();
  2607. }
  2608. /**
  2609. * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
  2610. * @adapter: pointer to the device adapter structure
  2611. *
  2612. * This function serves two purposes. First it strobes the interrupt lines
  2613. * in order to make certain interrupts are occurring. Secondly it sets the
  2614. * bits needed to check for TX hangs. As a result we should immediately
  2615. * determine if a hang has occurred.
  2616. **/
  2617. static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
  2618. {
  2619. struct ixgbe_hw *hw = &adapter->hw;
  2620. u32 eics = 0;
  2621. int i;
  2622. /* If we're down or resetting, just bail */
  2623. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2624. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2625. return;
  2626. /* Force detection of hung controller */
  2627. if (netif_carrier_ok(adapter->netdev)) {
  2628. for (i = 0; i < adapter->num_tx_queues; i++)
  2629. set_check_for_tx_hang(adapter->tx_ring[i]);
  2630. for (i = 0; i < adapter->num_xdp_queues; i++)
  2631. set_check_for_tx_hang(adapter->xdp_ring[i]);
  2632. }
  2633. /* get one bit for every active Tx/Rx interrupt vector */
  2634. for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
  2635. struct ixgbevf_q_vector *qv = adapter->q_vector[i];
  2636. if (qv->rx.ring || qv->tx.ring)
  2637. eics |= BIT(i);
  2638. }
  2639. /* Cause software interrupt to ensure rings are cleaned */
  2640. IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
  2641. }
  2642. /**
  2643. * ixgbevf_watchdog_update_link - update the link status
  2644. * @adapter: pointer to the device adapter structure
  2645. **/
  2646. static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
  2647. {
  2648. struct ixgbe_hw *hw = &adapter->hw;
  2649. u32 link_speed = adapter->link_speed;
  2650. bool link_up = adapter->link_up;
  2651. s32 err;
  2652. spin_lock_bh(&adapter->mbx_lock);
  2653. err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
  2654. spin_unlock_bh(&adapter->mbx_lock);
  2655. /* if check for link returns error we will need to reset */
  2656. if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
  2657. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  2658. link_up = false;
  2659. }
  2660. adapter->link_up = link_up;
  2661. adapter->link_speed = link_speed;
  2662. }
  2663. /**
  2664. * ixgbevf_watchdog_link_is_up - update netif_carrier status and
  2665. * print link up message
  2666. * @adapter: pointer to the device adapter structure
  2667. **/
  2668. static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
  2669. {
  2670. struct net_device *netdev = adapter->netdev;
  2671. /* only continue if link was previously down */
  2672. if (netif_carrier_ok(netdev))
  2673. return;
  2674. dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
  2675. (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
  2676. "10 Gbps" :
  2677. (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
  2678. "1 Gbps" :
  2679. (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
  2680. "100 Mbps" :
  2681. "unknown speed");
  2682. netif_carrier_on(netdev);
  2683. }
  2684. /**
  2685. * ixgbevf_watchdog_link_is_down - update netif_carrier status and
  2686. * print link down message
  2687. * @adapter: pointer to the adapter structure
  2688. **/
  2689. static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
  2690. {
  2691. struct net_device *netdev = adapter->netdev;
  2692. adapter->link_speed = 0;
  2693. /* only continue if link was up previously */
  2694. if (!netif_carrier_ok(netdev))
  2695. return;
  2696. dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
  2697. netif_carrier_off(netdev);
  2698. }
  2699. /**
  2700. * ixgbevf_watchdog_subtask - worker thread to bring link up
  2701. * @adapter: board private structure
  2702. **/
  2703. static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
  2704. {
  2705. /* if interface is down do nothing */
  2706. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2707. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2708. return;
  2709. ixgbevf_watchdog_update_link(adapter);
  2710. if (adapter->link_up)
  2711. ixgbevf_watchdog_link_is_up(adapter);
  2712. else
  2713. ixgbevf_watchdog_link_is_down(adapter);
  2714. ixgbevf_update_stats(adapter);
  2715. }
  2716. /**
  2717. * ixgbevf_service_task - manages and runs subtasks
  2718. * @work: pointer to work_struct containing our data
  2719. **/
  2720. static void ixgbevf_service_task(struct work_struct *work)
  2721. {
  2722. struct ixgbevf_adapter *adapter = container_of(work,
  2723. struct ixgbevf_adapter,
  2724. service_task);
  2725. struct ixgbe_hw *hw = &adapter->hw;
  2726. if (IXGBE_REMOVED(hw->hw_addr)) {
  2727. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  2728. rtnl_lock();
  2729. ixgbevf_down(adapter);
  2730. rtnl_unlock();
  2731. }
  2732. return;
  2733. }
  2734. ixgbevf_queue_reset_subtask(adapter);
  2735. ixgbevf_reset_subtask(adapter);
  2736. ixgbevf_watchdog_subtask(adapter);
  2737. ixgbevf_check_hang_subtask(adapter);
  2738. ixgbevf_service_event_complete(adapter);
  2739. }
  2740. /**
  2741. * ixgbevf_free_tx_resources - Free Tx Resources per Queue
  2742. * @tx_ring: Tx descriptor ring for a specific queue
  2743. *
  2744. * Free all transmit software resources
  2745. **/
  2746. void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
  2747. {
  2748. ixgbevf_clean_tx_ring(tx_ring);
  2749. vfree(tx_ring->tx_buffer_info);
  2750. tx_ring->tx_buffer_info = NULL;
  2751. /* if not set, then don't free */
  2752. if (!tx_ring->desc)
  2753. return;
  2754. dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
  2755. tx_ring->dma);
  2756. tx_ring->desc = NULL;
  2757. }
  2758. /**
  2759. * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
  2760. * @adapter: board private structure
  2761. *
  2762. * Free all transmit software resources
  2763. **/
  2764. static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
  2765. {
  2766. int i;
  2767. for (i = 0; i < adapter->num_tx_queues; i++)
  2768. if (adapter->tx_ring[i]->desc)
  2769. ixgbevf_free_tx_resources(adapter->tx_ring[i]);
  2770. for (i = 0; i < adapter->num_xdp_queues; i++)
  2771. if (adapter->xdp_ring[i]->desc)
  2772. ixgbevf_free_tx_resources(adapter->xdp_ring[i]);
  2773. }
  2774. /**
  2775. * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
  2776. * @tx_ring: Tx descriptor ring (for a specific queue) to setup
  2777. *
  2778. * Return 0 on success, negative on failure
  2779. **/
  2780. int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
  2781. {
  2782. struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
  2783. int size;
  2784. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  2785. tx_ring->tx_buffer_info = vmalloc(size);
  2786. if (!tx_ring->tx_buffer_info)
  2787. goto err;
  2788. u64_stats_init(&tx_ring->syncp);
  2789. /* round up to nearest 4K */
  2790. tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
  2791. tx_ring->size = ALIGN(tx_ring->size, 4096);
  2792. tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
  2793. &tx_ring->dma, GFP_KERNEL);
  2794. if (!tx_ring->desc)
  2795. goto err;
  2796. return 0;
  2797. err:
  2798. vfree(tx_ring->tx_buffer_info);
  2799. tx_ring->tx_buffer_info = NULL;
  2800. hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
  2801. return -ENOMEM;
  2802. }
  2803. /**
  2804. * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
  2805. * @adapter: board private structure
  2806. *
  2807. * If this function returns with an error, then it's possible one or
  2808. * more of the rings is populated (while the rest are not). It is the
  2809. * callers duty to clean those orphaned rings.
  2810. *
  2811. * Return 0 on success, negative on failure
  2812. **/
  2813. static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
  2814. {
  2815. int i, j = 0, err = 0;
  2816. for (i = 0; i < adapter->num_tx_queues; i++) {
  2817. err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
  2818. if (!err)
  2819. continue;
  2820. hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
  2821. goto err_setup_tx;
  2822. }
  2823. for (j = 0; j < adapter->num_xdp_queues; j++) {
  2824. err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]);
  2825. if (!err)
  2826. continue;
  2827. hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j);
  2828. goto err_setup_tx;
  2829. }
  2830. return 0;
  2831. err_setup_tx:
  2832. /* rewind the index freeing the rings as we go */
  2833. while (j--)
  2834. ixgbevf_free_tx_resources(adapter->xdp_ring[j]);
  2835. while (i--)
  2836. ixgbevf_free_tx_resources(adapter->tx_ring[i]);
  2837. return err;
  2838. }
  2839. /**
  2840. * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
  2841. * @adapter: board private structure
  2842. * @rx_ring: Rx descriptor ring (for a specific queue) to setup
  2843. *
  2844. * Returns 0 on success, negative on failure
  2845. **/
  2846. int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
  2847. struct ixgbevf_ring *rx_ring)
  2848. {
  2849. int size;
  2850. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  2851. rx_ring->rx_buffer_info = vmalloc(size);
  2852. if (!rx_ring->rx_buffer_info)
  2853. goto err;
  2854. u64_stats_init(&rx_ring->syncp);
  2855. /* Round up to nearest 4K */
  2856. rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
  2857. rx_ring->size = ALIGN(rx_ring->size, 4096);
  2858. rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
  2859. &rx_ring->dma, GFP_KERNEL);
  2860. if (!rx_ring->desc)
  2861. goto err;
  2862. /* XDP RX-queue info */
  2863. if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
  2864. rx_ring->queue_index) < 0)
  2865. goto err;
  2866. rx_ring->xdp_prog = adapter->xdp_prog;
  2867. return 0;
  2868. err:
  2869. vfree(rx_ring->rx_buffer_info);
  2870. rx_ring->rx_buffer_info = NULL;
  2871. dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
  2872. return -ENOMEM;
  2873. }
  2874. /**
  2875. * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
  2876. * @adapter: board private structure
  2877. *
  2878. * If this function returns with an error, then it's possible one or
  2879. * more of the rings is populated (while the rest are not). It is the
  2880. * callers duty to clean those orphaned rings.
  2881. *
  2882. * Return 0 on success, negative on failure
  2883. **/
  2884. static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
  2885. {
  2886. int i, err = 0;
  2887. for (i = 0; i < adapter->num_rx_queues; i++) {
  2888. err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]);
  2889. if (!err)
  2890. continue;
  2891. hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
  2892. goto err_setup_rx;
  2893. }
  2894. return 0;
  2895. err_setup_rx:
  2896. /* rewind the index freeing the rings as we go */
  2897. while (i--)
  2898. ixgbevf_free_rx_resources(adapter->rx_ring[i]);
  2899. return err;
  2900. }
  2901. /**
  2902. * ixgbevf_free_rx_resources - Free Rx Resources
  2903. * @rx_ring: ring to clean the resources from
  2904. *
  2905. * Free all receive software resources
  2906. **/
  2907. void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
  2908. {
  2909. ixgbevf_clean_rx_ring(rx_ring);
  2910. rx_ring->xdp_prog = NULL;
  2911. xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
  2912. vfree(rx_ring->rx_buffer_info);
  2913. rx_ring->rx_buffer_info = NULL;
  2914. dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
  2915. rx_ring->dma);
  2916. rx_ring->desc = NULL;
  2917. }
  2918. /**
  2919. * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
  2920. * @adapter: board private structure
  2921. *
  2922. * Free all receive software resources
  2923. **/
  2924. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
  2925. {
  2926. int i;
  2927. for (i = 0; i < adapter->num_rx_queues; i++)
  2928. if (adapter->rx_ring[i]->desc)
  2929. ixgbevf_free_rx_resources(adapter->rx_ring[i]);
  2930. }
  2931. /**
  2932. * ixgbevf_open - Called when a network interface is made active
  2933. * @netdev: network interface device structure
  2934. *
  2935. * Returns 0 on success, negative value on failure
  2936. *
  2937. * The open entry point is called when a network interface is made
  2938. * active by the system (IFF_UP). At this point all resources needed
  2939. * for transmit and receive operations are allocated, the interrupt
  2940. * handler is registered with the OS, the watchdog timer is started,
  2941. * and the stack is notified that the interface is ready.
  2942. **/
  2943. int ixgbevf_open(struct net_device *netdev)
  2944. {
  2945. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2946. struct ixgbe_hw *hw = &adapter->hw;
  2947. int err;
  2948. /* A previous failure to open the device because of a lack of
  2949. * available MSIX vector resources may have reset the number
  2950. * of msix vectors variable to zero. The only way to recover
  2951. * is to unload/reload the driver and hope that the system has
  2952. * been able to recover some MSIX vector resources.
  2953. */
  2954. if (!adapter->num_msix_vectors)
  2955. return -ENOMEM;
  2956. if (hw->adapter_stopped) {
  2957. ixgbevf_reset(adapter);
  2958. /* if adapter is still stopped then PF isn't up and
  2959. * the VF can't start.
  2960. */
  2961. if (hw->adapter_stopped) {
  2962. err = IXGBE_ERR_MBX;
  2963. pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
  2964. goto err_setup_reset;
  2965. }
  2966. }
  2967. /* disallow open during test */
  2968. if (test_bit(__IXGBEVF_TESTING, &adapter->state))
  2969. return -EBUSY;
  2970. netif_carrier_off(netdev);
  2971. /* allocate transmit descriptors */
  2972. err = ixgbevf_setup_all_tx_resources(adapter);
  2973. if (err)
  2974. goto err_setup_tx;
  2975. /* allocate receive descriptors */
  2976. err = ixgbevf_setup_all_rx_resources(adapter);
  2977. if (err)
  2978. goto err_setup_rx;
  2979. ixgbevf_configure(adapter);
  2980. err = ixgbevf_request_irq(adapter);
  2981. if (err)
  2982. goto err_req_irq;
  2983. /* Notify the stack of the actual queue counts. */
  2984. err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
  2985. if (err)
  2986. goto err_set_queues;
  2987. err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
  2988. if (err)
  2989. goto err_set_queues;
  2990. ixgbevf_up_complete(adapter);
  2991. return 0;
  2992. err_set_queues:
  2993. ixgbevf_free_irq(adapter);
  2994. err_req_irq:
  2995. ixgbevf_free_all_rx_resources(adapter);
  2996. err_setup_rx:
  2997. ixgbevf_free_all_tx_resources(adapter);
  2998. err_setup_tx:
  2999. ixgbevf_reset(adapter);
  3000. err_setup_reset:
  3001. return err;
  3002. }
  3003. /**
  3004. * ixgbevf_close_suspend - actions necessary to both suspend and close flows
  3005. * @adapter: the private adapter struct
  3006. *
  3007. * This function should contain the necessary work common to both suspending
  3008. * and closing of the device.
  3009. */
  3010. static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
  3011. {
  3012. ixgbevf_down(adapter);
  3013. ixgbevf_free_irq(adapter);
  3014. ixgbevf_free_all_tx_resources(adapter);
  3015. ixgbevf_free_all_rx_resources(adapter);
  3016. }
  3017. /**
  3018. * ixgbevf_close - Disables a network interface
  3019. * @netdev: network interface device structure
  3020. *
  3021. * Returns 0, this is not allowed to fail
  3022. *
  3023. * The close entry point is called when an interface is de-activated
  3024. * by the OS. The hardware is still under the drivers control, but
  3025. * needs to be disabled. A global MAC reset is issued to stop the
  3026. * hardware, and all transmit and receive resources are freed.
  3027. **/
  3028. int ixgbevf_close(struct net_device *netdev)
  3029. {
  3030. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3031. if (netif_device_present(netdev))
  3032. ixgbevf_close_suspend(adapter);
  3033. return 0;
  3034. }
  3035. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
  3036. {
  3037. struct net_device *dev = adapter->netdev;
  3038. if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
  3039. &adapter->state))
  3040. return;
  3041. /* if interface is down do nothing */
  3042. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  3043. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  3044. return;
  3045. /* Hardware has to reinitialize queues and interrupts to
  3046. * match packet buffer alignment. Unfortunately, the
  3047. * hardware is not flexible enough to do this dynamically.
  3048. */
  3049. rtnl_lock();
  3050. if (netif_running(dev))
  3051. ixgbevf_close(dev);
  3052. ixgbevf_clear_interrupt_scheme(adapter);
  3053. ixgbevf_init_interrupt_scheme(adapter);
  3054. if (netif_running(dev))
  3055. ixgbevf_open(dev);
  3056. rtnl_unlock();
  3057. }
  3058. static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
  3059. u32 vlan_macip_lens, u32 type_tucmd,
  3060. u32 mss_l4len_idx)
  3061. {
  3062. struct ixgbe_adv_tx_context_desc *context_desc;
  3063. u16 i = tx_ring->next_to_use;
  3064. context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
  3065. i++;
  3066. tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
  3067. /* set bits to identify this as an advanced context descriptor */
  3068. type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
  3069. context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
  3070. context_desc->seqnum_seed = 0;
  3071. context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
  3072. context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
  3073. }
  3074. static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
  3075. struct ixgbevf_tx_buffer *first,
  3076. u8 *hdr_len)
  3077. {
  3078. u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
  3079. struct sk_buff *skb = first->skb;
  3080. union {
  3081. struct iphdr *v4;
  3082. struct ipv6hdr *v6;
  3083. unsigned char *hdr;
  3084. } ip;
  3085. union {
  3086. struct tcphdr *tcp;
  3087. unsigned char *hdr;
  3088. } l4;
  3089. u32 paylen, l4_offset;
  3090. int err;
  3091. if (skb->ip_summed != CHECKSUM_PARTIAL)
  3092. return 0;
  3093. if (!skb_is_gso(skb))
  3094. return 0;
  3095. err = skb_cow_head(skb, 0);
  3096. if (err < 0)
  3097. return err;
  3098. if (eth_p_mpls(first->protocol))
  3099. ip.hdr = skb_inner_network_header(skb);
  3100. else
  3101. ip.hdr = skb_network_header(skb);
  3102. l4.hdr = skb_checksum_start(skb);
  3103. /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
  3104. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  3105. /* initialize outer IP header fields */
  3106. if (ip.v4->version == 4) {
  3107. unsigned char *csum_start = skb_checksum_start(skb);
  3108. unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
  3109. /* IP header will have to cancel out any data that
  3110. * is not a part of the outer IP header
  3111. */
  3112. ip.v4->check = csum_fold(csum_partial(trans_start,
  3113. csum_start - trans_start,
  3114. 0));
  3115. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  3116. ip.v4->tot_len = 0;
  3117. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  3118. IXGBE_TX_FLAGS_CSUM |
  3119. IXGBE_TX_FLAGS_IPV4;
  3120. } else {
  3121. ip.v6->payload_len = 0;
  3122. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  3123. IXGBE_TX_FLAGS_CSUM;
  3124. }
  3125. /* determine offset of inner transport header */
  3126. l4_offset = l4.hdr - skb->data;
  3127. /* compute length of segmentation header */
  3128. *hdr_len = (l4.tcp->doff * 4) + l4_offset;
  3129. /* remove payload length from inner checksum */
  3130. paylen = skb->len - l4_offset;
  3131. csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
  3132. /* update gso size and bytecount with header size */
  3133. first->gso_segs = skb_shinfo(skb)->gso_segs;
  3134. first->bytecount += (first->gso_segs - 1) * *hdr_len;
  3135. /* mss_l4len_id: use 1 as index for TSO */
  3136. mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
  3137. mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
  3138. mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
  3139. /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
  3140. vlan_macip_lens = l4.hdr - ip.hdr;
  3141. vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
  3142. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  3143. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  3144. type_tucmd, mss_l4len_idx);
  3145. return 1;
  3146. }
  3147. static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
  3148. {
  3149. unsigned int offset = 0;
  3150. ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
  3151. return offset == skb_checksum_start_offset(skb);
  3152. }
  3153. static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
  3154. struct ixgbevf_tx_buffer *first)
  3155. {
  3156. struct sk_buff *skb = first->skb;
  3157. u32 vlan_macip_lens = 0;
  3158. u32 type_tucmd = 0;
  3159. if (skb->ip_summed != CHECKSUM_PARTIAL)
  3160. goto no_csum;
  3161. switch (skb->csum_offset) {
  3162. case offsetof(struct tcphdr, check):
  3163. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  3164. /* fall through */
  3165. case offsetof(struct udphdr, check):
  3166. break;
  3167. case offsetof(struct sctphdr, checksum):
  3168. /* validate that this is actually an SCTP request */
  3169. if (((first->protocol == htons(ETH_P_IP)) &&
  3170. (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
  3171. ((first->protocol == htons(ETH_P_IPV6)) &&
  3172. ixgbevf_ipv6_csum_is_sctp(skb))) {
  3173. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
  3174. break;
  3175. }
  3176. /* fall through */
  3177. default:
  3178. skb_checksum_help(skb);
  3179. goto no_csum;
  3180. }
  3181. if (first->protocol == htons(ETH_P_IP))
  3182. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  3183. /* update TX checksum flag */
  3184. first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
  3185. vlan_macip_lens = skb_checksum_start_offset(skb) -
  3186. skb_network_offset(skb);
  3187. no_csum:
  3188. /* vlan_macip_lens: MACLEN, VLAN tag */
  3189. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  3190. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  3191. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
  3192. }
  3193. static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
  3194. {
  3195. /* set type for advanced descriptor with frame checksum insertion */
  3196. __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
  3197. IXGBE_ADVTXD_DCMD_IFCS |
  3198. IXGBE_ADVTXD_DCMD_DEXT);
  3199. /* set HW VLAN bit if VLAN is present */
  3200. if (tx_flags & IXGBE_TX_FLAGS_VLAN)
  3201. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
  3202. /* set segmentation enable bits for TSO/FSO */
  3203. if (tx_flags & IXGBE_TX_FLAGS_TSO)
  3204. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
  3205. return cmd_type;
  3206. }
  3207. static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
  3208. u32 tx_flags, unsigned int paylen)
  3209. {
  3210. __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
  3211. /* enable L4 checksum for TSO and TX checksum offload */
  3212. if (tx_flags & IXGBE_TX_FLAGS_CSUM)
  3213. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
  3214. /* enble IPv4 checksum for TSO */
  3215. if (tx_flags & IXGBE_TX_FLAGS_IPV4)
  3216. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
  3217. /* use index 1 context for TSO/FSO/FCOE */
  3218. if (tx_flags & IXGBE_TX_FLAGS_TSO)
  3219. olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
  3220. /* Check Context must be set if Tx switch is enabled, which it
  3221. * always is for case where virtual functions are running
  3222. */
  3223. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
  3224. tx_desc->read.olinfo_status = olinfo_status;
  3225. }
  3226. static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
  3227. struct ixgbevf_tx_buffer *first,
  3228. const u8 hdr_len)
  3229. {
  3230. struct sk_buff *skb = first->skb;
  3231. struct ixgbevf_tx_buffer *tx_buffer;
  3232. union ixgbe_adv_tx_desc *tx_desc;
  3233. struct skb_frag_struct *frag;
  3234. dma_addr_t dma;
  3235. unsigned int data_len, size;
  3236. u32 tx_flags = first->tx_flags;
  3237. __le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
  3238. u16 i = tx_ring->next_to_use;
  3239. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  3240. ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
  3241. size = skb_headlen(skb);
  3242. data_len = skb->data_len;
  3243. dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
  3244. tx_buffer = first;
  3245. for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
  3246. if (dma_mapping_error(tx_ring->dev, dma))
  3247. goto dma_error;
  3248. /* record length, and DMA address */
  3249. dma_unmap_len_set(tx_buffer, len, size);
  3250. dma_unmap_addr_set(tx_buffer, dma, dma);
  3251. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  3252. while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
  3253. tx_desc->read.cmd_type_len =
  3254. cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
  3255. i++;
  3256. tx_desc++;
  3257. if (i == tx_ring->count) {
  3258. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  3259. i = 0;
  3260. }
  3261. tx_desc->read.olinfo_status = 0;
  3262. dma += IXGBE_MAX_DATA_PER_TXD;
  3263. size -= IXGBE_MAX_DATA_PER_TXD;
  3264. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  3265. }
  3266. if (likely(!data_len))
  3267. break;
  3268. tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
  3269. i++;
  3270. tx_desc++;
  3271. if (i == tx_ring->count) {
  3272. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  3273. i = 0;
  3274. }
  3275. tx_desc->read.olinfo_status = 0;
  3276. size = skb_frag_size(frag);
  3277. data_len -= size;
  3278. dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
  3279. DMA_TO_DEVICE);
  3280. tx_buffer = &tx_ring->tx_buffer_info[i];
  3281. }
  3282. /* write last descriptor with RS and EOP bits */
  3283. cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
  3284. tx_desc->read.cmd_type_len = cmd_type;
  3285. /* set the timestamp */
  3286. first->time_stamp = jiffies;
  3287. /* Force memory writes to complete before letting h/w know there
  3288. * are new descriptors to fetch. (Only applicable for weak-ordered
  3289. * memory model archs, such as IA-64).
  3290. *
  3291. * We also need this memory barrier (wmb) to make certain all of the
  3292. * status bits have been updated before next_to_watch is written.
  3293. */
  3294. wmb();
  3295. /* set next_to_watch value indicating a packet is present */
  3296. first->next_to_watch = tx_desc;
  3297. i++;
  3298. if (i == tx_ring->count)
  3299. i = 0;
  3300. tx_ring->next_to_use = i;
  3301. /* notify HW of packet */
  3302. ixgbevf_write_tail(tx_ring, i);
  3303. return;
  3304. dma_error:
  3305. dev_err(tx_ring->dev, "TX DMA map failed\n");
  3306. tx_buffer = &tx_ring->tx_buffer_info[i];
  3307. /* clear dma mappings for failed tx_buffer_info map */
  3308. while (tx_buffer != first) {
  3309. if (dma_unmap_len(tx_buffer, len))
  3310. dma_unmap_page(tx_ring->dev,
  3311. dma_unmap_addr(tx_buffer, dma),
  3312. dma_unmap_len(tx_buffer, len),
  3313. DMA_TO_DEVICE);
  3314. dma_unmap_len_set(tx_buffer, len, 0);
  3315. if (i-- == 0)
  3316. i += tx_ring->count;
  3317. tx_buffer = &tx_ring->tx_buffer_info[i];
  3318. }
  3319. if (dma_unmap_len(tx_buffer, len))
  3320. dma_unmap_single(tx_ring->dev,
  3321. dma_unmap_addr(tx_buffer, dma),
  3322. dma_unmap_len(tx_buffer, len),
  3323. DMA_TO_DEVICE);
  3324. dma_unmap_len_set(tx_buffer, len, 0);
  3325. dev_kfree_skb_any(tx_buffer->skb);
  3326. tx_buffer->skb = NULL;
  3327. tx_ring->next_to_use = i;
  3328. }
  3329. static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  3330. {
  3331. netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
  3332. /* Herbert's original patch had:
  3333. * smp_mb__after_netif_stop_queue();
  3334. * but since that doesn't exist yet, just open code it.
  3335. */
  3336. smp_mb();
  3337. /* We need to check again in a case another CPU has just
  3338. * made room available.
  3339. */
  3340. if (likely(ixgbevf_desc_unused(tx_ring) < size))
  3341. return -EBUSY;
  3342. /* A reprieve! - use start_queue because it doesn't call schedule */
  3343. netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
  3344. ++tx_ring->tx_stats.restart_queue;
  3345. return 0;
  3346. }
  3347. static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  3348. {
  3349. if (likely(ixgbevf_desc_unused(tx_ring) >= size))
  3350. return 0;
  3351. return __ixgbevf_maybe_stop_tx(tx_ring, size);
  3352. }
  3353. static int ixgbevf_xmit_frame_ring(struct sk_buff *skb,
  3354. struct ixgbevf_ring *tx_ring)
  3355. {
  3356. struct ixgbevf_tx_buffer *first;
  3357. int tso;
  3358. u32 tx_flags = 0;
  3359. u16 count = TXD_USE_COUNT(skb_headlen(skb));
  3360. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  3361. unsigned short f;
  3362. #endif
  3363. u8 hdr_len = 0;
  3364. u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
  3365. if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
  3366. dev_kfree_skb_any(skb);
  3367. return NETDEV_TX_OK;
  3368. }
  3369. /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
  3370. * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
  3371. * + 2 desc gap to keep tail from touching head,
  3372. * + 1 desc for context descriptor,
  3373. * otherwise try next time
  3374. */
  3375. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  3376. for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
  3377. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
  3378. #else
  3379. count += skb_shinfo(skb)->nr_frags;
  3380. #endif
  3381. if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
  3382. tx_ring->tx_stats.tx_busy++;
  3383. return NETDEV_TX_BUSY;
  3384. }
  3385. /* record the location of the first descriptor for this packet */
  3386. first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
  3387. first->skb = skb;
  3388. first->bytecount = skb->len;
  3389. first->gso_segs = 1;
  3390. if (skb_vlan_tag_present(skb)) {
  3391. tx_flags |= skb_vlan_tag_get(skb);
  3392. tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
  3393. tx_flags |= IXGBE_TX_FLAGS_VLAN;
  3394. }
  3395. /* record initial flags and protocol */
  3396. first->tx_flags = tx_flags;
  3397. first->protocol = vlan_get_protocol(skb);
  3398. tso = ixgbevf_tso(tx_ring, first, &hdr_len);
  3399. if (tso < 0)
  3400. goto out_drop;
  3401. else if (!tso)
  3402. ixgbevf_tx_csum(tx_ring, first);
  3403. ixgbevf_tx_map(tx_ring, first, hdr_len);
  3404. ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
  3405. return NETDEV_TX_OK;
  3406. out_drop:
  3407. dev_kfree_skb_any(first->skb);
  3408. first->skb = NULL;
  3409. return NETDEV_TX_OK;
  3410. }
  3411. static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  3412. {
  3413. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3414. struct ixgbevf_ring *tx_ring;
  3415. if (skb->len <= 0) {
  3416. dev_kfree_skb_any(skb);
  3417. return NETDEV_TX_OK;
  3418. }
  3419. /* The minimum packet size for olinfo paylen is 17 so pad the skb
  3420. * in order to meet this minimum size requirement.
  3421. */
  3422. if (skb->len < 17) {
  3423. if (skb_padto(skb, 17))
  3424. return NETDEV_TX_OK;
  3425. skb->len = 17;
  3426. }
  3427. tx_ring = adapter->tx_ring[skb->queue_mapping];
  3428. return ixgbevf_xmit_frame_ring(skb, tx_ring);
  3429. }
  3430. /**
  3431. * ixgbevf_set_mac - Change the Ethernet Address of the NIC
  3432. * @netdev: network interface device structure
  3433. * @p: pointer to an address structure
  3434. *
  3435. * Returns 0 on success, negative on failure
  3436. **/
  3437. static int ixgbevf_set_mac(struct net_device *netdev, void *p)
  3438. {
  3439. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3440. struct ixgbe_hw *hw = &adapter->hw;
  3441. struct sockaddr *addr = p;
  3442. int err;
  3443. if (!is_valid_ether_addr(addr->sa_data))
  3444. return -EADDRNOTAVAIL;
  3445. spin_lock_bh(&adapter->mbx_lock);
  3446. err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
  3447. spin_unlock_bh(&adapter->mbx_lock);
  3448. if (err)
  3449. return -EPERM;
  3450. ether_addr_copy(hw->mac.addr, addr->sa_data);
  3451. ether_addr_copy(hw->mac.perm_addr, addr->sa_data);
  3452. ether_addr_copy(netdev->dev_addr, addr->sa_data);
  3453. return 0;
  3454. }
  3455. /**
  3456. * ixgbevf_change_mtu - Change the Maximum Transfer Unit
  3457. * @netdev: network interface device structure
  3458. * @new_mtu: new value for maximum frame size
  3459. *
  3460. * Returns 0 on success, negative on failure
  3461. **/
  3462. static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
  3463. {
  3464. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3465. struct ixgbe_hw *hw = &adapter->hw;
  3466. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  3467. int ret;
  3468. /* prevent MTU being changed to a size unsupported by XDP */
  3469. if (adapter->xdp_prog) {
  3470. dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n");
  3471. return -EPERM;
  3472. }
  3473. spin_lock_bh(&adapter->mbx_lock);
  3474. /* notify the PF of our intent to use this size of frame */
  3475. ret = hw->mac.ops.set_rlpml(hw, max_frame);
  3476. spin_unlock_bh(&adapter->mbx_lock);
  3477. if (ret)
  3478. return -EINVAL;
  3479. hw_dbg(hw, "changing MTU from %d to %d\n",
  3480. netdev->mtu, new_mtu);
  3481. /* must set new MTU before calling down or up */
  3482. netdev->mtu = new_mtu;
  3483. if (netif_running(netdev))
  3484. ixgbevf_reinit_locked(adapter);
  3485. return 0;
  3486. }
  3487. static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
  3488. {
  3489. struct net_device *netdev = pci_get_drvdata(pdev);
  3490. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3491. #ifdef CONFIG_PM
  3492. int retval = 0;
  3493. #endif
  3494. rtnl_lock();
  3495. netif_device_detach(netdev);
  3496. if (netif_running(netdev))
  3497. ixgbevf_close_suspend(adapter);
  3498. ixgbevf_clear_interrupt_scheme(adapter);
  3499. rtnl_unlock();
  3500. #ifdef CONFIG_PM
  3501. retval = pci_save_state(pdev);
  3502. if (retval)
  3503. return retval;
  3504. #endif
  3505. if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
  3506. pci_disable_device(pdev);
  3507. return 0;
  3508. }
  3509. #ifdef CONFIG_PM
  3510. static int ixgbevf_resume(struct pci_dev *pdev)
  3511. {
  3512. struct net_device *netdev = pci_get_drvdata(pdev);
  3513. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3514. u32 err;
  3515. pci_restore_state(pdev);
  3516. /* pci_restore_state clears dev->state_saved so call
  3517. * pci_save_state to restore it.
  3518. */
  3519. pci_save_state(pdev);
  3520. err = pci_enable_device_mem(pdev);
  3521. if (err) {
  3522. dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
  3523. return err;
  3524. }
  3525. adapter->hw.hw_addr = adapter->io_addr;
  3526. smp_mb__before_atomic();
  3527. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  3528. pci_set_master(pdev);
  3529. ixgbevf_reset(adapter);
  3530. rtnl_lock();
  3531. err = ixgbevf_init_interrupt_scheme(adapter);
  3532. if (!err && netif_running(netdev))
  3533. err = ixgbevf_open(netdev);
  3534. rtnl_unlock();
  3535. if (err)
  3536. return err;
  3537. netif_device_attach(netdev);
  3538. return err;
  3539. }
  3540. #endif /* CONFIG_PM */
  3541. static void ixgbevf_shutdown(struct pci_dev *pdev)
  3542. {
  3543. ixgbevf_suspend(pdev, PMSG_SUSPEND);
  3544. }
  3545. static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats,
  3546. const struct ixgbevf_ring *ring)
  3547. {
  3548. u64 bytes, packets;
  3549. unsigned int start;
  3550. if (ring) {
  3551. do {
  3552. start = u64_stats_fetch_begin_irq(&ring->syncp);
  3553. bytes = ring->stats.bytes;
  3554. packets = ring->stats.packets;
  3555. } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
  3556. stats->tx_bytes += bytes;
  3557. stats->tx_packets += packets;
  3558. }
  3559. }
  3560. static void ixgbevf_get_stats(struct net_device *netdev,
  3561. struct rtnl_link_stats64 *stats)
  3562. {
  3563. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3564. unsigned int start;
  3565. u64 bytes, packets;
  3566. const struct ixgbevf_ring *ring;
  3567. int i;
  3568. ixgbevf_update_stats(adapter);
  3569. stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
  3570. rcu_read_lock();
  3571. for (i = 0; i < adapter->num_rx_queues; i++) {
  3572. ring = adapter->rx_ring[i];
  3573. do {
  3574. start = u64_stats_fetch_begin_irq(&ring->syncp);
  3575. bytes = ring->stats.bytes;
  3576. packets = ring->stats.packets;
  3577. } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
  3578. stats->rx_bytes += bytes;
  3579. stats->rx_packets += packets;
  3580. }
  3581. for (i = 0; i < adapter->num_tx_queues; i++) {
  3582. ring = adapter->tx_ring[i];
  3583. ixgbevf_get_tx_ring_stats(stats, ring);
  3584. }
  3585. for (i = 0; i < adapter->num_xdp_queues; i++) {
  3586. ring = adapter->xdp_ring[i];
  3587. ixgbevf_get_tx_ring_stats(stats, ring);
  3588. }
  3589. rcu_read_unlock();
  3590. }
  3591. #define IXGBEVF_MAX_MAC_HDR_LEN 127
  3592. #define IXGBEVF_MAX_NETWORK_HDR_LEN 511
  3593. static netdev_features_t
  3594. ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
  3595. netdev_features_t features)
  3596. {
  3597. unsigned int network_hdr_len, mac_hdr_len;
  3598. /* Make certain the headers can be described by a context descriptor */
  3599. mac_hdr_len = skb_network_header(skb) - skb->data;
  3600. if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
  3601. return features & ~(NETIF_F_HW_CSUM |
  3602. NETIF_F_SCTP_CRC |
  3603. NETIF_F_HW_VLAN_CTAG_TX |
  3604. NETIF_F_TSO |
  3605. NETIF_F_TSO6);
  3606. network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
  3607. if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
  3608. return features & ~(NETIF_F_HW_CSUM |
  3609. NETIF_F_SCTP_CRC |
  3610. NETIF_F_TSO |
  3611. NETIF_F_TSO6);
  3612. /* We can only support IPV4 TSO in tunnels if we can mangle the
  3613. * inner IP ID field, so strip TSO if MANGLEID is not supported.
  3614. */
  3615. if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
  3616. features &= ~NETIF_F_TSO;
  3617. return features;
  3618. }
  3619. static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
  3620. {
  3621. int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  3622. struct ixgbevf_adapter *adapter = netdev_priv(dev);
  3623. struct bpf_prog *old_prog;
  3624. /* verify ixgbevf ring attributes are sufficient for XDP */
  3625. for (i = 0; i < adapter->num_rx_queues; i++) {
  3626. struct ixgbevf_ring *ring = adapter->rx_ring[i];
  3627. if (frame_size > ixgbevf_rx_bufsz(ring))
  3628. return -EINVAL;
  3629. }
  3630. old_prog = xchg(&adapter->xdp_prog, prog);
  3631. /* If transitioning XDP modes reconfigure rings */
  3632. if (!!prog != !!old_prog) {
  3633. /* Hardware has to reinitialize queues and interrupts to
  3634. * match packet buffer alignment. Unfortunately, the
  3635. * hardware is not flexible enough to do this dynamically.
  3636. */
  3637. if (netif_running(dev))
  3638. ixgbevf_close(dev);
  3639. ixgbevf_clear_interrupt_scheme(adapter);
  3640. ixgbevf_init_interrupt_scheme(adapter);
  3641. if (netif_running(dev))
  3642. ixgbevf_open(dev);
  3643. } else {
  3644. for (i = 0; i < adapter->num_rx_queues; i++)
  3645. xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
  3646. }
  3647. if (old_prog)
  3648. bpf_prog_put(old_prog);
  3649. return 0;
  3650. }
  3651. static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp)
  3652. {
  3653. struct ixgbevf_adapter *adapter = netdev_priv(dev);
  3654. switch (xdp->command) {
  3655. case XDP_SETUP_PROG:
  3656. return ixgbevf_xdp_setup(dev, xdp->prog);
  3657. case XDP_QUERY_PROG:
  3658. xdp->prog_id = adapter->xdp_prog ?
  3659. adapter->xdp_prog->aux->id : 0;
  3660. return 0;
  3661. default:
  3662. return -EINVAL;
  3663. }
  3664. }
  3665. static const struct net_device_ops ixgbevf_netdev_ops = {
  3666. .ndo_open = ixgbevf_open,
  3667. .ndo_stop = ixgbevf_close,
  3668. .ndo_start_xmit = ixgbevf_xmit_frame,
  3669. .ndo_set_rx_mode = ixgbevf_set_rx_mode,
  3670. .ndo_get_stats64 = ixgbevf_get_stats,
  3671. .ndo_validate_addr = eth_validate_addr,
  3672. .ndo_set_mac_address = ixgbevf_set_mac,
  3673. .ndo_change_mtu = ixgbevf_change_mtu,
  3674. .ndo_tx_timeout = ixgbevf_tx_timeout,
  3675. .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
  3676. .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
  3677. .ndo_features_check = ixgbevf_features_check,
  3678. .ndo_bpf = ixgbevf_xdp,
  3679. };
  3680. static void ixgbevf_assign_netdev_ops(struct net_device *dev)
  3681. {
  3682. dev->netdev_ops = &ixgbevf_netdev_ops;
  3683. ixgbevf_set_ethtool_ops(dev);
  3684. dev->watchdog_timeo = 5 * HZ;
  3685. }
  3686. /**
  3687. * ixgbevf_probe - Device Initialization Routine
  3688. * @pdev: PCI device information struct
  3689. * @ent: entry in ixgbevf_pci_tbl
  3690. *
  3691. * Returns 0 on success, negative on failure
  3692. *
  3693. * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
  3694. * The OS initialization, configuring of the adapter private structure,
  3695. * and a hardware reset occur.
  3696. **/
  3697. static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3698. {
  3699. struct net_device *netdev;
  3700. struct ixgbevf_adapter *adapter = NULL;
  3701. struct ixgbe_hw *hw = NULL;
  3702. const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
  3703. int err, pci_using_dac;
  3704. bool disable_dev = false;
  3705. err = pci_enable_device(pdev);
  3706. if (err)
  3707. return err;
  3708. if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
  3709. pci_using_dac = 1;
  3710. } else {
  3711. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  3712. if (err) {
  3713. dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
  3714. goto err_dma;
  3715. }
  3716. pci_using_dac = 0;
  3717. }
  3718. err = pci_request_regions(pdev, ixgbevf_driver_name);
  3719. if (err) {
  3720. dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
  3721. goto err_pci_reg;
  3722. }
  3723. pci_set_master(pdev);
  3724. netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
  3725. MAX_TX_QUEUES);
  3726. if (!netdev) {
  3727. err = -ENOMEM;
  3728. goto err_alloc_etherdev;
  3729. }
  3730. SET_NETDEV_DEV(netdev, &pdev->dev);
  3731. adapter = netdev_priv(netdev);
  3732. adapter->netdev = netdev;
  3733. adapter->pdev = pdev;
  3734. hw = &adapter->hw;
  3735. hw->back = adapter;
  3736. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  3737. /* call save state here in standalone driver because it relies on
  3738. * adapter struct to exist, and needs to call netdev_priv
  3739. */
  3740. pci_save_state(pdev);
  3741. hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
  3742. pci_resource_len(pdev, 0));
  3743. adapter->io_addr = hw->hw_addr;
  3744. if (!hw->hw_addr) {
  3745. err = -EIO;
  3746. goto err_ioremap;
  3747. }
  3748. ixgbevf_assign_netdev_ops(netdev);
  3749. /* Setup HW API */
  3750. memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
  3751. hw->mac.type = ii->mac;
  3752. memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
  3753. sizeof(struct ixgbe_mbx_operations));
  3754. /* setup the private structure */
  3755. err = ixgbevf_sw_init(adapter);
  3756. if (err)
  3757. goto err_sw_init;
  3758. /* The HW MAC address was set and/or determined in sw_init */
  3759. if (!is_valid_ether_addr(netdev->dev_addr)) {
  3760. pr_err("invalid MAC address\n");
  3761. err = -EIO;
  3762. goto err_sw_init;
  3763. }
  3764. netdev->hw_features = NETIF_F_SG |
  3765. NETIF_F_TSO |
  3766. NETIF_F_TSO6 |
  3767. NETIF_F_RXCSUM |
  3768. NETIF_F_HW_CSUM |
  3769. NETIF_F_SCTP_CRC;
  3770. #define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
  3771. NETIF_F_GSO_GRE_CSUM | \
  3772. NETIF_F_GSO_IPXIP4 | \
  3773. NETIF_F_GSO_IPXIP6 | \
  3774. NETIF_F_GSO_UDP_TUNNEL | \
  3775. NETIF_F_GSO_UDP_TUNNEL_CSUM)
  3776. netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
  3777. netdev->hw_features |= NETIF_F_GSO_PARTIAL |
  3778. IXGBEVF_GSO_PARTIAL_FEATURES;
  3779. netdev->features = netdev->hw_features;
  3780. if (pci_using_dac)
  3781. netdev->features |= NETIF_F_HIGHDMA;
  3782. netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
  3783. netdev->mpls_features |= NETIF_F_SG |
  3784. NETIF_F_TSO |
  3785. NETIF_F_TSO6 |
  3786. NETIF_F_HW_CSUM;
  3787. netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
  3788. netdev->hw_enc_features |= netdev->vlan_features;
  3789. /* set this bit last since it cannot be part of vlan_features */
  3790. netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
  3791. NETIF_F_HW_VLAN_CTAG_RX |
  3792. NETIF_F_HW_VLAN_CTAG_TX;
  3793. netdev->priv_flags |= IFF_UNICAST_FLT;
  3794. /* MTU range: 68 - 1504 or 9710 */
  3795. netdev->min_mtu = ETH_MIN_MTU;
  3796. switch (adapter->hw.api_version) {
  3797. case ixgbe_mbox_api_11:
  3798. case ixgbe_mbox_api_12:
  3799. case ixgbe_mbox_api_13:
  3800. netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
  3801. (ETH_HLEN + ETH_FCS_LEN);
  3802. break;
  3803. default:
  3804. if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
  3805. netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
  3806. (ETH_HLEN + ETH_FCS_LEN);
  3807. else
  3808. netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
  3809. break;
  3810. }
  3811. if (IXGBE_REMOVED(hw->hw_addr)) {
  3812. err = -EIO;
  3813. goto err_sw_init;
  3814. }
  3815. timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0);
  3816. INIT_WORK(&adapter->service_task, ixgbevf_service_task);
  3817. set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
  3818. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  3819. err = ixgbevf_init_interrupt_scheme(adapter);
  3820. if (err)
  3821. goto err_sw_init;
  3822. strcpy(netdev->name, "eth%d");
  3823. err = register_netdev(netdev);
  3824. if (err)
  3825. goto err_register;
  3826. pci_set_drvdata(pdev, netdev);
  3827. netif_carrier_off(netdev);
  3828. ixgbevf_init_last_counter_stats(adapter);
  3829. /* print the VF info */
  3830. dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
  3831. dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
  3832. switch (hw->mac.type) {
  3833. case ixgbe_mac_X550_vf:
  3834. dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
  3835. break;
  3836. case ixgbe_mac_X540_vf:
  3837. dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
  3838. break;
  3839. case ixgbe_mac_82599_vf:
  3840. default:
  3841. dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
  3842. break;
  3843. }
  3844. return 0;
  3845. err_register:
  3846. ixgbevf_clear_interrupt_scheme(adapter);
  3847. err_sw_init:
  3848. ixgbevf_reset_interrupt_capability(adapter);
  3849. iounmap(adapter->io_addr);
  3850. kfree(adapter->rss_key);
  3851. err_ioremap:
  3852. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3853. free_netdev(netdev);
  3854. err_alloc_etherdev:
  3855. pci_release_regions(pdev);
  3856. err_pci_reg:
  3857. err_dma:
  3858. if (!adapter || disable_dev)
  3859. pci_disable_device(pdev);
  3860. return err;
  3861. }
  3862. /**
  3863. * ixgbevf_remove - Device Removal Routine
  3864. * @pdev: PCI device information struct
  3865. *
  3866. * ixgbevf_remove is called by the PCI subsystem to alert the driver
  3867. * that it should release a PCI device. The could be caused by a
  3868. * Hot-Plug event, or because the driver is going to be removed from
  3869. * memory.
  3870. **/
  3871. static void ixgbevf_remove(struct pci_dev *pdev)
  3872. {
  3873. struct net_device *netdev = pci_get_drvdata(pdev);
  3874. struct ixgbevf_adapter *adapter;
  3875. bool disable_dev;
  3876. if (!netdev)
  3877. return;
  3878. adapter = netdev_priv(netdev);
  3879. set_bit(__IXGBEVF_REMOVING, &adapter->state);
  3880. cancel_work_sync(&adapter->service_task);
  3881. if (netdev->reg_state == NETREG_REGISTERED)
  3882. unregister_netdev(netdev);
  3883. ixgbevf_clear_interrupt_scheme(adapter);
  3884. ixgbevf_reset_interrupt_capability(adapter);
  3885. iounmap(adapter->io_addr);
  3886. pci_release_regions(pdev);
  3887. hw_dbg(&adapter->hw, "Remove complete\n");
  3888. kfree(adapter->rss_key);
  3889. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3890. free_netdev(netdev);
  3891. if (disable_dev)
  3892. pci_disable_device(pdev);
  3893. }
  3894. /**
  3895. * ixgbevf_io_error_detected - called when PCI error is detected
  3896. * @pdev: Pointer to PCI device
  3897. * @state: The current pci connection state
  3898. *
  3899. * This function is called after a PCI bus error affecting
  3900. * this device has been detected.
  3901. **/
  3902. static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
  3903. pci_channel_state_t state)
  3904. {
  3905. struct net_device *netdev = pci_get_drvdata(pdev);
  3906. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3907. if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  3908. return PCI_ERS_RESULT_DISCONNECT;
  3909. rtnl_lock();
  3910. netif_device_detach(netdev);
  3911. if (netif_running(netdev))
  3912. ixgbevf_close_suspend(adapter);
  3913. if (state == pci_channel_io_perm_failure) {
  3914. rtnl_unlock();
  3915. return PCI_ERS_RESULT_DISCONNECT;
  3916. }
  3917. if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
  3918. pci_disable_device(pdev);
  3919. rtnl_unlock();
  3920. /* Request a slot slot reset. */
  3921. return PCI_ERS_RESULT_NEED_RESET;
  3922. }
  3923. /**
  3924. * ixgbevf_io_slot_reset - called after the pci bus has been reset.
  3925. * @pdev: Pointer to PCI device
  3926. *
  3927. * Restart the card from scratch, as if from a cold-boot. Implementation
  3928. * resembles the first-half of the ixgbevf_resume routine.
  3929. **/
  3930. static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
  3931. {
  3932. struct net_device *netdev = pci_get_drvdata(pdev);
  3933. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3934. if (pci_enable_device_mem(pdev)) {
  3935. dev_err(&pdev->dev,
  3936. "Cannot re-enable PCI device after reset.\n");
  3937. return PCI_ERS_RESULT_DISCONNECT;
  3938. }
  3939. adapter->hw.hw_addr = adapter->io_addr;
  3940. smp_mb__before_atomic();
  3941. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  3942. pci_set_master(pdev);
  3943. ixgbevf_reset(adapter);
  3944. return PCI_ERS_RESULT_RECOVERED;
  3945. }
  3946. /**
  3947. * ixgbevf_io_resume - called when traffic can start flowing again.
  3948. * @pdev: Pointer to PCI device
  3949. *
  3950. * This callback is called when the error recovery driver tells us that
  3951. * its OK to resume normal operation. Implementation resembles the
  3952. * second-half of the ixgbevf_resume routine.
  3953. **/
  3954. static void ixgbevf_io_resume(struct pci_dev *pdev)
  3955. {
  3956. struct net_device *netdev = pci_get_drvdata(pdev);
  3957. rtnl_lock();
  3958. if (netif_running(netdev))
  3959. ixgbevf_open(netdev);
  3960. netif_device_attach(netdev);
  3961. rtnl_unlock();
  3962. }
  3963. /* PCI Error Recovery (ERS) */
  3964. static const struct pci_error_handlers ixgbevf_err_handler = {
  3965. .error_detected = ixgbevf_io_error_detected,
  3966. .slot_reset = ixgbevf_io_slot_reset,
  3967. .resume = ixgbevf_io_resume,
  3968. };
  3969. static struct pci_driver ixgbevf_driver = {
  3970. .name = ixgbevf_driver_name,
  3971. .id_table = ixgbevf_pci_tbl,
  3972. .probe = ixgbevf_probe,
  3973. .remove = ixgbevf_remove,
  3974. #ifdef CONFIG_PM
  3975. /* Power Management Hooks */
  3976. .suspend = ixgbevf_suspend,
  3977. .resume = ixgbevf_resume,
  3978. #endif
  3979. .shutdown = ixgbevf_shutdown,
  3980. .err_handler = &ixgbevf_err_handler
  3981. };
  3982. /**
  3983. * ixgbevf_init_module - Driver Registration Routine
  3984. *
  3985. * ixgbevf_init_module is the first routine called when the driver is
  3986. * loaded. All it does is register with the PCI subsystem.
  3987. **/
  3988. static int __init ixgbevf_init_module(void)
  3989. {
  3990. pr_info("%s - version %s\n", ixgbevf_driver_string,
  3991. ixgbevf_driver_version);
  3992. pr_info("%s\n", ixgbevf_copyright);
  3993. ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
  3994. if (!ixgbevf_wq) {
  3995. pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
  3996. return -ENOMEM;
  3997. }
  3998. return pci_register_driver(&ixgbevf_driver);
  3999. }
  4000. module_init(ixgbevf_init_module);
  4001. /**
  4002. * ixgbevf_exit_module - Driver Exit Cleanup Routine
  4003. *
  4004. * ixgbevf_exit_module is called just before the driver is removed
  4005. * from memory.
  4006. **/
  4007. static void __exit ixgbevf_exit_module(void)
  4008. {
  4009. pci_unregister_driver(&ixgbevf_driver);
  4010. if (ixgbevf_wq) {
  4011. destroy_workqueue(ixgbevf_wq);
  4012. ixgbevf_wq = NULL;
  4013. }
  4014. }
  4015. #ifdef DEBUG
  4016. /**
  4017. * ixgbevf_get_hw_dev_name - return device name string
  4018. * used by hardware layer to print debugging information
  4019. * @hw: pointer to private hardware struct
  4020. **/
  4021. char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
  4022. {
  4023. struct ixgbevf_adapter *adapter = hw->back;
  4024. return adapter->netdev->name;
  4025. }
  4026. #endif
  4027. module_exit(ixgbevf_exit_module);
  4028. /* ixgbevf_main.c */