ftmac100.c 31 KB

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  1. /*
  2. * Faraday FTMAC100 10/100 Ethernet
  3. *
  4. * (C) Copyright 2009-2011 Faraday Technology
  5. * Po-Yu Chuang <ratbert@faraday-tech.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <linux/dma-mapping.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/io.h>
  28. #include <linux/mii.h>
  29. #include <linux/module.h>
  30. #include <linux/mod_devicetable.h>
  31. #include <linux/netdevice.h>
  32. #include <linux/platform_device.h>
  33. #include "ftmac100.h"
  34. #define DRV_NAME "ftmac100"
  35. #define DRV_VERSION "0.2"
  36. #define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
  37. #define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
  38. #define MAX_PKT_SIZE 1518
  39. #define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
  40. #if MAX_PKT_SIZE > 0x7ff
  41. #error invalid MAX_PKT_SIZE
  42. #endif
  43. #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
  44. #error invalid RX_BUF_SIZE
  45. #endif
  46. /******************************************************************************
  47. * private data
  48. *****************************************************************************/
  49. struct ftmac100_descs {
  50. struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
  51. struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
  52. };
  53. struct ftmac100 {
  54. struct resource *res;
  55. void __iomem *base;
  56. int irq;
  57. struct ftmac100_descs *descs;
  58. dma_addr_t descs_dma_addr;
  59. unsigned int rx_pointer;
  60. unsigned int tx_clean_pointer;
  61. unsigned int tx_pointer;
  62. unsigned int tx_pending;
  63. spinlock_t tx_lock;
  64. struct net_device *netdev;
  65. struct device *dev;
  66. struct napi_struct napi;
  67. struct mii_if_info mii;
  68. };
  69. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  70. struct ftmac100_rxdes *rxdes, gfp_t gfp);
  71. /******************************************************************************
  72. * internal functions (hardware register access)
  73. *****************************************************************************/
  74. #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
  75. FTMAC100_INT_NORXBUF | \
  76. FTMAC100_INT_XPKT_OK | \
  77. FTMAC100_INT_XPKT_LOST | \
  78. FTMAC100_INT_RPKT_LOST | \
  79. FTMAC100_INT_AHB_ERR | \
  80. FTMAC100_INT_PHYSTS_CHG)
  81. #define INT_MASK_ALL_DISABLED 0
  82. static void ftmac100_enable_all_int(struct ftmac100 *priv)
  83. {
  84. iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
  85. }
  86. static void ftmac100_disable_all_int(struct ftmac100 *priv)
  87. {
  88. iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
  89. }
  90. static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  91. {
  92. iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
  93. }
  94. static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  95. {
  96. iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
  97. }
  98. static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
  99. {
  100. iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
  101. }
  102. static int ftmac100_reset(struct ftmac100 *priv)
  103. {
  104. struct net_device *netdev = priv->netdev;
  105. int i;
  106. /* NOTE: reset clears all registers */
  107. iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
  108. for (i = 0; i < 5; i++) {
  109. unsigned int maccr;
  110. maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
  111. if (!(maccr & FTMAC100_MACCR_SW_RST)) {
  112. /*
  113. * FTMAC100_MACCR_SW_RST cleared does not indicate
  114. * that hardware reset completed (what the f*ck).
  115. * We still need to wait for a while.
  116. */
  117. udelay(500);
  118. return 0;
  119. }
  120. udelay(1000);
  121. }
  122. netdev_err(netdev, "software reset failed\n");
  123. return -EIO;
  124. }
  125. static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
  126. {
  127. unsigned int maddr = mac[0] << 8 | mac[1];
  128. unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
  129. iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
  130. iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
  131. }
  132. #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
  133. FTMAC100_MACCR_RCV_EN | \
  134. FTMAC100_MACCR_XDMA_EN | \
  135. FTMAC100_MACCR_RDMA_EN | \
  136. FTMAC100_MACCR_CRC_APD | \
  137. FTMAC100_MACCR_FULLDUP | \
  138. FTMAC100_MACCR_RX_RUNT | \
  139. FTMAC100_MACCR_RX_BROADPKT)
  140. static int ftmac100_start_hw(struct ftmac100 *priv)
  141. {
  142. struct net_device *netdev = priv->netdev;
  143. if (ftmac100_reset(priv))
  144. return -EIO;
  145. /* setup ring buffer base registers */
  146. ftmac100_set_rx_ring_base(priv,
  147. priv->descs_dma_addr +
  148. offsetof(struct ftmac100_descs, rxdes));
  149. ftmac100_set_tx_ring_base(priv,
  150. priv->descs_dma_addr +
  151. offsetof(struct ftmac100_descs, txdes));
  152. iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
  153. ftmac100_set_mac(priv, netdev->dev_addr);
  154. iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
  155. return 0;
  156. }
  157. static void ftmac100_stop_hw(struct ftmac100 *priv)
  158. {
  159. iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
  160. }
  161. /******************************************************************************
  162. * internal functions (receive descriptor)
  163. *****************************************************************************/
  164. static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
  165. {
  166. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
  167. }
  168. static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
  169. {
  170. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
  171. }
  172. static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
  173. {
  174. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  175. }
  176. static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
  177. {
  178. /* clear status bits */
  179. rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  180. }
  181. static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
  182. {
  183. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
  184. }
  185. static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
  186. {
  187. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
  188. }
  189. static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
  190. {
  191. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
  192. }
  193. static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
  194. {
  195. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
  196. }
  197. static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
  198. {
  199. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
  200. }
  201. static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
  202. {
  203. return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
  204. }
  205. static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
  206. {
  207. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
  208. }
  209. static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
  210. unsigned int size)
  211. {
  212. rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  213. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
  214. }
  215. static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
  216. {
  217. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  218. }
  219. static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
  220. dma_addr_t addr)
  221. {
  222. rxdes->rxdes2 = cpu_to_le32(addr);
  223. }
  224. static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
  225. {
  226. return le32_to_cpu(rxdes->rxdes2);
  227. }
  228. /*
  229. * rxdes3 is not used by hardware. We use it to keep track of page.
  230. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  231. */
  232. static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
  233. {
  234. rxdes->rxdes3 = (unsigned int)page;
  235. }
  236. static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
  237. {
  238. return (struct page *)rxdes->rxdes3;
  239. }
  240. /******************************************************************************
  241. * internal functions (receive)
  242. *****************************************************************************/
  243. static int ftmac100_next_rx_pointer(int pointer)
  244. {
  245. return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
  246. }
  247. static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
  248. {
  249. priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
  250. }
  251. static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
  252. {
  253. return &priv->descs->rxdes[priv->rx_pointer];
  254. }
  255. static struct ftmac100_rxdes *
  256. ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
  257. {
  258. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  259. while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
  260. if (ftmac100_rxdes_first_segment(rxdes))
  261. return rxdes;
  262. ftmac100_rxdes_set_dma_own(rxdes);
  263. ftmac100_rx_pointer_advance(priv);
  264. rxdes = ftmac100_current_rxdes(priv);
  265. }
  266. return NULL;
  267. }
  268. static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
  269. struct ftmac100_rxdes *rxdes)
  270. {
  271. struct net_device *netdev = priv->netdev;
  272. bool error = false;
  273. if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
  274. if (net_ratelimit())
  275. netdev_info(netdev, "rx err\n");
  276. netdev->stats.rx_errors++;
  277. error = true;
  278. }
  279. if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
  280. if (net_ratelimit())
  281. netdev_info(netdev, "rx crc err\n");
  282. netdev->stats.rx_crc_errors++;
  283. error = true;
  284. }
  285. if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
  286. if (net_ratelimit())
  287. netdev_info(netdev, "rx frame too long\n");
  288. netdev->stats.rx_length_errors++;
  289. error = true;
  290. } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
  291. if (net_ratelimit())
  292. netdev_info(netdev, "rx runt\n");
  293. netdev->stats.rx_length_errors++;
  294. error = true;
  295. } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
  296. if (net_ratelimit())
  297. netdev_info(netdev, "rx odd nibble\n");
  298. netdev->stats.rx_length_errors++;
  299. error = true;
  300. }
  301. return error;
  302. }
  303. static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
  304. {
  305. struct net_device *netdev = priv->netdev;
  306. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  307. bool done = false;
  308. if (net_ratelimit())
  309. netdev_dbg(netdev, "drop packet %p\n", rxdes);
  310. do {
  311. if (ftmac100_rxdes_last_segment(rxdes))
  312. done = true;
  313. ftmac100_rxdes_set_dma_own(rxdes);
  314. ftmac100_rx_pointer_advance(priv);
  315. rxdes = ftmac100_current_rxdes(priv);
  316. } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
  317. netdev->stats.rx_dropped++;
  318. }
  319. static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
  320. {
  321. struct net_device *netdev = priv->netdev;
  322. struct ftmac100_rxdes *rxdes;
  323. struct sk_buff *skb;
  324. struct page *page;
  325. dma_addr_t map;
  326. int length;
  327. bool ret;
  328. rxdes = ftmac100_rx_locate_first_segment(priv);
  329. if (!rxdes)
  330. return false;
  331. if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
  332. ftmac100_rx_drop_packet(priv);
  333. return true;
  334. }
  335. /*
  336. * It is impossible to get multi-segment packets
  337. * because we always provide big enough receive buffers.
  338. */
  339. ret = ftmac100_rxdes_last_segment(rxdes);
  340. BUG_ON(!ret);
  341. /* start processing */
  342. skb = netdev_alloc_skb_ip_align(netdev, 128);
  343. if (unlikely(!skb)) {
  344. if (net_ratelimit())
  345. netdev_err(netdev, "rx skb alloc failed\n");
  346. ftmac100_rx_drop_packet(priv);
  347. return true;
  348. }
  349. if (unlikely(ftmac100_rxdes_multicast(rxdes)))
  350. netdev->stats.multicast++;
  351. map = ftmac100_rxdes_get_dma_addr(rxdes);
  352. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  353. length = ftmac100_rxdes_frame_length(rxdes);
  354. page = ftmac100_rxdes_get_page(rxdes);
  355. skb_fill_page_desc(skb, 0, page, 0, length);
  356. skb->len += length;
  357. skb->data_len += length;
  358. if (length > 128) {
  359. skb->truesize += PAGE_SIZE;
  360. /* We pull the minimum amount into linear part */
  361. __pskb_pull_tail(skb, ETH_HLEN);
  362. } else {
  363. /* Small frames are copied into linear part to free one page */
  364. __pskb_pull_tail(skb, length);
  365. }
  366. ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
  367. ftmac100_rx_pointer_advance(priv);
  368. skb->protocol = eth_type_trans(skb, netdev);
  369. netdev->stats.rx_packets++;
  370. netdev->stats.rx_bytes += skb->len;
  371. /* push packet to protocol stack */
  372. netif_receive_skb(skb);
  373. (*processed)++;
  374. return true;
  375. }
  376. /******************************************************************************
  377. * internal functions (transmit descriptor)
  378. *****************************************************************************/
  379. static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
  380. {
  381. /* clear all except end of ring bit */
  382. txdes->txdes0 = 0;
  383. txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  384. txdes->txdes2 = 0;
  385. txdes->txdes3 = 0;
  386. }
  387. static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
  388. {
  389. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  390. }
  391. static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
  392. {
  393. /*
  394. * Make sure dma own bit will not be set before any other
  395. * descriptor fields.
  396. */
  397. wmb();
  398. txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  399. }
  400. static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
  401. {
  402. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
  403. }
  404. static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
  405. {
  406. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
  407. }
  408. static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
  409. {
  410. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  411. }
  412. static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
  413. {
  414. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
  415. }
  416. static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
  417. {
  418. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
  419. }
  420. static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
  421. {
  422. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
  423. }
  424. static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
  425. unsigned int len)
  426. {
  427. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
  428. }
  429. static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
  430. dma_addr_t addr)
  431. {
  432. txdes->txdes2 = cpu_to_le32(addr);
  433. }
  434. static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
  435. {
  436. return le32_to_cpu(txdes->txdes2);
  437. }
  438. /*
  439. * txdes3 is not used by hardware. We use it to keep track of socket buffer.
  440. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  441. */
  442. static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
  443. {
  444. txdes->txdes3 = (unsigned int)skb;
  445. }
  446. static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
  447. {
  448. return (struct sk_buff *)txdes->txdes3;
  449. }
  450. /******************************************************************************
  451. * internal functions (transmit)
  452. *****************************************************************************/
  453. static int ftmac100_next_tx_pointer(int pointer)
  454. {
  455. return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
  456. }
  457. static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
  458. {
  459. priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
  460. }
  461. static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
  462. {
  463. priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
  464. }
  465. static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
  466. {
  467. return &priv->descs->txdes[priv->tx_pointer];
  468. }
  469. static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
  470. {
  471. return &priv->descs->txdes[priv->tx_clean_pointer];
  472. }
  473. static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
  474. {
  475. struct net_device *netdev = priv->netdev;
  476. struct ftmac100_txdes *txdes;
  477. struct sk_buff *skb;
  478. dma_addr_t map;
  479. if (priv->tx_pending == 0)
  480. return false;
  481. txdes = ftmac100_current_clean_txdes(priv);
  482. if (ftmac100_txdes_owned_by_dma(txdes))
  483. return false;
  484. skb = ftmac100_txdes_get_skb(txdes);
  485. map = ftmac100_txdes_get_dma_addr(txdes);
  486. if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
  487. ftmac100_txdes_late_collision(txdes))) {
  488. /*
  489. * packet transmitted to ethernet lost due to late collision
  490. * or excessive collision
  491. */
  492. netdev->stats.tx_aborted_errors++;
  493. } else {
  494. netdev->stats.tx_packets++;
  495. netdev->stats.tx_bytes += skb->len;
  496. }
  497. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  498. dev_kfree_skb(skb);
  499. ftmac100_txdes_reset(txdes);
  500. ftmac100_tx_clean_pointer_advance(priv);
  501. spin_lock(&priv->tx_lock);
  502. priv->tx_pending--;
  503. spin_unlock(&priv->tx_lock);
  504. netif_wake_queue(netdev);
  505. return true;
  506. }
  507. static void ftmac100_tx_complete(struct ftmac100 *priv)
  508. {
  509. while (ftmac100_tx_complete_packet(priv))
  510. ;
  511. }
  512. static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
  513. dma_addr_t map)
  514. {
  515. struct net_device *netdev = priv->netdev;
  516. struct ftmac100_txdes *txdes;
  517. unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
  518. txdes = ftmac100_current_txdes(priv);
  519. ftmac100_tx_pointer_advance(priv);
  520. /* setup TX descriptor */
  521. ftmac100_txdes_set_skb(txdes, skb);
  522. ftmac100_txdes_set_dma_addr(txdes, map);
  523. ftmac100_txdes_set_first_segment(txdes);
  524. ftmac100_txdes_set_last_segment(txdes);
  525. ftmac100_txdes_set_txint(txdes);
  526. ftmac100_txdes_set_buffer_size(txdes, len);
  527. spin_lock(&priv->tx_lock);
  528. priv->tx_pending++;
  529. if (priv->tx_pending == TX_QUEUE_ENTRIES)
  530. netif_stop_queue(netdev);
  531. /* start transmit */
  532. ftmac100_txdes_set_dma_own(txdes);
  533. spin_unlock(&priv->tx_lock);
  534. ftmac100_txdma_start_polling(priv);
  535. return NETDEV_TX_OK;
  536. }
  537. /******************************************************************************
  538. * internal functions (buffer)
  539. *****************************************************************************/
  540. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  541. struct ftmac100_rxdes *rxdes, gfp_t gfp)
  542. {
  543. struct net_device *netdev = priv->netdev;
  544. struct page *page;
  545. dma_addr_t map;
  546. page = alloc_page(gfp);
  547. if (!page) {
  548. if (net_ratelimit())
  549. netdev_err(netdev, "failed to allocate rx page\n");
  550. return -ENOMEM;
  551. }
  552. map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
  553. if (unlikely(dma_mapping_error(priv->dev, map))) {
  554. if (net_ratelimit())
  555. netdev_err(netdev, "failed to map rx page\n");
  556. __free_page(page);
  557. return -ENOMEM;
  558. }
  559. ftmac100_rxdes_set_page(rxdes, page);
  560. ftmac100_rxdes_set_dma_addr(rxdes, map);
  561. ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
  562. ftmac100_rxdes_set_dma_own(rxdes);
  563. return 0;
  564. }
  565. static void ftmac100_free_buffers(struct ftmac100 *priv)
  566. {
  567. int i;
  568. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  569. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  570. struct page *page = ftmac100_rxdes_get_page(rxdes);
  571. dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
  572. if (!page)
  573. continue;
  574. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  575. __free_page(page);
  576. }
  577. for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
  578. struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
  579. struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
  580. dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
  581. if (!skb)
  582. continue;
  583. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  584. dev_kfree_skb(skb);
  585. }
  586. dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
  587. priv->descs, priv->descs_dma_addr);
  588. }
  589. static int ftmac100_alloc_buffers(struct ftmac100 *priv)
  590. {
  591. int i;
  592. priv->descs = dma_zalloc_coherent(priv->dev,
  593. sizeof(struct ftmac100_descs),
  594. &priv->descs_dma_addr,
  595. GFP_KERNEL);
  596. if (!priv->descs)
  597. return -ENOMEM;
  598. /* initialize RX ring */
  599. ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
  600. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  601. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  602. if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
  603. goto err;
  604. }
  605. /* initialize TX ring */
  606. ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
  607. return 0;
  608. err:
  609. ftmac100_free_buffers(priv);
  610. return -ENOMEM;
  611. }
  612. /******************************************************************************
  613. * struct mii_if_info functions
  614. *****************************************************************************/
  615. static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
  616. {
  617. struct ftmac100 *priv = netdev_priv(netdev);
  618. unsigned int phycr;
  619. int i;
  620. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  621. FTMAC100_PHYCR_REGAD(reg) |
  622. FTMAC100_PHYCR_MIIRD;
  623. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  624. for (i = 0; i < 10; i++) {
  625. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  626. if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
  627. return phycr & FTMAC100_PHYCR_MIIRDATA;
  628. udelay(100);
  629. }
  630. netdev_err(netdev, "mdio read timed out\n");
  631. return 0;
  632. }
  633. static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
  634. int data)
  635. {
  636. struct ftmac100 *priv = netdev_priv(netdev);
  637. unsigned int phycr;
  638. int i;
  639. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  640. FTMAC100_PHYCR_REGAD(reg) |
  641. FTMAC100_PHYCR_MIIWR;
  642. data = FTMAC100_PHYWDATA_MIIWDATA(data);
  643. iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
  644. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  645. for (i = 0; i < 10; i++) {
  646. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  647. if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
  648. return;
  649. udelay(100);
  650. }
  651. netdev_err(netdev, "mdio write timed out\n");
  652. }
  653. /******************************************************************************
  654. * struct ethtool_ops functions
  655. *****************************************************************************/
  656. static void ftmac100_get_drvinfo(struct net_device *netdev,
  657. struct ethtool_drvinfo *info)
  658. {
  659. strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
  660. strlcpy(info->version, DRV_VERSION, sizeof(info->version));
  661. strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
  662. }
  663. static int ftmac100_get_link_ksettings(struct net_device *netdev,
  664. struct ethtool_link_ksettings *cmd)
  665. {
  666. struct ftmac100 *priv = netdev_priv(netdev);
  667. mii_ethtool_get_link_ksettings(&priv->mii, cmd);
  668. return 0;
  669. }
  670. static int ftmac100_set_link_ksettings(struct net_device *netdev,
  671. const struct ethtool_link_ksettings *cmd)
  672. {
  673. struct ftmac100 *priv = netdev_priv(netdev);
  674. return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
  675. }
  676. static int ftmac100_nway_reset(struct net_device *netdev)
  677. {
  678. struct ftmac100 *priv = netdev_priv(netdev);
  679. return mii_nway_restart(&priv->mii);
  680. }
  681. static u32 ftmac100_get_link(struct net_device *netdev)
  682. {
  683. struct ftmac100 *priv = netdev_priv(netdev);
  684. return mii_link_ok(&priv->mii);
  685. }
  686. static const struct ethtool_ops ftmac100_ethtool_ops = {
  687. .get_drvinfo = ftmac100_get_drvinfo,
  688. .nway_reset = ftmac100_nway_reset,
  689. .get_link = ftmac100_get_link,
  690. .get_link_ksettings = ftmac100_get_link_ksettings,
  691. .set_link_ksettings = ftmac100_set_link_ksettings,
  692. };
  693. /******************************************************************************
  694. * interrupt handler
  695. *****************************************************************************/
  696. static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
  697. {
  698. struct net_device *netdev = dev_id;
  699. struct ftmac100 *priv = netdev_priv(netdev);
  700. /* Disable interrupts for polling */
  701. ftmac100_disable_all_int(priv);
  702. if (likely(netif_running(netdev)))
  703. napi_schedule(&priv->napi);
  704. return IRQ_HANDLED;
  705. }
  706. /******************************************************************************
  707. * struct napi_struct functions
  708. *****************************************************************************/
  709. static int ftmac100_poll(struct napi_struct *napi, int budget)
  710. {
  711. struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
  712. struct net_device *netdev = priv->netdev;
  713. unsigned int status;
  714. bool completed = true;
  715. int rx = 0;
  716. status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
  717. if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
  718. /*
  719. * FTMAC100_INT_RPKT_FINISH:
  720. * RX DMA has received packets into RX buffer successfully
  721. *
  722. * FTMAC100_INT_NORXBUF:
  723. * RX buffer unavailable
  724. */
  725. bool retry;
  726. do {
  727. retry = ftmac100_rx_packet(priv, &rx);
  728. } while (retry && rx < budget);
  729. if (retry && rx == budget)
  730. completed = false;
  731. }
  732. if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
  733. /*
  734. * FTMAC100_INT_XPKT_OK:
  735. * packet transmitted to ethernet successfully
  736. *
  737. * FTMAC100_INT_XPKT_LOST:
  738. * packet transmitted to ethernet lost due to late
  739. * collision or excessive collision
  740. */
  741. ftmac100_tx_complete(priv);
  742. }
  743. if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
  744. FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
  745. if (net_ratelimit())
  746. netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
  747. status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
  748. status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
  749. status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
  750. status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
  751. if (status & FTMAC100_INT_NORXBUF) {
  752. /* RX buffer unavailable */
  753. netdev->stats.rx_over_errors++;
  754. }
  755. if (status & FTMAC100_INT_RPKT_LOST) {
  756. /* received packet lost due to RX FIFO full */
  757. netdev->stats.rx_fifo_errors++;
  758. }
  759. if (status & FTMAC100_INT_PHYSTS_CHG) {
  760. /* PHY link status change */
  761. mii_check_link(&priv->mii);
  762. }
  763. }
  764. if (completed) {
  765. /* stop polling */
  766. napi_complete(napi);
  767. ftmac100_enable_all_int(priv);
  768. }
  769. return rx;
  770. }
  771. /******************************************************************************
  772. * struct net_device_ops functions
  773. *****************************************************************************/
  774. static int ftmac100_open(struct net_device *netdev)
  775. {
  776. struct ftmac100 *priv = netdev_priv(netdev);
  777. int err;
  778. err = ftmac100_alloc_buffers(priv);
  779. if (err) {
  780. netdev_err(netdev, "failed to allocate buffers\n");
  781. goto err_alloc;
  782. }
  783. err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
  784. if (err) {
  785. netdev_err(netdev, "failed to request irq %d\n", priv->irq);
  786. goto err_irq;
  787. }
  788. priv->rx_pointer = 0;
  789. priv->tx_clean_pointer = 0;
  790. priv->tx_pointer = 0;
  791. priv->tx_pending = 0;
  792. err = ftmac100_start_hw(priv);
  793. if (err)
  794. goto err_hw;
  795. napi_enable(&priv->napi);
  796. netif_start_queue(netdev);
  797. ftmac100_enable_all_int(priv);
  798. return 0;
  799. err_hw:
  800. free_irq(priv->irq, netdev);
  801. err_irq:
  802. ftmac100_free_buffers(priv);
  803. err_alloc:
  804. return err;
  805. }
  806. static int ftmac100_stop(struct net_device *netdev)
  807. {
  808. struct ftmac100 *priv = netdev_priv(netdev);
  809. ftmac100_disable_all_int(priv);
  810. netif_stop_queue(netdev);
  811. napi_disable(&priv->napi);
  812. ftmac100_stop_hw(priv);
  813. free_irq(priv->irq, netdev);
  814. ftmac100_free_buffers(priv);
  815. return 0;
  816. }
  817. static netdev_tx_t
  818. ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
  819. {
  820. struct ftmac100 *priv = netdev_priv(netdev);
  821. dma_addr_t map;
  822. if (unlikely(skb->len > MAX_PKT_SIZE)) {
  823. if (net_ratelimit())
  824. netdev_dbg(netdev, "tx packet too big\n");
  825. netdev->stats.tx_dropped++;
  826. dev_kfree_skb(skb);
  827. return NETDEV_TX_OK;
  828. }
  829. map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  830. if (unlikely(dma_mapping_error(priv->dev, map))) {
  831. /* drop packet */
  832. if (net_ratelimit())
  833. netdev_err(netdev, "map socket buffer failed\n");
  834. netdev->stats.tx_dropped++;
  835. dev_kfree_skb(skb);
  836. return NETDEV_TX_OK;
  837. }
  838. return ftmac100_xmit(priv, skb, map);
  839. }
  840. /* optional */
  841. static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  842. {
  843. struct ftmac100 *priv = netdev_priv(netdev);
  844. struct mii_ioctl_data *data = if_mii(ifr);
  845. return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
  846. }
  847. static const struct net_device_ops ftmac100_netdev_ops = {
  848. .ndo_open = ftmac100_open,
  849. .ndo_stop = ftmac100_stop,
  850. .ndo_start_xmit = ftmac100_hard_start_xmit,
  851. .ndo_set_mac_address = eth_mac_addr,
  852. .ndo_validate_addr = eth_validate_addr,
  853. .ndo_do_ioctl = ftmac100_do_ioctl,
  854. };
  855. /******************************************************************************
  856. * struct platform_driver functions
  857. *****************************************************************************/
  858. static int ftmac100_probe(struct platform_device *pdev)
  859. {
  860. struct resource *res;
  861. int irq;
  862. struct net_device *netdev;
  863. struct ftmac100 *priv;
  864. int err;
  865. if (!pdev)
  866. return -ENODEV;
  867. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  868. if (!res)
  869. return -ENXIO;
  870. irq = platform_get_irq(pdev, 0);
  871. if (irq < 0)
  872. return irq;
  873. /* setup net_device */
  874. netdev = alloc_etherdev(sizeof(*priv));
  875. if (!netdev) {
  876. err = -ENOMEM;
  877. goto err_alloc_etherdev;
  878. }
  879. SET_NETDEV_DEV(netdev, &pdev->dev);
  880. netdev->ethtool_ops = &ftmac100_ethtool_ops;
  881. netdev->netdev_ops = &ftmac100_netdev_ops;
  882. platform_set_drvdata(pdev, netdev);
  883. /* setup private data */
  884. priv = netdev_priv(netdev);
  885. priv->netdev = netdev;
  886. priv->dev = &pdev->dev;
  887. spin_lock_init(&priv->tx_lock);
  888. /* initialize NAPI */
  889. netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
  890. /* map io memory */
  891. priv->res = request_mem_region(res->start, resource_size(res),
  892. dev_name(&pdev->dev));
  893. if (!priv->res) {
  894. dev_err(&pdev->dev, "Could not reserve memory region\n");
  895. err = -ENOMEM;
  896. goto err_req_mem;
  897. }
  898. priv->base = ioremap(res->start, resource_size(res));
  899. if (!priv->base) {
  900. dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
  901. err = -EIO;
  902. goto err_ioremap;
  903. }
  904. priv->irq = irq;
  905. /* initialize struct mii_if_info */
  906. priv->mii.phy_id = 0;
  907. priv->mii.phy_id_mask = 0x1f;
  908. priv->mii.reg_num_mask = 0x1f;
  909. priv->mii.dev = netdev;
  910. priv->mii.mdio_read = ftmac100_mdio_read;
  911. priv->mii.mdio_write = ftmac100_mdio_write;
  912. /* register network device */
  913. err = register_netdev(netdev);
  914. if (err) {
  915. dev_err(&pdev->dev, "Failed to register netdev\n");
  916. goto err_register_netdev;
  917. }
  918. netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
  919. if (!is_valid_ether_addr(netdev->dev_addr)) {
  920. eth_hw_addr_random(netdev);
  921. netdev_info(netdev, "generated random MAC address %pM\n",
  922. netdev->dev_addr);
  923. }
  924. return 0;
  925. err_register_netdev:
  926. iounmap(priv->base);
  927. err_ioremap:
  928. release_resource(priv->res);
  929. err_req_mem:
  930. netif_napi_del(&priv->napi);
  931. free_netdev(netdev);
  932. err_alloc_etherdev:
  933. return err;
  934. }
  935. static int ftmac100_remove(struct platform_device *pdev)
  936. {
  937. struct net_device *netdev;
  938. struct ftmac100 *priv;
  939. netdev = platform_get_drvdata(pdev);
  940. priv = netdev_priv(netdev);
  941. unregister_netdev(netdev);
  942. iounmap(priv->base);
  943. release_resource(priv->res);
  944. netif_napi_del(&priv->napi);
  945. free_netdev(netdev);
  946. return 0;
  947. }
  948. static const struct of_device_id ftmac100_of_ids[] = {
  949. { .compatible = "andestech,atmac100" },
  950. { }
  951. };
  952. static struct platform_driver ftmac100_driver = {
  953. .probe = ftmac100_probe,
  954. .remove = ftmac100_remove,
  955. .driver = {
  956. .name = DRV_NAME,
  957. .of_match_table = ftmac100_of_ids
  958. },
  959. };
  960. /******************************************************************************
  961. * initialization / finalization
  962. *****************************************************************************/
  963. static int __init ftmac100_init(void)
  964. {
  965. pr_info("Loading version " DRV_VERSION " ...\n");
  966. return platform_driver_register(&ftmac100_driver);
  967. }
  968. static void __exit ftmac100_exit(void)
  969. {
  970. platform_driver_unregister(&ftmac100_driver);
  971. }
  972. module_init(ftmac100_init);
  973. module_exit(ftmac100_exit);
  974. MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
  975. MODULE_DESCRIPTION("FTMAC100 driver");
  976. MODULE_LICENSE("GPL");
  977. MODULE_DEVICE_TABLE(of, ftmac100_of_ids);