emac_main.c 26 KB

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  1. /*
  2. * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Driver for the ARC EMAC 10100 (hardware revision 5)
  9. *
  10. * Contributors:
  11. * Amit Bhor
  12. * Sameer Dhavale
  13. * Vineet Gupta
  14. */
  15. #include <linux/crc32.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/of_address.h>
  21. #include <linux/of_irq.h>
  22. #include <linux/of_mdio.h>
  23. #include <linux/of_net.h>
  24. #include <linux/of_platform.h>
  25. #include "emac.h"
  26. static void arc_emac_restart(struct net_device *ndev);
  27. /**
  28. * arc_emac_tx_avail - Return the number of available slots in the tx ring.
  29. * @priv: Pointer to ARC EMAC private data structure.
  30. *
  31. * returns: the number of slots available for transmission in tx the ring.
  32. */
  33. static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
  34. {
  35. return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
  36. }
  37. /**
  38. * arc_emac_adjust_link - Adjust the PHY link duplex.
  39. * @ndev: Pointer to the net_device structure.
  40. *
  41. * This function is called to change the duplex setting after auto negotiation
  42. * is done by the PHY.
  43. */
  44. static void arc_emac_adjust_link(struct net_device *ndev)
  45. {
  46. struct arc_emac_priv *priv = netdev_priv(ndev);
  47. struct phy_device *phy_dev = ndev->phydev;
  48. unsigned int reg, state_changed = 0;
  49. if (priv->link != phy_dev->link) {
  50. priv->link = phy_dev->link;
  51. state_changed = 1;
  52. }
  53. if (priv->speed != phy_dev->speed) {
  54. priv->speed = phy_dev->speed;
  55. state_changed = 1;
  56. if (priv->set_mac_speed)
  57. priv->set_mac_speed(priv, priv->speed);
  58. }
  59. if (priv->duplex != phy_dev->duplex) {
  60. reg = arc_reg_get(priv, R_CTRL);
  61. if (phy_dev->duplex == DUPLEX_FULL)
  62. reg |= ENFL_MASK;
  63. else
  64. reg &= ~ENFL_MASK;
  65. arc_reg_set(priv, R_CTRL, reg);
  66. priv->duplex = phy_dev->duplex;
  67. state_changed = 1;
  68. }
  69. if (state_changed)
  70. phy_print_status(phy_dev);
  71. }
  72. /**
  73. * arc_emac_get_drvinfo - Get EMAC driver information.
  74. * @ndev: Pointer to net_device structure.
  75. * @info: Pointer to ethtool_drvinfo structure.
  76. *
  77. * This implements ethtool command for getting the driver information.
  78. * Issue "ethtool -i ethX" under linux prompt to execute this function.
  79. */
  80. static void arc_emac_get_drvinfo(struct net_device *ndev,
  81. struct ethtool_drvinfo *info)
  82. {
  83. struct arc_emac_priv *priv = netdev_priv(ndev);
  84. strlcpy(info->driver, priv->drv_name, sizeof(info->driver));
  85. strlcpy(info->version, priv->drv_version, sizeof(info->version));
  86. }
  87. static const struct ethtool_ops arc_emac_ethtool_ops = {
  88. .get_drvinfo = arc_emac_get_drvinfo,
  89. .get_link = ethtool_op_get_link,
  90. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  91. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  92. };
  93. #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
  94. /**
  95. * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
  96. * @ndev: Pointer to the network device.
  97. */
  98. static void arc_emac_tx_clean(struct net_device *ndev)
  99. {
  100. struct arc_emac_priv *priv = netdev_priv(ndev);
  101. struct net_device_stats *stats = &ndev->stats;
  102. unsigned int i;
  103. for (i = 0; i < TX_BD_NUM; i++) {
  104. unsigned int *txbd_dirty = &priv->txbd_dirty;
  105. struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
  106. struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
  107. struct sk_buff *skb = tx_buff->skb;
  108. unsigned int info = le32_to_cpu(txbd->info);
  109. if ((info & FOR_EMAC) || !txbd->data || !skb)
  110. break;
  111. if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
  112. stats->tx_errors++;
  113. stats->tx_dropped++;
  114. if (info & DEFR)
  115. stats->tx_carrier_errors++;
  116. if (info & LTCL)
  117. stats->collisions++;
  118. if (info & UFLO)
  119. stats->tx_fifo_errors++;
  120. } else if (likely(info & FIRST_OR_LAST_MASK)) {
  121. stats->tx_packets++;
  122. stats->tx_bytes += skb->len;
  123. }
  124. dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
  125. dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
  126. /* return the sk_buff to system */
  127. dev_kfree_skb_irq(skb);
  128. txbd->data = 0;
  129. txbd->info = 0;
  130. tx_buff->skb = NULL;
  131. *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
  132. }
  133. /* Ensure that txbd_dirty is visible to tx() before checking
  134. * for queue stopped.
  135. */
  136. smp_mb();
  137. if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
  138. netif_wake_queue(ndev);
  139. }
  140. /**
  141. * arc_emac_rx - processing of Rx packets.
  142. * @ndev: Pointer to the network device.
  143. * @budget: How many BDs to process on 1 call.
  144. *
  145. * returns: Number of processed BDs
  146. *
  147. * Iterate through Rx BDs and deliver received packages to upper layer.
  148. */
  149. static int arc_emac_rx(struct net_device *ndev, int budget)
  150. {
  151. struct arc_emac_priv *priv = netdev_priv(ndev);
  152. unsigned int work_done;
  153. for (work_done = 0; work_done < budget; work_done++) {
  154. unsigned int *last_rx_bd = &priv->last_rx_bd;
  155. struct net_device_stats *stats = &ndev->stats;
  156. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  157. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  158. unsigned int pktlen, info = le32_to_cpu(rxbd->info);
  159. struct sk_buff *skb;
  160. dma_addr_t addr;
  161. if (unlikely((info & OWN_MASK) == FOR_EMAC))
  162. break;
  163. /* Make a note that we saw a packet at this BD.
  164. * So next time, driver starts from this + 1
  165. */
  166. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  167. if (unlikely((info & FIRST_OR_LAST_MASK) !=
  168. FIRST_OR_LAST_MASK)) {
  169. /* We pre-allocate buffers of MTU size so incoming
  170. * packets won't be split/chained.
  171. */
  172. if (net_ratelimit())
  173. netdev_err(ndev, "incomplete packet received\n");
  174. /* Return ownership to EMAC */
  175. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  176. stats->rx_errors++;
  177. stats->rx_length_errors++;
  178. continue;
  179. }
  180. /* Prepare the BD for next cycle. netif_receive_skb()
  181. * only if new skb was allocated and mapped to avoid holes
  182. * in the RX fifo.
  183. */
  184. skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE);
  185. if (unlikely(!skb)) {
  186. if (net_ratelimit())
  187. netdev_err(ndev, "cannot allocate skb\n");
  188. /* Return ownership to EMAC */
  189. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  190. stats->rx_errors++;
  191. stats->rx_dropped++;
  192. continue;
  193. }
  194. addr = dma_map_single(&ndev->dev, (void *)skb->data,
  195. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  196. if (dma_mapping_error(&ndev->dev, addr)) {
  197. if (net_ratelimit())
  198. netdev_err(ndev, "cannot map dma buffer\n");
  199. dev_kfree_skb(skb);
  200. /* Return ownership to EMAC */
  201. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  202. stats->rx_errors++;
  203. stats->rx_dropped++;
  204. continue;
  205. }
  206. /* unmap previosly mapped skb */
  207. dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
  208. dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
  209. pktlen = info & LEN_MASK;
  210. stats->rx_packets++;
  211. stats->rx_bytes += pktlen;
  212. skb_put(rx_buff->skb, pktlen);
  213. rx_buff->skb->dev = ndev;
  214. rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev);
  215. netif_receive_skb(rx_buff->skb);
  216. rx_buff->skb = skb;
  217. dma_unmap_addr_set(rx_buff, addr, addr);
  218. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  219. rxbd->data = cpu_to_le32(addr);
  220. /* Make sure pointer to data buffer is set */
  221. wmb();
  222. /* Return ownership to EMAC */
  223. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  224. }
  225. return work_done;
  226. }
  227. /**
  228. * arc_emac_rx_miss_handle - handle R_MISS register
  229. * @ndev: Pointer to the net_device structure.
  230. */
  231. static void arc_emac_rx_miss_handle(struct net_device *ndev)
  232. {
  233. struct arc_emac_priv *priv = netdev_priv(ndev);
  234. struct net_device_stats *stats = &ndev->stats;
  235. unsigned int miss;
  236. miss = arc_reg_get(priv, R_MISS);
  237. if (miss) {
  238. stats->rx_errors += miss;
  239. stats->rx_missed_errors += miss;
  240. priv->rx_missed_errors += miss;
  241. }
  242. }
  243. /**
  244. * arc_emac_rx_stall_check - check RX stall
  245. * @ndev: Pointer to the net_device structure.
  246. * @budget: How many BDs requested to process on 1 call.
  247. * @work_done: How many BDs processed
  248. *
  249. * Under certain conditions EMAC stop reception of incoming packets and
  250. * continuously increment R_MISS register instead of saving data into
  251. * provided buffer. This function detect that condition and restart
  252. * EMAC.
  253. */
  254. static void arc_emac_rx_stall_check(struct net_device *ndev,
  255. int budget, unsigned int work_done)
  256. {
  257. struct arc_emac_priv *priv = netdev_priv(ndev);
  258. struct arc_emac_bd *rxbd;
  259. if (work_done)
  260. priv->rx_missed_errors = 0;
  261. if (priv->rx_missed_errors && budget) {
  262. rxbd = &priv->rxbd[priv->last_rx_bd];
  263. if (le32_to_cpu(rxbd->info) & FOR_EMAC) {
  264. arc_emac_restart(ndev);
  265. priv->rx_missed_errors = 0;
  266. }
  267. }
  268. }
  269. /**
  270. * arc_emac_poll - NAPI poll handler.
  271. * @napi: Pointer to napi_struct structure.
  272. * @budget: How many BDs to process on 1 call.
  273. *
  274. * returns: Number of processed BDs
  275. */
  276. static int arc_emac_poll(struct napi_struct *napi, int budget)
  277. {
  278. struct net_device *ndev = napi->dev;
  279. struct arc_emac_priv *priv = netdev_priv(ndev);
  280. unsigned int work_done;
  281. arc_emac_tx_clean(ndev);
  282. arc_emac_rx_miss_handle(ndev);
  283. work_done = arc_emac_rx(ndev, budget);
  284. if (work_done < budget) {
  285. napi_complete_done(napi, work_done);
  286. arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
  287. }
  288. arc_emac_rx_stall_check(ndev, budget, work_done);
  289. return work_done;
  290. }
  291. /**
  292. * arc_emac_intr - Global interrupt handler for EMAC.
  293. * @irq: irq number.
  294. * @dev_instance: device instance.
  295. *
  296. * returns: IRQ_HANDLED for all cases.
  297. *
  298. * ARC EMAC has only 1 interrupt line, and depending on bits raised in
  299. * STATUS register we may tell what is a reason for interrupt to fire.
  300. */
  301. static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
  302. {
  303. struct net_device *ndev = dev_instance;
  304. struct arc_emac_priv *priv = netdev_priv(ndev);
  305. struct net_device_stats *stats = &ndev->stats;
  306. unsigned int status;
  307. status = arc_reg_get(priv, R_STATUS);
  308. status &= ~MDIO_MASK;
  309. /* Reset all flags except "MDIO complete" */
  310. arc_reg_set(priv, R_STATUS, status);
  311. if (status & (RXINT_MASK | TXINT_MASK)) {
  312. if (likely(napi_schedule_prep(&priv->napi))) {
  313. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
  314. __napi_schedule(&priv->napi);
  315. }
  316. }
  317. if (status & ERR_MASK) {
  318. /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
  319. * 8-bit error counter overrun.
  320. */
  321. if (status & MSER_MASK) {
  322. stats->rx_missed_errors += 0x100;
  323. stats->rx_errors += 0x100;
  324. priv->rx_missed_errors += 0x100;
  325. napi_schedule(&priv->napi);
  326. }
  327. if (status & RXCR_MASK) {
  328. stats->rx_crc_errors += 0x100;
  329. stats->rx_errors += 0x100;
  330. }
  331. if (status & RXFR_MASK) {
  332. stats->rx_frame_errors += 0x100;
  333. stats->rx_errors += 0x100;
  334. }
  335. if (status & RXFL_MASK) {
  336. stats->rx_over_errors += 0x100;
  337. stats->rx_errors += 0x100;
  338. }
  339. }
  340. return IRQ_HANDLED;
  341. }
  342. #ifdef CONFIG_NET_POLL_CONTROLLER
  343. static void arc_emac_poll_controller(struct net_device *dev)
  344. {
  345. disable_irq(dev->irq);
  346. arc_emac_intr(dev->irq, dev);
  347. enable_irq(dev->irq);
  348. }
  349. #endif
  350. /**
  351. * arc_emac_open - Open the network device.
  352. * @ndev: Pointer to the network device.
  353. *
  354. * returns: 0, on success or non-zero error value on failure.
  355. *
  356. * This function sets the MAC address, requests and enables an IRQ
  357. * for the EMAC device and starts the Tx queue.
  358. * It also connects to the phy device.
  359. */
  360. static int arc_emac_open(struct net_device *ndev)
  361. {
  362. struct arc_emac_priv *priv = netdev_priv(ndev);
  363. struct phy_device *phy_dev = ndev->phydev;
  364. int i;
  365. phy_dev->autoneg = AUTONEG_ENABLE;
  366. phy_dev->speed = 0;
  367. phy_dev->duplex = 0;
  368. phy_dev->advertising &= phy_dev->supported;
  369. priv->last_rx_bd = 0;
  370. /* Allocate and set buffers for Rx BD's */
  371. for (i = 0; i < RX_BD_NUM; i++) {
  372. dma_addr_t addr;
  373. unsigned int *last_rx_bd = &priv->last_rx_bd;
  374. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  375. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  376. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  377. EMAC_BUFFER_SIZE);
  378. if (unlikely(!rx_buff->skb))
  379. return -ENOMEM;
  380. addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
  381. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  382. if (dma_mapping_error(&ndev->dev, addr)) {
  383. netdev_err(ndev, "cannot dma map\n");
  384. dev_kfree_skb(rx_buff->skb);
  385. return -ENOMEM;
  386. }
  387. dma_unmap_addr_set(rx_buff, addr, addr);
  388. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  389. rxbd->data = cpu_to_le32(addr);
  390. /* Make sure pointer to data buffer is set */
  391. wmb();
  392. /* Return ownership to EMAC */
  393. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  394. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  395. }
  396. priv->txbd_curr = 0;
  397. priv->txbd_dirty = 0;
  398. /* Clean Tx BD's */
  399. memset(priv->txbd, 0, TX_RING_SZ);
  400. /* Initialize logical address filter */
  401. arc_reg_set(priv, R_LAFL, 0);
  402. arc_reg_set(priv, R_LAFH, 0);
  403. /* Set BD ring pointers for device side */
  404. arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
  405. arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
  406. /* Enable interrupts */
  407. arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  408. /* Set CONTROL */
  409. arc_reg_set(priv, R_CTRL,
  410. (RX_BD_NUM << 24) | /* RX BD table length */
  411. (TX_BD_NUM << 16) | /* TX BD table length */
  412. TXRN_MASK | RXRN_MASK);
  413. napi_enable(&priv->napi);
  414. /* Enable EMAC */
  415. arc_reg_or(priv, R_CTRL, EN_MASK);
  416. phy_start(ndev->phydev);
  417. netif_start_queue(ndev);
  418. return 0;
  419. }
  420. /**
  421. * arc_emac_set_rx_mode - Change the receive filtering mode.
  422. * @ndev: Pointer to the network device.
  423. *
  424. * This function enables/disables promiscuous or all-multicast mode
  425. * and updates the multicast filtering list of the network device.
  426. */
  427. static void arc_emac_set_rx_mode(struct net_device *ndev)
  428. {
  429. struct arc_emac_priv *priv = netdev_priv(ndev);
  430. if (ndev->flags & IFF_PROMISC) {
  431. arc_reg_or(priv, R_CTRL, PROM_MASK);
  432. } else {
  433. arc_reg_clr(priv, R_CTRL, PROM_MASK);
  434. if (ndev->flags & IFF_ALLMULTI) {
  435. arc_reg_set(priv, R_LAFL, ~0);
  436. arc_reg_set(priv, R_LAFH, ~0);
  437. } else if (ndev->flags & IFF_MULTICAST) {
  438. struct netdev_hw_addr *ha;
  439. unsigned int filter[2] = { 0, 0 };
  440. int bit;
  441. netdev_for_each_mc_addr(ha, ndev) {
  442. bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
  443. filter[bit >> 5] |= 1 << (bit & 31);
  444. }
  445. arc_reg_set(priv, R_LAFL, filter[0]);
  446. arc_reg_set(priv, R_LAFH, filter[1]);
  447. } else {
  448. arc_reg_set(priv, R_LAFL, 0);
  449. arc_reg_set(priv, R_LAFH, 0);
  450. }
  451. }
  452. }
  453. /**
  454. * arc_free_tx_queue - free skb from tx queue
  455. * @ndev: Pointer to the network device.
  456. *
  457. * This function must be called while EMAC disable
  458. */
  459. static void arc_free_tx_queue(struct net_device *ndev)
  460. {
  461. struct arc_emac_priv *priv = netdev_priv(ndev);
  462. unsigned int i;
  463. for (i = 0; i < TX_BD_NUM; i++) {
  464. struct arc_emac_bd *txbd = &priv->txbd[i];
  465. struct buffer_state *tx_buff = &priv->tx_buff[i];
  466. if (tx_buff->skb) {
  467. dma_unmap_single(&ndev->dev,
  468. dma_unmap_addr(tx_buff, addr),
  469. dma_unmap_len(tx_buff, len),
  470. DMA_TO_DEVICE);
  471. /* return the sk_buff to system */
  472. dev_kfree_skb_irq(tx_buff->skb);
  473. }
  474. txbd->info = 0;
  475. txbd->data = 0;
  476. tx_buff->skb = NULL;
  477. }
  478. }
  479. /**
  480. * arc_free_rx_queue - free skb from rx queue
  481. * @ndev: Pointer to the network device.
  482. *
  483. * This function must be called while EMAC disable
  484. */
  485. static void arc_free_rx_queue(struct net_device *ndev)
  486. {
  487. struct arc_emac_priv *priv = netdev_priv(ndev);
  488. unsigned int i;
  489. for (i = 0; i < RX_BD_NUM; i++) {
  490. struct arc_emac_bd *rxbd = &priv->rxbd[i];
  491. struct buffer_state *rx_buff = &priv->rx_buff[i];
  492. if (rx_buff->skb) {
  493. dma_unmap_single(&ndev->dev,
  494. dma_unmap_addr(rx_buff, addr),
  495. dma_unmap_len(rx_buff, len),
  496. DMA_FROM_DEVICE);
  497. /* return the sk_buff to system */
  498. dev_kfree_skb_irq(rx_buff->skb);
  499. }
  500. rxbd->info = 0;
  501. rxbd->data = 0;
  502. rx_buff->skb = NULL;
  503. }
  504. }
  505. /**
  506. * arc_emac_stop - Close the network device.
  507. * @ndev: Pointer to the network device.
  508. *
  509. * This function stops the Tx queue, disables interrupts and frees the IRQ for
  510. * the EMAC device.
  511. * It also disconnects the PHY device associated with the EMAC device.
  512. */
  513. static int arc_emac_stop(struct net_device *ndev)
  514. {
  515. struct arc_emac_priv *priv = netdev_priv(ndev);
  516. napi_disable(&priv->napi);
  517. netif_stop_queue(ndev);
  518. phy_stop(ndev->phydev);
  519. /* Disable interrupts */
  520. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  521. /* Disable EMAC */
  522. arc_reg_clr(priv, R_CTRL, EN_MASK);
  523. /* Return the sk_buff to system */
  524. arc_free_tx_queue(ndev);
  525. arc_free_rx_queue(ndev);
  526. return 0;
  527. }
  528. /**
  529. * arc_emac_stats - Get system network statistics.
  530. * @ndev: Pointer to net_device structure.
  531. *
  532. * Returns the address of the device statistics structure.
  533. * Statistics are updated in interrupt handler.
  534. */
  535. static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
  536. {
  537. struct arc_emac_priv *priv = netdev_priv(ndev);
  538. struct net_device_stats *stats = &ndev->stats;
  539. unsigned long miss, rxerr;
  540. u8 rxcrc, rxfram, rxoflow;
  541. rxerr = arc_reg_get(priv, R_RXERR);
  542. miss = arc_reg_get(priv, R_MISS);
  543. rxcrc = rxerr;
  544. rxfram = rxerr >> 8;
  545. rxoflow = rxerr >> 16;
  546. stats->rx_errors += miss;
  547. stats->rx_errors += rxcrc + rxfram + rxoflow;
  548. stats->rx_over_errors += rxoflow;
  549. stats->rx_frame_errors += rxfram;
  550. stats->rx_crc_errors += rxcrc;
  551. stats->rx_missed_errors += miss;
  552. return stats;
  553. }
  554. /**
  555. * arc_emac_tx - Starts the data transmission.
  556. * @skb: sk_buff pointer that contains data to be Transmitted.
  557. * @ndev: Pointer to net_device structure.
  558. *
  559. * returns: NETDEV_TX_OK, on success
  560. * NETDEV_TX_BUSY, if any of the descriptors are not free.
  561. *
  562. * This function is invoked from upper layers to initiate transmission.
  563. */
  564. static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
  565. {
  566. struct arc_emac_priv *priv = netdev_priv(ndev);
  567. unsigned int len, *txbd_curr = &priv->txbd_curr;
  568. struct net_device_stats *stats = &ndev->stats;
  569. __le32 *info = &priv->txbd[*txbd_curr].info;
  570. dma_addr_t addr;
  571. if (skb_padto(skb, ETH_ZLEN))
  572. return NETDEV_TX_OK;
  573. len = max_t(unsigned int, ETH_ZLEN, skb->len);
  574. if (unlikely(!arc_emac_tx_avail(priv))) {
  575. netif_stop_queue(ndev);
  576. netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
  577. return NETDEV_TX_BUSY;
  578. }
  579. addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
  580. DMA_TO_DEVICE);
  581. if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
  582. stats->tx_dropped++;
  583. stats->tx_errors++;
  584. dev_kfree_skb_any(skb);
  585. return NETDEV_TX_OK;
  586. }
  587. dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
  588. dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
  589. priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
  590. /* Make sure pointer to data buffer is set */
  591. wmb();
  592. skb_tx_timestamp(skb);
  593. *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
  594. /* Make sure info word is set */
  595. wmb();
  596. priv->tx_buff[*txbd_curr].skb = skb;
  597. /* Increment index to point to the next BD */
  598. *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
  599. /* Ensure that tx_clean() sees the new txbd_curr before
  600. * checking the queue status. This prevents an unneeded wake
  601. * of the queue in tx_clean().
  602. */
  603. smp_mb();
  604. if (!arc_emac_tx_avail(priv)) {
  605. netif_stop_queue(ndev);
  606. /* Refresh tx_dirty */
  607. smp_mb();
  608. if (arc_emac_tx_avail(priv))
  609. netif_start_queue(ndev);
  610. }
  611. arc_reg_set(priv, R_STATUS, TXPL_MASK);
  612. return NETDEV_TX_OK;
  613. }
  614. static void arc_emac_set_address_internal(struct net_device *ndev)
  615. {
  616. struct arc_emac_priv *priv = netdev_priv(ndev);
  617. unsigned int addr_low, addr_hi;
  618. addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
  619. addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
  620. arc_reg_set(priv, R_ADDRL, addr_low);
  621. arc_reg_set(priv, R_ADDRH, addr_hi);
  622. }
  623. /**
  624. * arc_emac_set_address - Set the MAC address for this device.
  625. * @ndev: Pointer to net_device structure.
  626. * @p: 6 byte Address to be written as MAC address.
  627. *
  628. * This function copies the HW address from the sockaddr structure to the
  629. * net_device structure and updates the address in HW.
  630. *
  631. * returns: -EBUSY if the net device is busy or 0 if the address is set
  632. * successfully.
  633. */
  634. static int arc_emac_set_address(struct net_device *ndev, void *p)
  635. {
  636. struct sockaddr *addr = p;
  637. if (netif_running(ndev))
  638. return -EBUSY;
  639. if (!is_valid_ether_addr(addr->sa_data))
  640. return -EADDRNOTAVAIL;
  641. memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
  642. arc_emac_set_address_internal(ndev);
  643. return 0;
  644. }
  645. static int arc_emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  646. {
  647. if (!netif_running(dev))
  648. return -EINVAL;
  649. if (!dev->phydev)
  650. return -ENODEV;
  651. return phy_mii_ioctl(dev->phydev, rq, cmd);
  652. }
  653. /**
  654. * arc_emac_restart - Restart EMAC
  655. * @ndev: Pointer to net_device structure.
  656. *
  657. * This function do hardware reset of EMAC in order to restore
  658. * network packets reception.
  659. */
  660. static void arc_emac_restart(struct net_device *ndev)
  661. {
  662. struct arc_emac_priv *priv = netdev_priv(ndev);
  663. struct net_device_stats *stats = &ndev->stats;
  664. int i;
  665. if (net_ratelimit())
  666. netdev_warn(ndev, "restarting stalled EMAC\n");
  667. netif_stop_queue(ndev);
  668. /* Disable interrupts */
  669. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  670. /* Disable EMAC */
  671. arc_reg_clr(priv, R_CTRL, EN_MASK);
  672. /* Return the sk_buff to system */
  673. arc_free_tx_queue(ndev);
  674. /* Clean Tx BD's */
  675. priv->txbd_curr = 0;
  676. priv->txbd_dirty = 0;
  677. memset(priv->txbd, 0, TX_RING_SZ);
  678. for (i = 0; i < RX_BD_NUM; i++) {
  679. struct arc_emac_bd *rxbd = &priv->rxbd[i];
  680. unsigned int info = le32_to_cpu(rxbd->info);
  681. if (!(info & FOR_EMAC)) {
  682. stats->rx_errors++;
  683. stats->rx_dropped++;
  684. }
  685. /* Return ownership to EMAC */
  686. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  687. }
  688. priv->last_rx_bd = 0;
  689. /* Make sure info is visible to EMAC before enable */
  690. wmb();
  691. /* Enable interrupts */
  692. arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  693. /* Enable EMAC */
  694. arc_reg_or(priv, R_CTRL, EN_MASK);
  695. netif_start_queue(ndev);
  696. }
  697. static const struct net_device_ops arc_emac_netdev_ops = {
  698. .ndo_open = arc_emac_open,
  699. .ndo_stop = arc_emac_stop,
  700. .ndo_start_xmit = arc_emac_tx,
  701. .ndo_set_mac_address = arc_emac_set_address,
  702. .ndo_get_stats = arc_emac_stats,
  703. .ndo_set_rx_mode = arc_emac_set_rx_mode,
  704. .ndo_do_ioctl = arc_emac_ioctl,
  705. #ifdef CONFIG_NET_POLL_CONTROLLER
  706. .ndo_poll_controller = arc_emac_poll_controller,
  707. #endif
  708. };
  709. int arc_emac_probe(struct net_device *ndev, int interface)
  710. {
  711. struct device *dev = ndev->dev.parent;
  712. struct resource res_regs;
  713. struct device_node *phy_node;
  714. struct phy_device *phydev = NULL;
  715. struct arc_emac_priv *priv;
  716. const char *mac_addr;
  717. unsigned int id, clock_frequency, irq;
  718. int err;
  719. /* Get PHY from device tree */
  720. phy_node = of_parse_phandle(dev->of_node, "phy", 0);
  721. if (!phy_node) {
  722. dev_err(dev, "failed to retrieve phy description from device tree\n");
  723. return -ENODEV;
  724. }
  725. /* Get EMAC registers base address from device tree */
  726. err = of_address_to_resource(dev->of_node, 0, &res_regs);
  727. if (err) {
  728. dev_err(dev, "failed to retrieve registers base from device tree\n");
  729. err = -ENODEV;
  730. goto out_put_node;
  731. }
  732. /* Get IRQ from device tree */
  733. irq = irq_of_parse_and_map(dev->of_node, 0);
  734. if (!irq) {
  735. dev_err(dev, "failed to retrieve <irq> value from device tree\n");
  736. err = -ENODEV;
  737. goto out_put_node;
  738. }
  739. ndev->netdev_ops = &arc_emac_netdev_ops;
  740. ndev->ethtool_ops = &arc_emac_ethtool_ops;
  741. ndev->watchdog_timeo = TX_TIMEOUT;
  742. priv = netdev_priv(ndev);
  743. priv->dev = dev;
  744. priv->regs = devm_ioremap_resource(dev, &res_regs);
  745. if (IS_ERR(priv->regs)) {
  746. err = PTR_ERR(priv->regs);
  747. goto out_put_node;
  748. }
  749. dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
  750. if (priv->clk) {
  751. err = clk_prepare_enable(priv->clk);
  752. if (err) {
  753. dev_err(dev, "failed to enable clock\n");
  754. goto out_put_node;
  755. }
  756. clock_frequency = clk_get_rate(priv->clk);
  757. } else {
  758. /* Get CPU clock frequency from device tree */
  759. if (of_property_read_u32(dev->of_node, "clock-frequency",
  760. &clock_frequency)) {
  761. dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
  762. err = -EINVAL;
  763. goto out_put_node;
  764. }
  765. }
  766. id = arc_reg_get(priv, R_ID);
  767. /* Check for EMAC revision 5 or 7, magic number */
  768. if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
  769. dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
  770. err = -ENODEV;
  771. goto out_clken;
  772. }
  773. dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
  774. /* Set poll rate so that it polls every 1 ms */
  775. arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
  776. ndev->irq = irq;
  777. dev_info(dev, "IRQ is %d\n", ndev->irq);
  778. /* Register interrupt handler for device */
  779. err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
  780. ndev->name, ndev);
  781. if (err) {
  782. dev_err(dev, "could not allocate IRQ\n");
  783. goto out_clken;
  784. }
  785. /* Get MAC address from device tree */
  786. mac_addr = of_get_mac_address(dev->of_node);
  787. if (mac_addr)
  788. memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
  789. else
  790. eth_hw_addr_random(ndev);
  791. arc_emac_set_address_internal(ndev);
  792. dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
  793. /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
  794. priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
  795. &priv->rxbd_dma, GFP_KERNEL);
  796. if (!priv->rxbd) {
  797. dev_err(dev, "failed to allocate data buffers\n");
  798. err = -ENOMEM;
  799. goto out_clken;
  800. }
  801. priv->txbd = priv->rxbd + RX_BD_NUM;
  802. priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
  803. dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
  804. (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
  805. err = arc_mdio_probe(priv);
  806. if (err) {
  807. dev_err(dev, "failed to probe MII bus\n");
  808. goto out_clken;
  809. }
  810. phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
  811. interface);
  812. if (!phydev) {
  813. dev_err(dev, "of_phy_connect() failed\n");
  814. err = -ENODEV;
  815. goto out_mdio;
  816. }
  817. dev_info(dev, "connected to %s phy with id 0x%x\n",
  818. phydev->drv->name, phydev->phy_id);
  819. netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
  820. err = register_netdev(ndev);
  821. if (err) {
  822. dev_err(dev, "failed to register network device\n");
  823. goto out_netif_api;
  824. }
  825. of_node_put(phy_node);
  826. return 0;
  827. out_netif_api:
  828. netif_napi_del(&priv->napi);
  829. phy_disconnect(phydev);
  830. out_mdio:
  831. arc_mdio_remove(priv);
  832. out_clken:
  833. if (priv->clk)
  834. clk_disable_unprepare(priv->clk);
  835. out_put_node:
  836. of_node_put(phy_node);
  837. return err;
  838. }
  839. EXPORT_SYMBOL_GPL(arc_emac_probe);
  840. int arc_emac_remove(struct net_device *ndev)
  841. {
  842. struct arc_emac_priv *priv = netdev_priv(ndev);
  843. phy_disconnect(ndev->phydev);
  844. arc_mdio_remove(priv);
  845. unregister_netdev(ndev);
  846. netif_napi_del(&priv->napi);
  847. if (!IS_ERR(priv->clk))
  848. clk_disable_unprepare(priv->clk);
  849. return 0;
  850. }
  851. EXPORT_SYMBOL_GPL(arc_emac_remove);
  852. MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
  853. MODULE_DESCRIPTION("ARC EMAC driver");
  854. MODULE_LICENSE("GPL");