pvrusb2-i2c-core.c 19 KB

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  1. /*
  2. *
  3. *
  4. * Copyright (C) 2005 Mike Isely <isely@pobox.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #include <linux/i2c.h>
  17. #include <linux/module.h>
  18. #include <media/i2c/ir-kbd-i2c.h>
  19. #include "pvrusb2-i2c-core.h"
  20. #include "pvrusb2-hdw-internal.h"
  21. #include "pvrusb2-debug.h"
  22. #include "pvrusb2-fx2-cmd.h"
  23. #include "pvrusb2.h"
  24. #define trace_i2c(...) pvr2_trace(PVR2_TRACE_I2C,__VA_ARGS__)
  25. /*
  26. This module attempts to implement a compliant I2C adapter for the pvrusb2
  27. device.
  28. */
  29. static unsigned int i2c_scan;
  30. module_param(i2c_scan, int, S_IRUGO|S_IWUSR);
  31. MODULE_PARM_DESC(i2c_scan,"scan i2c bus at insmod time");
  32. static int ir_mode[PVR_NUM] = { [0 ... PVR_NUM-1] = 1 };
  33. module_param_array(ir_mode, int, NULL, 0444);
  34. MODULE_PARM_DESC(ir_mode,"specify: 0=disable IR reception, 1=normal IR");
  35. static int pvr2_disable_ir_video;
  36. module_param_named(disable_autoload_ir_video, pvr2_disable_ir_video,
  37. int, S_IRUGO|S_IWUSR);
  38. MODULE_PARM_DESC(disable_autoload_ir_video,
  39. "1=do not try to autoload ir_video IR receiver");
  40. static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */
  41. u8 i2c_addr, /* I2C address we're talking to */
  42. u8 *data, /* Data to write */
  43. u16 length) /* Size of data to write */
  44. {
  45. /* Return value - default 0 means success */
  46. int ret;
  47. if (!data) length = 0;
  48. if (length > (sizeof(hdw->cmd_buffer) - 3)) {
  49. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  50. "Killing an I2C write to %u that is too large (desired=%u limit=%u)",
  51. i2c_addr,
  52. length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3));
  53. return -ENOTSUPP;
  54. }
  55. LOCK_TAKE(hdw->ctl_lock);
  56. /* Clear the command buffer (likely to be paranoia) */
  57. memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer));
  58. /* Set up command buffer for an I2C write */
  59. hdw->cmd_buffer[0] = FX2CMD_I2C_WRITE; /* write prefix */
  60. hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */
  61. hdw->cmd_buffer[2] = length; /* length of what follows */
  62. if (length) memcpy(hdw->cmd_buffer + 3, data, length);
  63. /* Do the operation */
  64. ret = pvr2_send_request(hdw,
  65. hdw->cmd_buffer,
  66. length + 3,
  67. hdw->cmd_buffer,
  68. 1);
  69. if (!ret) {
  70. if (hdw->cmd_buffer[0] != 8) {
  71. ret = -EIO;
  72. if (hdw->cmd_buffer[0] != 7) {
  73. trace_i2c("unexpected status from i2_write[%d]: %d",
  74. i2c_addr,hdw->cmd_buffer[0]);
  75. }
  76. }
  77. }
  78. LOCK_GIVE(hdw->ctl_lock);
  79. return ret;
  80. }
  81. static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */
  82. u8 i2c_addr, /* I2C address we're talking to */
  83. u8 *data, /* Data to write */
  84. u16 dlen, /* Size of data to write */
  85. u8 *res, /* Where to put data we read */
  86. u16 rlen) /* Amount of data to read */
  87. {
  88. /* Return value - default 0 means success */
  89. int ret;
  90. if (!data) dlen = 0;
  91. if (dlen > (sizeof(hdw->cmd_buffer) - 4)) {
  92. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  93. "Killing an I2C read to %u that has wlen too large (desired=%u limit=%u)",
  94. i2c_addr,
  95. dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4));
  96. return -ENOTSUPP;
  97. }
  98. if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) {
  99. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  100. "Killing an I2C read to %u that has rlen too large (desired=%u limit=%u)",
  101. i2c_addr,
  102. rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1));
  103. return -ENOTSUPP;
  104. }
  105. LOCK_TAKE(hdw->ctl_lock);
  106. /* Clear the command buffer (likely to be paranoia) */
  107. memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer));
  108. /* Set up command buffer for an I2C write followed by a read */
  109. hdw->cmd_buffer[0] = FX2CMD_I2C_READ; /* read prefix */
  110. hdw->cmd_buffer[1] = dlen; /* arg length */
  111. hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one
  112. more byte (status). */
  113. hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */
  114. if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen);
  115. /* Do the operation */
  116. ret = pvr2_send_request(hdw,
  117. hdw->cmd_buffer,
  118. 4 + dlen,
  119. hdw->cmd_buffer,
  120. rlen + 1);
  121. if (!ret) {
  122. if (hdw->cmd_buffer[0] != 8) {
  123. ret = -EIO;
  124. if (hdw->cmd_buffer[0] != 7) {
  125. trace_i2c("unexpected status from i2_read[%d]: %d",
  126. i2c_addr,hdw->cmd_buffer[0]);
  127. }
  128. }
  129. }
  130. /* Copy back the result */
  131. if (res && rlen) {
  132. if (ret) {
  133. /* Error, just blank out the return buffer */
  134. memset(res, 0, rlen);
  135. } else {
  136. memcpy(res, hdw->cmd_buffer + 1, rlen);
  137. }
  138. }
  139. LOCK_GIVE(hdw->ctl_lock);
  140. return ret;
  141. }
  142. /* This is the common low level entry point for doing I2C operations to the
  143. hardware. */
  144. static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw,
  145. u8 i2c_addr,
  146. u8 *wdata,
  147. u16 wlen,
  148. u8 *rdata,
  149. u16 rlen)
  150. {
  151. if (!rdata) rlen = 0;
  152. if (!wdata) wlen = 0;
  153. if (rlen || !wlen) {
  154. return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen);
  155. } else {
  156. return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen);
  157. }
  158. }
  159. /* This is a special entry point for cases of I2C transaction attempts to
  160. the IR receiver. The implementation here simulates the IR receiver by
  161. issuing a command to the FX2 firmware and using that response to return
  162. what the real I2C receiver would have returned. We use this for 24xxx
  163. devices, where the IR receiver chip has been removed and replaced with
  164. FX2 related logic. */
  165. static int i2c_24xxx_ir(struct pvr2_hdw *hdw,
  166. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  167. {
  168. u8 dat[4];
  169. unsigned int stat;
  170. if (!(rlen || wlen)) {
  171. /* This is a probe attempt. Just let it succeed. */
  172. return 0;
  173. }
  174. /* We don't understand this kind of transaction */
  175. if ((wlen != 0) || (rlen == 0)) return -EIO;
  176. if (rlen < 3) {
  177. /* Mike Isely <isely@pobox.com> Appears to be a probe
  178. attempt from lirc. Just fill in zeroes and return. If
  179. we try instead to do the full transaction here, then bad
  180. things seem to happen within the lirc driver module
  181. (version 0.8.0-7 sources from Debian, when run under
  182. vanilla 2.6.17.6 kernel) - and I don't have the patience
  183. to chase it down. */
  184. if (rlen > 0) rdata[0] = 0;
  185. if (rlen > 1) rdata[1] = 0;
  186. return 0;
  187. }
  188. /* Issue a command to the FX2 to read the IR receiver. */
  189. LOCK_TAKE(hdw->ctl_lock); do {
  190. hdw->cmd_buffer[0] = FX2CMD_GET_IR_CODE;
  191. stat = pvr2_send_request(hdw,
  192. hdw->cmd_buffer,1,
  193. hdw->cmd_buffer,4);
  194. dat[0] = hdw->cmd_buffer[0];
  195. dat[1] = hdw->cmd_buffer[1];
  196. dat[2] = hdw->cmd_buffer[2];
  197. dat[3] = hdw->cmd_buffer[3];
  198. } while (0); LOCK_GIVE(hdw->ctl_lock);
  199. /* Give up if that operation failed. */
  200. if (stat != 0) return stat;
  201. /* Mangle the results into something that looks like the real IR
  202. receiver. */
  203. rdata[2] = 0xc1;
  204. if (dat[0] != 1) {
  205. /* No code received. */
  206. rdata[0] = 0;
  207. rdata[1] = 0;
  208. } else {
  209. u16 val;
  210. /* Mash the FX2 firmware-provided IR code into something
  211. that the normal i2c chip-level driver expects. */
  212. val = dat[1];
  213. val <<= 8;
  214. val |= dat[2];
  215. val >>= 1;
  216. val &= ~0x0003;
  217. val |= 0x8000;
  218. rdata[0] = (val >> 8) & 0xffu;
  219. rdata[1] = val & 0xffu;
  220. }
  221. return 0;
  222. }
  223. /* This is a special entry point that is entered if an I2C operation is
  224. attempted to a wm8775 chip on model 24xxx hardware. Autodetect of this
  225. part doesn't work, but we know it is really there. So let's look for
  226. the autodetect attempt and just return success if we see that. */
  227. static int i2c_hack_wm8775(struct pvr2_hdw *hdw,
  228. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  229. {
  230. if (!(rlen || wlen)) {
  231. // This is a probe attempt. Just let it succeed.
  232. return 0;
  233. }
  234. return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen);
  235. }
  236. /* This is an entry point designed to always fail any attempt to perform a
  237. transfer. We use this to cause certain I2C addresses to not be
  238. probed. */
  239. static int i2c_black_hole(struct pvr2_hdw *hdw,
  240. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  241. {
  242. return -EIO;
  243. }
  244. /* This is a special entry point that is entered if an I2C operation is
  245. attempted to a cx25840 chip on model 24xxx hardware. This chip can
  246. sometimes wedge itself. Worse still, when this happens msp3400 can
  247. falsely detect this part and then the system gets hosed up after msp3400
  248. gets confused and dies. What we want to do here is try to keep msp3400
  249. away and also try to notice if the chip is wedged and send a warning to
  250. the system log. */
  251. static int i2c_hack_cx25840(struct pvr2_hdw *hdw,
  252. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  253. {
  254. int ret;
  255. unsigned int subaddr;
  256. u8 wbuf[2];
  257. int state = hdw->i2c_cx25840_hack_state;
  258. if (!(rlen || wlen)) {
  259. // Probe attempt - always just succeed and don't bother the
  260. // hardware (this helps to make the state machine further
  261. // down somewhat easier).
  262. return 0;
  263. }
  264. if (state == 3) {
  265. return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen);
  266. }
  267. /* We're looking for the exact pattern where the revision register
  268. is being read. The cx25840 module will always look at the
  269. revision register first. Any other pattern of access therefore
  270. has to be a probe attempt from somebody else so we'll reject it.
  271. Normally we could just let each client just probe the part
  272. anyway, but when the cx25840 is wedged, msp3400 will get a false
  273. positive and that just screws things up... */
  274. if (wlen == 0) {
  275. switch (state) {
  276. case 1: subaddr = 0x0100; break;
  277. case 2: subaddr = 0x0101; break;
  278. default: goto fail;
  279. }
  280. } else if (wlen == 2) {
  281. subaddr = (wdata[0] << 8) | wdata[1];
  282. switch (subaddr) {
  283. case 0x0100: state = 1; break;
  284. case 0x0101: state = 2; break;
  285. default: goto fail;
  286. }
  287. } else {
  288. goto fail;
  289. }
  290. if (!rlen) goto success;
  291. state = 0;
  292. if (rlen != 1) goto fail;
  293. /* If we get to here then we have a legitimate read for one of the
  294. two revision bytes, so pass it through. */
  295. wbuf[0] = subaddr >> 8;
  296. wbuf[1] = subaddr;
  297. ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen);
  298. if ((ret != 0) || (*rdata == 0x04) || (*rdata == 0x0a)) {
  299. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  300. "***WARNING*** Detected a wedged cx25840 chip; the device will not work.");
  301. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  302. "***WARNING*** Try power cycling the pvrusb2 device.");
  303. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  304. "***WARNING*** Disabling further access to the device to prevent other foul-ups.");
  305. // This blocks all further communication with the part.
  306. hdw->i2c_func[0x44] = NULL;
  307. pvr2_hdw_render_useless(hdw);
  308. goto fail;
  309. }
  310. /* Success! */
  311. pvr2_trace(PVR2_TRACE_CHIPS,"cx25840 appears to be OK.");
  312. state = 3;
  313. success:
  314. hdw->i2c_cx25840_hack_state = state;
  315. return 0;
  316. fail:
  317. hdw->i2c_cx25840_hack_state = state;
  318. return -EIO;
  319. }
  320. /* This is a very, very limited I2C adapter implementation. We can only
  321. support what we actually know will work on the device... */
  322. static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap,
  323. struct i2c_msg msgs[],
  324. int num)
  325. {
  326. int ret = -ENOTSUPP;
  327. pvr2_i2c_func funcp = NULL;
  328. struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data);
  329. if (!num) {
  330. ret = -EINVAL;
  331. goto done;
  332. }
  333. if (msgs[0].addr < PVR2_I2C_FUNC_CNT) {
  334. funcp = hdw->i2c_func[msgs[0].addr];
  335. }
  336. if (!funcp) {
  337. ret = -EIO;
  338. goto done;
  339. }
  340. if (num == 1) {
  341. if (msgs[0].flags & I2C_M_RD) {
  342. /* Simple read */
  343. u16 tcnt,bcnt,offs;
  344. if (!msgs[0].len) {
  345. /* Length == 0 read. This is a probe. */
  346. if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) {
  347. ret = -EIO;
  348. goto done;
  349. }
  350. ret = 1;
  351. goto done;
  352. }
  353. /* If the read is short enough we'll do the whole
  354. thing atomically. Otherwise we have no choice
  355. but to break apart the reads. */
  356. tcnt = msgs[0].len;
  357. offs = 0;
  358. while (tcnt) {
  359. bcnt = tcnt;
  360. if (bcnt > sizeof(hdw->cmd_buffer)-1) {
  361. bcnt = sizeof(hdw->cmd_buffer)-1;
  362. }
  363. if (funcp(hdw,msgs[0].addr,NULL,0,
  364. msgs[0].buf+offs,bcnt)) {
  365. ret = -EIO;
  366. goto done;
  367. }
  368. offs += bcnt;
  369. tcnt -= bcnt;
  370. }
  371. ret = 1;
  372. goto done;
  373. } else {
  374. /* Simple write */
  375. ret = 1;
  376. if (funcp(hdw,msgs[0].addr,
  377. msgs[0].buf,msgs[0].len,NULL,0)) {
  378. ret = -EIO;
  379. }
  380. goto done;
  381. }
  382. } else if (num == 2) {
  383. if (msgs[0].addr != msgs[1].addr) {
  384. trace_i2c("i2c refusing 2 phase transfer with conflicting target addresses");
  385. ret = -ENOTSUPP;
  386. goto done;
  387. }
  388. if ((!((msgs[0].flags & I2C_M_RD))) &&
  389. (msgs[1].flags & I2C_M_RD)) {
  390. u16 tcnt,bcnt,wcnt,offs;
  391. /* Write followed by atomic read. If the read
  392. portion is short enough we'll do the whole thing
  393. atomically. Otherwise we have no choice but to
  394. break apart the reads. */
  395. tcnt = msgs[1].len;
  396. wcnt = msgs[0].len;
  397. offs = 0;
  398. while (tcnt || wcnt) {
  399. bcnt = tcnt;
  400. if (bcnt > sizeof(hdw->cmd_buffer)-1) {
  401. bcnt = sizeof(hdw->cmd_buffer)-1;
  402. }
  403. if (funcp(hdw,msgs[0].addr,
  404. msgs[0].buf,wcnt,
  405. msgs[1].buf+offs,bcnt)) {
  406. ret = -EIO;
  407. goto done;
  408. }
  409. offs += bcnt;
  410. tcnt -= bcnt;
  411. wcnt = 0;
  412. }
  413. ret = 2;
  414. goto done;
  415. } else {
  416. trace_i2c("i2c refusing complex transfer read0=%d read1=%d",
  417. (msgs[0].flags & I2C_M_RD),
  418. (msgs[1].flags & I2C_M_RD));
  419. }
  420. } else {
  421. trace_i2c("i2c refusing %d phase transfer",num);
  422. }
  423. done:
  424. if (pvrusb2_debug & PVR2_TRACE_I2C_TRAF) {
  425. unsigned int idx,offs,cnt;
  426. for (idx = 0; idx < num; idx++) {
  427. cnt = msgs[idx].len;
  428. printk(KERN_INFO
  429. "pvrusb2 i2c xfer %u/%u: addr=0x%x len=%d %s",
  430. idx+1,num,
  431. msgs[idx].addr,
  432. cnt,
  433. (msgs[idx].flags & I2C_M_RD ?
  434. "read" : "write"));
  435. if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) {
  436. if (cnt > 8) cnt = 8;
  437. printk(KERN_CONT " [");
  438. for (offs = 0; offs < cnt; offs++) {
  439. if (offs) printk(KERN_CONT " ");
  440. printk(KERN_CONT "%02x",msgs[idx].buf[offs]);
  441. }
  442. if (offs < cnt) printk(KERN_CONT " ...");
  443. printk(KERN_CONT "]");
  444. }
  445. if (idx+1 == num) {
  446. printk(KERN_CONT " result=%d",ret);
  447. }
  448. printk(KERN_CONT "\n");
  449. }
  450. if (!num) {
  451. printk(KERN_INFO
  452. "pvrusb2 i2c xfer null transfer result=%d\n",
  453. ret);
  454. }
  455. }
  456. return ret;
  457. }
  458. static u32 pvr2_i2c_functionality(struct i2c_adapter *adap)
  459. {
  460. return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
  461. }
  462. static const struct i2c_algorithm pvr2_i2c_algo_template = {
  463. .master_xfer = pvr2_i2c_xfer,
  464. .functionality = pvr2_i2c_functionality,
  465. };
  466. static const struct i2c_adapter pvr2_i2c_adap_template = {
  467. .owner = THIS_MODULE,
  468. .class = 0,
  469. };
  470. /* Return true if device exists at given address */
  471. static int do_i2c_probe(struct pvr2_hdw *hdw, int addr)
  472. {
  473. struct i2c_msg msg[1];
  474. int rc;
  475. msg[0].addr = 0;
  476. msg[0].flags = I2C_M_RD;
  477. msg[0].len = 0;
  478. msg[0].buf = NULL;
  479. msg[0].addr = addr;
  480. rc = i2c_transfer(&hdw->i2c_adap, msg, ARRAY_SIZE(msg));
  481. return rc == 1;
  482. }
  483. static void do_i2c_scan(struct pvr2_hdw *hdw)
  484. {
  485. int i;
  486. printk(KERN_INFO "%s: i2c scan beginning\n", hdw->name);
  487. for (i = 0; i < 128; i++) {
  488. if (do_i2c_probe(hdw, i)) {
  489. printk(KERN_INFO "%s: i2c scan: found device @ 0x%x\n",
  490. hdw->name, i);
  491. }
  492. }
  493. printk(KERN_INFO "%s: i2c scan done.\n", hdw->name);
  494. }
  495. static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw)
  496. {
  497. struct i2c_board_info info;
  498. struct IR_i2c_init_data *init_data = &hdw->ir_init_data;
  499. if (pvr2_disable_ir_video) {
  500. pvr2_trace(PVR2_TRACE_INFO,
  501. "Automatic binding of ir_video has been disabled.");
  502. return;
  503. }
  504. memset(&info, 0, sizeof(struct i2c_board_info));
  505. switch (hdw->ir_scheme_active) {
  506. case PVR2_IR_SCHEME_24XXX: /* FX2-controlled IR */
  507. case PVR2_IR_SCHEME_29XXX: /* Original 29xxx device */
  508. init_data->ir_codes = RC_MAP_HAUPPAUGE;
  509. init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP;
  510. init_data->type = RC_PROTO_BIT_RC5;
  511. init_data->name = hdw->hdw_desc->description;
  512. init_data->polling_interval = 100; /* ms From ir-kbd-i2c */
  513. /* IR Receiver */
  514. info.addr = 0x18;
  515. info.platform_data = init_data;
  516. strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
  517. pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
  518. info.type, info.addr);
  519. i2c_new_device(&hdw->i2c_adap, &info);
  520. break;
  521. case PVR2_IR_SCHEME_ZILOG: /* HVR-1950 style */
  522. case PVR2_IR_SCHEME_24XXX_MCE: /* 24xxx MCE device */
  523. init_data->ir_codes = RC_MAP_HAUPPAUGE;
  524. init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
  525. init_data->type = RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC6_MCE |
  526. RC_PROTO_BIT_RC6_6A_32;
  527. init_data->name = hdw->hdw_desc->description;
  528. /* IR Transceiver */
  529. info.addr = 0x71;
  530. info.platform_data = init_data;
  531. strlcpy(info.type, "ir_z8f0811_haup", I2C_NAME_SIZE);
  532. pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
  533. info.type, info.addr);
  534. i2c_new_device(&hdw->i2c_adap, &info);
  535. break;
  536. default:
  537. /* The device either doesn't support I2C-based IR or we
  538. don't know (yet) how to operate IR on the device. */
  539. break;
  540. }
  541. }
  542. void pvr2_i2c_core_init(struct pvr2_hdw *hdw)
  543. {
  544. unsigned int idx;
  545. /* The default action for all possible I2C addresses is just to do
  546. the transfer normally. */
  547. for (idx = 0; idx < PVR2_I2C_FUNC_CNT; idx++) {
  548. hdw->i2c_func[idx] = pvr2_i2c_basic_op;
  549. }
  550. /* However, deal with various special cases for 24xxx hardware. */
  551. if (ir_mode[hdw->unit_number] == 0) {
  552. printk(KERN_INFO "%s: IR disabled\n",hdw->name);
  553. hdw->i2c_func[0x18] = i2c_black_hole;
  554. } else if (ir_mode[hdw->unit_number] == 1) {
  555. if (hdw->ir_scheme_active == PVR2_IR_SCHEME_24XXX) {
  556. /* Set up translation so that our IR looks like a
  557. 29xxx device */
  558. hdw->i2c_func[0x18] = i2c_24xxx_ir;
  559. }
  560. }
  561. if (hdw->hdw_desc->flag_has_cx25840) {
  562. hdw->i2c_func[0x44] = i2c_hack_cx25840;
  563. }
  564. if (hdw->hdw_desc->flag_has_wm8775) {
  565. hdw->i2c_func[0x1b] = i2c_hack_wm8775;
  566. }
  567. // Configure the adapter and set up everything else related to it.
  568. hdw->i2c_adap = pvr2_i2c_adap_template;
  569. hdw->i2c_algo = pvr2_i2c_algo_template;
  570. strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name));
  571. hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev;
  572. hdw->i2c_adap.algo = &hdw->i2c_algo;
  573. hdw->i2c_adap.algo_data = hdw;
  574. hdw->i2c_linked = !0;
  575. i2c_set_adapdata(&hdw->i2c_adap, &hdw->v4l2_dev);
  576. i2c_add_adapter(&hdw->i2c_adap);
  577. if (hdw->i2c_func[0x18] == i2c_24xxx_ir) {
  578. /* Probe for a different type of IR receiver on this
  579. device. This is really the only way to differentiate
  580. older 24xxx devices from 24xxx variants that include an
  581. IR blaster. If the IR blaster is present, the IR
  582. receiver is part of that chip and thus we must disable
  583. the emulated IR receiver. */
  584. if (do_i2c_probe(hdw, 0x71)) {
  585. pvr2_trace(PVR2_TRACE_INFO,
  586. "Device has newer IR hardware; disabling unneeded virtual IR device");
  587. hdw->i2c_func[0x18] = NULL;
  588. /* Remember that this is a different device... */
  589. hdw->ir_scheme_active = PVR2_IR_SCHEME_24XXX_MCE;
  590. }
  591. }
  592. if (i2c_scan) do_i2c_scan(hdw);
  593. pvr2_i2c_register_ir(hdw);
  594. }
  595. void pvr2_i2c_core_done(struct pvr2_hdw *hdw)
  596. {
  597. if (hdw->i2c_linked) {
  598. i2c_del_adapter(&hdw->i2c_adap);
  599. hdw->i2c_linked = 0;
  600. }
  601. }