pt3_dma.c 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Earthsoft PT3 driver
  4. *
  5. * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
  6. */
  7. #include <linux/dma-mapping.h>
  8. #include <linux/kernel.h>
  9. #include <linux/pci.h>
  10. #include "pt3.h"
  11. #define PT3_ACCESS_UNIT (TS_PACKET_SZ * 128)
  12. #define PT3_BUF_CANARY (0x74)
  13. static u32 get_dma_base(int idx)
  14. {
  15. int i;
  16. i = (idx == 1 || idx == 2) ? 3 - idx : idx;
  17. return REG_DMA_BASE + 0x18 * i;
  18. }
  19. int pt3_stop_dma(struct pt3_adapter *adap)
  20. {
  21. struct pt3_board *pt3 = adap->dvb_adap.priv;
  22. u32 base;
  23. u32 stat;
  24. int retry;
  25. base = get_dma_base(adap->adap_idx);
  26. stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
  27. if (!(stat & 0x01))
  28. return 0;
  29. iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
  30. for (retry = 0; retry < 5; retry++) {
  31. stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
  32. if (!(stat & 0x01))
  33. return 0;
  34. msleep(50);
  35. }
  36. return -EIO;
  37. }
  38. int pt3_start_dma(struct pt3_adapter *adap)
  39. {
  40. struct pt3_board *pt3 = adap->dvb_adap.priv;
  41. u32 base = get_dma_base(adap->adap_idx);
  42. iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
  43. iowrite32(lower_32_bits(adap->desc_buf[0].b_addr),
  44. pt3->regs[0] + base + OFST_DMA_DESC_L);
  45. iowrite32(upper_32_bits(adap->desc_buf[0].b_addr),
  46. pt3->regs[0] + base + OFST_DMA_DESC_H);
  47. iowrite32(0x01, pt3->regs[0] + base + OFST_DMA_CTL);
  48. return 0;
  49. }
  50. static u8 *next_unit(struct pt3_adapter *adap, int *idx, int *ofs)
  51. {
  52. *ofs += PT3_ACCESS_UNIT;
  53. if (*ofs >= DATA_BUF_SZ) {
  54. *ofs -= DATA_BUF_SZ;
  55. (*idx)++;
  56. if (*idx == adap->num_bufs)
  57. *idx = 0;
  58. }
  59. return &adap->buffer[*idx].data[*ofs];
  60. }
  61. int pt3_proc_dma(struct pt3_adapter *adap)
  62. {
  63. int idx, ofs;
  64. idx = adap->buf_idx;
  65. ofs = adap->buf_ofs;
  66. if (adap->buffer[idx].data[ofs] == PT3_BUF_CANARY)
  67. return 0;
  68. while (*next_unit(adap, &idx, &ofs) != PT3_BUF_CANARY) {
  69. u8 *p;
  70. p = &adap->buffer[adap->buf_idx].data[adap->buf_ofs];
  71. if (adap->num_discard > 0)
  72. adap->num_discard--;
  73. else if (adap->buf_ofs + PT3_ACCESS_UNIT > DATA_BUF_SZ) {
  74. dvb_dmx_swfilter_packets(&adap->demux, p,
  75. (DATA_BUF_SZ - adap->buf_ofs) / TS_PACKET_SZ);
  76. dvb_dmx_swfilter_packets(&adap->demux,
  77. adap->buffer[idx].data, ofs / TS_PACKET_SZ);
  78. } else
  79. dvb_dmx_swfilter_packets(&adap->demux, p,
  80. PT3_ACCESS_UNIT / TS_PACKET_SZ);
  81. *p = PT3_BUF_CANARY;
  82. adap->buf_idx = idx;
  83. adap->buf_ofs = ofs;
  84. }
  85. return 0;
  86. }
  87. void pt3_init_dmabuf(struct pt3_adapter *adap)
  88. {
  89. int idx, ofs;
  90. u8 *p;
  91. idx = 0;
  92. ofs = 0;
  93. p = adap->buffer[0].data;
  94. /* mark the whole buffers as "not written yet" */
  95. while (idx < adap->num_bufs) {
  96. p[ofs] = PT3_BUF_CANARY;
  97. ofs += PT3_ACCESS_UNIT;
  98. if (ofs >= DATA_BUF_SZ) {
  99. ofs -= DATA_BUF_SZ;
  100. idx++;
  101. p = adap->buffer[idx].data;
  102. }
  103. }
  104. adap->buf_idx = 0;
  105. adap->buf_ofs = 0;
  106. }
  107. void pt3_free_dmabuf(struct pt3_adapter *adap)
  108. {
  109. struct pt3_board *pt3;
  110. int i;
  111. pt3 = adap->dvb_adap.priv;
  112. for (i = 0; i < adap->num_bufs; i++)
  113. dma_free_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
  114. adap->buffer[i].data, adap->buffer[i].b_addr);
  115. adap->num_bufs = 0;
  116. for (i = 0; i < adap->num_desc_bufs; i++)
  117. dma_free_coherent(&pt3->pdev->dev, PAGE_SIZE,
  118. adap->desc_buf[i].descs, adap->desc_buf[i].b_addr);
  119. adap->num_desc_bufs = 0;
  120. }
  121. int pt3_alloc_dmabuf(struct pt3_adapter *adap)
  122. {
  123. struct pt3_board *pt3;
  124. void *p;
  125. int i, j;
  126. int idx, ofs;
  127. int num_desc_bufs;
  128. dma_addr_t data_addr, desc_addr;
  129. struct xfer_desc *d;
  130. pt3 = adap->dvb_adap.priv;
  131. adap->num_bufs = 0;
  132. adap->num_desc_bufs = 0;
  133. for (i = 0; i < pt3->num_bufs; i++) {
  134. p = dma_alloc_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
  135. &adap->buffer[i].b_addr, GFP_KERNEL);
  136. if (p == NULL)
  137. goto failed;
  138. adap->buffer[i].data = p;
  139. adap->num_bufs++;
  140. }
  141. pt3_init_dmabuf(adap);
  142. /* build circular-linked pointers (xfer_desc) to the data buffers*/
  143. idx = 0;
  144. ofs = 0;
  145. num_desc_bufs =
  146. DIV_ROUND_UP(adap->num_bufs * DATA_BUF_XFERS, DESCS_IN_PAGE);
  147. for (i = 0; i < num_desc_bufs; i++) {
  148. p = dma_alloc_coherent(&pt3->pdev->dev, PAGE_SIZE,
  149. &desc_addr, GFP_KERNEL);
  150. if (p == NULL)
  151. goto failed;
  152. adap->num_desc_bufs++;
  153. adap->desc_buf[i].descs = p;
  154. adap->desc_buf[i].b_addr = desc_addr;
  155. if (i > 0) {
  156. d = &adap->desc_buf[i - 1].descs[DESCS_IN_PAGE - 1];
  157. d->next_l = lower_32_bits(desc_addr);
  158. d->next_h = upper_32_bits(desc_addr);
  159. }
  160. for (j = 0; j < DESCS_IN_PAGE; j++) {
  161. data_addr = adap->buffer[idx].b_addr + ofs;
  162. d = &adap->desc_buf[i].descs[j];
  163. d->addr_l = lower_32_bits(data_addr);
  164. d->addr_h = upper_32_bits(data_addr);
  165. d->size = DATA_XFER_SZ;
  166. desc_addr += sizeof(struct xfer_desc);
  167. d->next_l = lower_32_bits(desc_addr);
  168. d->next_h = upper_32_bits(desc_addr);
  169. ofs += DATA_XFER_SZ;
  170. if (ofs >= DATA_BUF_SZ) {
  171. ofs -= DATA_BUF_SZ;
  172. idx++;
  173. if (idx >= adap->num_bufs) {
  174. desc_addr = adap->desc_buf[0].b_addr;
  175. d->next_l = lower_32_bits(desc_addr);
  176. d->next_h = upper_32_bits(desc_addr);
  177. return 0;
  178. }
  179. }
  180. }
  181. }
  182. return 0;
  183. failed:
  184. pt3_free_dmabuf(adap);
  185. return -ENOMEM;
  186. }