mantis_hif.c 6.7 KB

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  1. /*
  2. Mantis PCI bridge driver
  3. Copyright (C) Manu Abraham (abraham.manu@gmail.com)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/signal.h>
  18. #include <linux/sched.h>
  19. #include <linux/interrupt.h>
  20. #include <asm/io.h>
  21. #include <media/dmxdev.h>
  22. #include <media/dvbdev.h>
  23. #include <media/dvb_demux.h>
  24. #include <media/dvb_frontend.h>
  25. #include <media/dvb_net.h>
  26. #include "mantis_common.h"
  27. #include "mantis_hif.h"
  28. #include "mantis_link.h" /* temporary due to physical layer stuff */
  29. #include "mantis_reg.h"
  30. static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
  31. {
  32. struct mantis_pci *mantis = ca->ca_priv;
  33. int rc = 0;
  34. if (wait_event_timeout(ca->hif_opdone_wq,
  35. ca->hif_event & MANTIS_SBUF_OPDONE,
  36. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  37. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
  38. rc = -EREMOTEIO;
  39. }
  40. dprintk(MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
  41. ca->hif_event &= ~MANTIS_SBUF_OPDONE;
  42. return rc;
  43. }
  44. static int mantis_hif_write_wait(struct mantis_ca *ca)
  45. {
  46. struct mantis_pci *mantis = ca->ca_priv;
  47. u32 opdone = 0, timeout = 0;
  48. int rc = 0;
  49. if (wait_event_timeout(ca->hif_write_wq,
  50. mantis->gpif_status & MANTIS_GPIF_WRACK,
  51. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  52. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write ACK timed out !", mantis->num);
  53. rc = -EREMOTEIO;
  54. }
  55. dprintk(MANTIS_DEBUG, 1, "Write Acknowledged");
  56. mantis->gpif_status &= ~MANTIS_GPIF_WRACK;
  57. while (!opdone) {
  58. opdone = (mmread(MANTIS_GPIF_STATUS) & MANTIS_SBUF_OPDONE);
  59. udelay(500);
  60. timeout++;
  61. if (timeout > 100) {
  62. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write operation timed out!", mantis->num);
  63. rc = -ETIMEDOUT;
  64. break;
  65. }
  66. }
  67. dprintk(MANTIS_DEBUG, 1, "HIF Write success");
  68. return rc;
  69. }
  70. int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
  71. {
  72. struct mantis_pci *mantis = ca->ca_priv;
  73. u32 hif_addr = 0, data, count = 4;
  74. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
  75. mutex_lock(&ca->ca_lock);
  76. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  77. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  78. hif_addr |= MANTIS_HIF_STATUS;
  79. hif_addr |= addr;
  80. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  81. mmwrite(count, MANTIS_GPIF_BRBYTES);
  82. udelay(20);
  83. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  84. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  85. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
  86. mutex_unlock(&ca->ca_lock);
  87. return -EREMOTEIO;
  88. }
  89. data = mmread(MANTIS_GPIF_DIN);
  90. mutex_unlock(&ca->ca_lock);
  91. dprintk(MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
  92. return (data >> 24) & 0xff;
  93. }
  94. int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
  95. {
  96. struct mantis_slot *slot = ca->slot;
  97. struct mantis_pci *mantis = ca->ca_priv;
  98. u32 hif_addr = 0;
  99. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
  100. mutex_lock(&ca->ca_lock);
  101. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  102. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  103. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  104. hif_addr |= MANTIS_HIF_STATUS;
  105. hif_addr |= addr;
  106. mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
  107. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  108. mmwrite(data, MANTIS_GPIF_DOUT);
  109. if (mantis_hif_write_wait(ca) != 0) {
  110. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  111. mutex_unlock(&ca->ca_lock);
  112. return -EREMOTEIO;
  113. }
  114. dprintk(MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
  115. mutex_unlock(&ca->ca_lock);
  116. return 0;
  117. }
  118. int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
  119. {
  120. struct mantis_pci *mantis = ca->ca_priv;
  121. u32 data, hif_addr = 0;
  122. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
  123. mutex_lock(&ca->ca_lock);
  124. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  125. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  126. hif_addr |= MANTIS_HIF_STATUS;
  127. hif_addr |= addr;
  128. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  129. mmwrite(1, MANTIS_GPIF_BRBYTES);
  130. udelay(20);
  131. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  132. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  133. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  134. mutex_unlock(&ca->ca_lock);
  135. return -EREMOTEIO;
  136. }
  137. data = mmread(MANTIS_GPIF_DIN);
  138. dprintk(MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
  139. udelay(50);
  140. mutex_unlock(&ca->ca_lock);
  141. return (u8) data;
  142. }
  143. int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
  144. {
  145. struct mantis_pci *mantis = ca->ca_priv;
  146. u32 hif_addr = 0;
  147. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
  148. mutex_lock(&ca->ca_lock);
  149. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  150. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  151. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  152. hif_addr |= MANTIS_HIF_STATUS;
  153. hif_addr |= addr;
  154. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  155. mmwrite(data, MANTIS_GPIF_DOUT);
  156. if (mantis_hif_write_wait(ca) != 0) {
  157. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  158. mutex_unlock(&ca->ca_lock);
  159. return -EREMOTEIO;
  160. }
  161. dprintk(MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
  162. mutex_unlock(&ca->ca_lock);
  163. udelay(50);
  164. return 0;
  165. }
  166. int mantis_hif_init(struct mantis_ca *ca)
  167. {
  168. struct mantis_slot *slot = ca->slot;
  169. struct mantis_pci *mantis = ca->ca_priv;
  170. u32 irqcfg;
  171. slot[0].slave_cfg = 0x70773028;
  172. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
  173. mutex_lock(&ca->ca_lock);
  174. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  175. irqcfg = MANTIS_MASK_BRRDY |
  176. MANTIS_MASK_WRACK |
  177. MANTIS_MASK_EXTIRQ |
  178. MANTIS_MASK_WSTO |
  179. MANTIS_MASK_OTHERR |
  180. MANTIS_MASK_OVFLW;
  181. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  182. mutex_unlock(&ca->ca_lock);
  183. return 0;
  184. }
  185. void mantis_hif_exit(struct mantis_ca *ca)
  186. {
  187. struct mantis_pci *mantis = ca->ca_priv;
  188. u32 irqcfg;
  189. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
  190. mutex_lock(&ca->ca_lock);
  191. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  192. irqcfg &= ~MANTIS_MASK_BRRDY;
  193. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  194. mutex_unlock(&ca->ca_lock);
  195. }