ltr501.c 38 KB

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  1. /*
  2. * ltr501.c - Support for Lite-On LTR501 ambient light and proximity sensor
  3. *
  4. * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
  5. *
  6. * This file is subject to the terms and conditions of version 2 of
  7. * the GNU General Public License. See the file COPYING in the main
  8. * directory of this archive for more details.
  9. *
  10. * 7-bit I2C slave address 0x23
  11. *
  12. * TODO: IR LED characteristics
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/err.h>
  17. #include <linux/delay.h>
  18. #include <linux/regmap.h>
  19. #include <linux/acpi.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/events.h>
  22. #include <linux/iio/sysfs.h>
  23. #include <linux/iio/trigger_consumer.h>
  24. #include <linux/iio/buffer.h>
  25. #include <linux/iio/triggered_buffer.h>
  26. #define LTR501_DRV_NAME "ltr501"
  27. #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */
  28. #define LTR501_PS_CONTR 0x81 /* PS operation mode */
  29. #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/
  30. #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/
  31. #define LTR501_PART_ID 0x86
  32. #define LTR501_MANUFAC_ID 0x87
  33. #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */
  34. #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */
  35. #define LTR501_ALS_PS_STATUS 0x8c
  36. #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */
  37. #define LTR501_INTR 0x8f /* output mode, polarity, mode */
  38. #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */
  39. #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */
  40. #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */
  41. #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */
  42. #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */
  43. #define LTR501_MAX_REG 0x9f
  44. #define LTR501_ALS_CONTR_SW_RESET BIT(2)
  45. #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
  46. #define LTR501_CONTR_PS_GAIN_SHIFT 2
  47. #define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
  48. #define LTR501_CONTR_ACTIVE BIT(1)
  49. #define LTR501_STATUS_ALS_INTR BIT(3)
  50. #define LTR501_STATUS_ALS_RDY BIT(2)
  51. #define LTR501_STATUS_PS_INTR BIT(1)
  52. #define LTR501_STATUS_PS_RDY BIT(0)
  53. #define LTR501_PS_DATA_MASK 0x7ff
  54. #define LTR501_PS_THRESH_MASK 0x7ff
  55. #define LTR501_ALS_THRESH_MASK 0xffff
  56. #define LTR501_ALS_DEF_PERIOD 500000
  57. #define LTR501_PS_DEF_PERIOD 100000
  58. #define LTR501_REGMAP_NAME "ltr501_regmap"
  59. #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
  60. ((vis_coeff * vis_data) - (ir_coeff * ir_data))
  61. static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
  62. static const struct reg_field reg_field_it =
  63. REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
  64. static const struct reg_field reg_field_als_intr =
  65. REG_FIELD(LTR501_INTR, 1, 1);
  66. static const struct reg_field reg_field_ps_intr =
  67. REG_FIELD(LTR501_INTR, 0, 0);
  68. static const struct reg_field reg_field_als_rate =
  69. REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
  70. static const struct reg_field reg_field_ps_rate =
  71. REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
  72. static const struct reg_field reg_field_als_prst =
  73. REG_FIELD(LTR501_INTR_PRST, 0, 3);
  74. static const struct reg_field reg_field_ps_prst =
  75. REG_FIELD(LTR501_INTR_PRST, 4, 7);
  76. struct ltr501_samp_table {
  77. int freq_val; /* repetition frequency in micro HZ*/
  78. int time_val; /* repetition rate in micro seconds */
  79. };
  80. #define LTR501_RESERVED_GAIN -1
  81. enum {
  82. ltr501 = 0,
  83. ltr559,
  84. ltr301,
  85. };
  86. struct ltr501_gain {
  87. int scale;
  88. int uscale;
  89. };
  90. static struct ltr501_gain ltr501_als_gain_tbl[] = {
  91. {1, 0},
  92. {0, 5000},
  93. };
  94. static struct ltr501_gain ltr559_als_gain_tbl[] = {
  95. {1, 0},
  96. {0, 500000},
  97. {0, 250000},
  98. {0, 125000},
  99. {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
  100. {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
  101. {0, 20000},
  102. {0, 10000},
  103. };
  104. static struct ltr501_gain ltr501_ps_gain_tbl[] = {
  105. {1, 0},
  106. {0, 250000},
  107. {0, 125000},
  108. {0, 62500},
  109. };
  110. static struct ltr501_gain ltr559_ps_gain_tbl[] = {
  111. {0, 62500}, /* x16 gain */
  112. {0, 31250}, /* x32 gain */
  113. {0, 15625}, /* bits X1 are for x64 gain */
  114. {0, 15624},
  115. };
  116. struct ltr501_chip_info {
  117. u8 partid;
  118. struct ltr501_gain *als_gain;
  119. int als_gain_tbl_size;
  120. struct ltr501_gain *ps_gain;
  121. int ps_gain_tbl_size;
  122. u8 als_mode_active;
  123. u8 als_gain_mask;
  124. u8 als_gain_shift;
  125. struct iio_chan_spec const *channels;
  126. const int no_channels;
  127. const struct iio_info *info;
  128. const struct iio_info *info_no_irq;
  129. };
  130. struct ltr501_data {
  131. struct i2c_client *client;
  132. struct mutex lock_als, lock_ps;
  133. struct ltr501_chip_info *chip_info;
  134. u8 als_contr, ps_contr;
  135. int als_period, ps_period; /* period in micro seconds */
  136. struct regmap *regmap;
  137. struct regmap_field *reg_it;
  138. struct regmap_field *reg_als_intr;
  139. struct regmap_field *reg_ps_intr;
  140. struct regmap_field *reg_als_rate;
  141. struct regmap_field *reg_ps_rate;
  142. struct regmap_field *reg_als_prst;
  143. struct regmap_field *reg_ps_prst;
  144. };
  145. static const struct ltr501_samp_table ltr501_als_samp_table[] = {
  146. {20000000, 50000}, {10000000, 100000},
  147. {5000000, 200000}, {2000000, 500000},
  148. {1000000, 1000000}, {500000, 2000000},
  149. {500000, 2000000}, {500000, 2000000}
  150. };
  151. static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
  152. {20000000, 50000}, {14285714, 70000},
  153. {10000000, 100000}, {5000000, 200000},
  154. {2000000, 500000}, {1000000, 1000000},
  155. {500000, 2000000}, {500000, 2000000},
  156. {500000, 2000000}
  157. };
  158. static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
  159. int len, int val, int val2)
  160. {
  161. int i, freq;
  162. freq = val * 1000000 + val2;
  163. for (i = 0; i < len; i++) {
  164. if (tab[i].freq_val == freq)
  165. return i;
  166. }
  167. return -EINVAL;
  168. }
  169. static int ltr501_als_read_samp_freq(struct ltr501_data *data,
  170. int *val, int *val2)
  171. {
  172. int ret, i;
  173. ret = regmap_field_read(data->reg_als_rate, &i);
  174. if (ret < 0)
  175. return ret;
  176. if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
  177. return -EINVAL;
  178. *val = ltr501_als_samp_table[i].freq_val / 1000000;
  179. *val2 = ltr501_als_samp_table[i].freq_val % 1000000;
  180. return IIO_VAL_INT_PLUS_MICRO;
  181. }
  182. static int ltr501_ps_read_samp_freq(struct ltr501_data *data,
  183. int *val, int *val2)
  184. {
  185. int ret, i;
  186. ret = regmap_field_read(data->reg_ps_rate, &i);
  187. if (ret < 0)
  188. return ret;
  189. if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
  190. return -EINVAL;
  191. *val = ltr501_ps_samp_table[i].freq_val / 1000000;
  192. *val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
  193. return IIO_VAL_INT_PLUS_MICRO;
  194. }
  195. static int ltr501_als_write_samp_freq(struct ltr501_data *data,
  196. int val, int val2)
  197. {
  198. int i, ret;
  199. i = ltr501_match_samp_freq(ltr501_als_samp_table,
  200. ARRAY_SIZE(ltr501_als_samp_table),
  201. val, val2);
  202. if (i < 0)
  203. return i;
  204. mutex_lock(&data->lock_als);
  205. ret = regmap_field_write(data->reg_als_rate, i);
  206. mutex_unlock(&data->lock_als);
  207. return ret;
  208. }
  209. static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
  210. int val, int val2)
  211. {
  212. int i, ret;
  213. i = ltr501_match_samp_freq(ltr501_ps_samp_table,
  214. ARRAY_SIZE(ltr501_ps_samp_table),
  215. val, val2);
  216. if (i < 0)
  217. return i;
  218. mutex_lock(&data->lock_ps);
  219. ret = regmap_field_write(data->reg_ps_rate, i);
  220. mutex_unlock(&data->lock_ps);
  221. return ret;
  222. }
  223. static int ltr501_als_read_samp_period(struct ltr501_data *data, int *val)
  224. {
  225. int ret, i;
  226. ret = regmap_field_read(data->reg_als_rate, &i);
  227. if (ret < 0)
  228. return ret;
  229. if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
  230. return -EINVAL;
  231. *val = ltr501_als_samp_table[i].time_val;
  232. return IIO_VAL_INT;
  233. }
  234. static int ltr501_ps_read_samp_period(struct ltr501_data *data, int *val)
  235. {
  236. int ret, i;
  237. ret = regmap_field_read(data->reg_ps_rate, &i);
  238. if (ret < 0)
  239. return ret;
  240. if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
  241. return -EINVAL;
  242. *val = ltr501_ps_samp_table[i].time_val;
  243. return IIO_VAL_INT;
  244. }
  245. /* IR and visible spectrum coeff's are given in data sheet */
  246. static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
  247. {
  248. unsigned long ratio, lux;
  249. if (vis_data == 0)
  250. return 0;
  251. /* multiply numerator by 100 to avoid handling ratio < 1 */
  252. ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
  253. if (ratio < 45)
  254. lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
  255. else if (ratio >= 45 && ratio < 64)
  256. lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
  257. else if (ratio >= 64 && ratio < 85)
  258. lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
  259. else
  260. lux = 0;
  261. return lux / 1000;
  262. }
  263. static int ltr501_drdy(struct ltr501_data *data, u8 drdy_mask)
  264. {
  265. int tries = 100;
  266. int ret, status;
  267. while (tries--) {
  268. ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
  269. if (ret < 0)
  270. return ret;
  271. if ((status & drdy_mask) == drdy_mask)
  272. return 0;
  273. msleep(25);
  274. }
  275. dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
  276. return -EIO;
  277. }
  278. static int ltr501_set_it_time(struct ltr501_data *data, int it)
  279. {
  280. int ret, i, index = -1, status;
  281. for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
  282. if (int_time_mapping[i] == it) {
  283. index = i;
  284. break;
  285. }
  286. }
  287. /* Make sure integ time index is valid */
  288. if (index < 0)
  289. return -EINVAL;
  290. ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
  291. if (ret < 0)
  292. return ret;
  293. if (status & LTR501_CONTR_ALS_GAIN_MASK) {
  294. /*
  295. * 200 ms and 400 ms integ time can only be
  296. * used in dynamic range 1
  297. */
  298. if (index > 1)
  299. return -EINVAL;
  300. } else
  301. /* 50 ms integ time can only be used in dynamic range 2 */
  302. if (index == 1)
  303. return -EINVAL;
  304. return regmap_field_write(data->reg_it, index);
  305. }
  306. /* read int time in micro seconds */
  307. static int ltr501_read_it_time(struct ltr501_data *data, int *val, int *val2)
  308. {
  309. int ret, index;
  310. ret = regmap_field_read(data->reg_it, &index);
  311. if (ret < 0)
  312. return ret;
  313. /* Make sure integ time index is valid */
  314. if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
  315. return -EINVAL;
  316. *val2 = int_time_mapping[index];
  317. *val = 0;
  318. return IIO_VAL_INT_PLUS_MICRO;
  319. }
  320. static int ltr501_read_als(struct ltr501_data *data, __le16 buf[2])
  321. {
  322. int ret;
  323. ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
  324. if (ret < 0)
  325. return ret;
  326. /* always read both ALS channels in given order */
  327. return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
  328. buf, 2 * sizeof(__le16));
  329. }
  330. static int ltr501_read_ps(struct ltr501_data *data)
  331. {
  332. int ret, status;
  333. ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
  334. if (ret < 0)
  335. return ret;
  336. ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
  337. &status, 2);
  338. if (ret < 0)
  339. return ret;
  340. return status;
  341. }
  342. static int ltr501_read_intr_prst(struct ltr501_data *data,
  343. enum iio_chan_type type,
  344. int *val2)
  345. {
  346. int ret, samp_period, prst;
  347. switch (type) {
  348. case IIO_INTENSITY:
  349. ret = regmap_field_read(data->reg_als_prst, &prst);
  350. if (ret < 0)
  351. return ret;
  352. ret = ltr501_als_read_samp_period(data, &samp_period);
  353. if (ret < 0)
  354. return ret;
  355. *val2 = samp_period * prst;
  356. return IIO_VAL_INT_PLUS_MICRO;
  357. case IIO_PROXIMITY:
  358. ret = regmap_field_read(data->reg_ps_prst, &prst);
  359. if (ret < 0)
  360. return ret;
  361. ret = ltr501_ps_read_samp_period(data, &samp_period);
  362. if (ret < 0)
  363. return ret;
  364. *val2 = samp_period * prst;
  365. return IIO_VAL_INT_PLUS_MICRO;
  366. default:
  367. return -EINVAL;
  368. }
  369. return -EINVAL;
  370. }
  371. static int ltr501_write_intr_prst(struct ltr501_data *data,
  372. enum iio_chan_type type,
  373. int val, int val2)
  374. {
  375. int ret, samp_period, new_val;
  376. unsigned long period;
  377. if (val < 0 || val2 < 0)
  378. return -EINVAL;
  379. /* period in microseconds */
  380. period = ((val * 1000000) + val2);
  381. switch (type) {
  382. case IIO_INTENSITY:
  383. ret = ltr501_als_read_samp_period(data, &samp_period);
  384. if (ret < 0)
  385. return ret;
  386. /* period should be atleast equal to sampling period */
  387. if (period < samp_period)
  388. return -EINVAL;
  389. new_val = DIV_ROUND_UP(period, samp_period);
  390. if (new_val < 0 || new_val > 0x0f)
  391. return -EINVAL;
  392. mutex_lock(&data->lock_als);
  393. ret = regmap_field_write(data->reg_als_prst, new_val);
  394. mutex_unlock(&data->lock_als);
  395. if (ret >= 0)
  396. data->als_period = period;
  397. return ret;
  398. case IIO_PROXIMITY:
  399. ret = ltr501_ps_read_samp_period(data, &samp_period);
  400. if (ret < 0)
  401. return ret;
  402. /* period should be atleast equal to rate */
  403. if (period < samp_period)
  404. return -EINVAL;
  405. new_val = DIV_ROUND_UP(period, samp_period);
  406. if (new_val < 0 || new_val > 0x0f)
  407. return -EINVAL;
  408. mutex_lock(&data->lock_ps);
  409. ret = regmap_field_write(data->reg_ps_prst, new_val);
  410. mutex_unlock(&data->lock_ps);
  411. if (ret >= 0)
  412. data->ps_period = period;
  413. return ret;
  414. default:
  415. return -EINVAL;
  416. }
  417. return -EINVAL;
  418. }
  419. static const struct iio_event_spec ltr501_als_event_spec[] = {
  420. {
  421. .type = IIO_EV_TYPE_THRESH,
  422. .dir = IIO_EV_DIR_RISING,
  423. .mask_separate = BIT(IIO_EV_INFO_VALUE),
  424. }, {
  425. .type = IIO_EV_TYPE_THRESH,
  426. .dir = IIO_EV_DIR_FALLING,
  427. .mask_separate = BIT(IIO_EV_INFO_VALUE),
  428. }, {
  429. .type = IIO_EV_TYPE_THRESH,
  430. .dir = IIO_EV_DIR_EITHER,
  431. .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
  432. BIT(IIO_EV_INFO_PERIOD),
  433. },
  434. };
  435. static const struct iio_event_spec ltr501_pxs_event_spec[] = {
  436. {
  437. .type = IIO_EV_TYPE_THRESH,
  438. .dir = IIO_EV_DIR_RISING,
  439. .mask_separate = BIT(IIO_EV_INFO_VALUE),
  440. }, {
  441. .type = IIO_EV_TYPE_THRESH,
  442. .dir = IIO_EV_DIR_FALLING,
  443. .mask_separate = BIT(IIO_EV_INFO_VALUE),
  444. }, {
  445. .type = IIO_EV_TYPE_THRESH,
  446. .dir = IIO_EV_DIR_EITHER,
  447. .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
  448. BIT(IIO_EV_INFO_PERIOD),
  449. },
  450. };
  451. #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
  452. _evspec, _evsize) { \
  453. .type = IIO_INTENSITY, \
  454. .modified = 1, \
  455. .address = (_addr), \
  456. .channel2 = (_mod), \
  457. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  458. .info_mask_shared_by_type = (_shared), \
  459. .scan_index = (_idx), \
  460. .scan_type = { \
  461. .sign = 'u', \
  462. .realbits = 16, \
  463. .storagebits = 16, \
  464. .endianness = IIO_CPU, \
  465. }, \
  466. .event_spec = _evspec,\
  467. .num_event_specs = _evsize,\
  468. }
  469. #define LTR501_LIGHT_CHANNEL() { \
  470. .type = IIO_LIGHT, \
  471. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
  472. .scan_index = -1, \
  473. }
  474. static const struct iio_chan_spec ltr501_channels[] = {
  475. LTR501_LIGHT_CHANNEL(),
  476. LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
  477. ltr501_als_event_spec,
  478. ARRAY_SIZE(ltr501_als_event_spec)),
  479. LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
  480. BIT(IIO_CHAN_INFO_SCALE) |
  481. BIT(IIO_CHAN_INFO_INT_TIME) |
  482. BIT(IIO_CHAN_INFO_SAMP_FREQ),
  483. NULL, 0),
  484. {
  485. .type = IIO_PROXIMITY,
  486. .address = LTR501_PS_DATA,
  487. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  488. BIT(IIO_CHAN_INFO_SCALE),
  489. .scan_index = 2,
  490. .scan_type = {
  491. .sign = 'u',
  492. .realbits = 11,
  493. .storagebits = 16,
  494. .endianness = IIO_CPU,
  495. },
  496. .event_spec = ltr501_pxs_event_spec,
  497. .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
  498. },
  499. IIO_CHAN_SOFT_TIMESTAMP(3),
  500. };
  501. static const struct iio_chan_spec ltr301_channels[] = {
  502. LTR501_LIGHT_CHANNEL(),
  503. LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
  504. ltr501_als_event_spec,
  505. ARRAY_SIZE(ltr501_als_event_spec)),
  506. LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
  507. BIT(IIO_CHAN_INFO_SCALE) |
  508. BIT(IIO_CHAN_INFO_INT_TIME) |
  509. BIT(IIO_CHAN_INFO_SAMP_FREQ),
  510. NULL, 0),
  511. IIO_CHAN_SOFT_TIMESTAMP(2),
  512. };
  513. static int ltr501_read_raw(struct iio_dev *indio_dev,
  514. struct iio_chan_spec const *chan,
  515. int *val, int *val2, long mask)
  516. {
  517. struct ltr501_data *data = iio_priv(indio_dev);
  518. __le16 buf[2];
  519. int ret, i;
  520. switch (mask) {
  521. case IIO_CHAN_INFO_PROCESSED:
  522. switch (chan->type) {
  523. case IIO_LIGHT:
  524. ret = iio_device_claim_direct_mode(indio_dev);
  525. if (ret)
  526. return ret;
  527. mutex_lock(&data->lock_als);
  528. ret = ltr501_read_als(data, buf);
  529. mutex_unlock(&data->lock_als);
  530. iio_device_release_direct_mode(indio_dev);
  531. if (ret < 0)
  532. return ret;
  533. *val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
  534. le16_to_cpu(buf[0]));
  535. return IIO_VAL_INT;
  536. default:
  537. return -EINVAL;
  538. }
  539. case IIO_CHAN_INFO_RAW:
  540. ret = iio_device_claim_direct_mode(indio_dev);
  541. if (ret)
  542. return ret;
  543. switch (chan->type) {
  544. case IIO_INTENSITY:
  545. mutex_lock(&data->lock_als);
  546. ret = ltr501_read_als(data, buf);
  547. mutex_unlock(&data->lock_als);
  548. if (ret < 0)
  549. break;
  550. *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
  551. buf[0] : buf[1]);
  552. ret = IIO_VAL_INT;
  553. break;
  554. case IIO_PROXIMITY:
  555. mutex_lock(&data->lock_ps);
  556. ret = ltr501_read_ps(data);
  557. mutex_unlock(&data->lock_ps);
  558. if (ret < 0)
  559. break;
  560. *val = ret & LTR501_PS_DATA_MASK;
  561. ret = IIO_VAL_INT;
  562. break;
  563. default:
  564. ret = -EINVAL;
  565. break;
  566. }
  567. iio_device_release_direct_mode(indio_dev);
  568. return ret;
  569. case IIO_CHAN_INFO_SCALE:
  570. switch (chan->type) {
  571. case IIO_INTENSITY:
  572. i = (data->als_contr & data->chip_info->als_gain_mask)
  573. >> data->chip_info->als_gain_shift;
  574. *val = data->chip_info->als_gain[i].scale;
  575. *val2 = data->chip_info->als_gain[i].uscale;
  576. return IIO_VAL_INT_PLUS_MICRO;
  577. case IIO_PROXIMITY:
  578. i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
  579. LTR501_CONTR_PS_GAIN_SHIFT;
  580. *val = data->chip_info->ps_gain[i].scale;
  581. *val2 = data->chip_info->ps_gain[i].uscale;
  582. return IIO_VAL_INT_PLUS_MICRO;
  583. default:
  584. return -EINVAL;
  585. }
  586. case IIO_CHAN_INFO_INT_TIME:
  587. switch (chan->type) {
  588. case IIO_INTENSITY:
  589. return ltr501_read_it_time(data, val, val2);
  590. default:
  591. return -EINVAL;
  592. }
  593. case IIO_CHAN_INFO_SAMP_FREQ:
  594. switch (chan->type) {
  595. case IIO_INTENSITY:
  596. return ltr501_als_read_samp_freq(data, val, val2);
  597. case IIO_PROXIMITY:
  598. return ltr501_ps_read_samp_freq(data, val, val2);
  599. default:
  600. return -EINVAL;
  601. }
  602. }
  603. return -EINVAL;
  604. }
  605. static int ltr501_get_gain_index(struct ltr501_gain *gain, int size,
  606. int val, int val2)
  607. {
  608. int i;
  609. for (i = 0; i < size; i++)
  610. if (val == gain[i].scale && val2 == gain[i].uscale)
  611. return i;
  612. return -1;
  613. }
  614. static int ltr501_write_raw(struct iio_dev *indio_dev,
  615. struct iio_chan_spec const *chan,
  616. int val, int val2, long mask)
  617. {
  618. struct ltr501_data *data = iio_priv(indio_dev);
  619. int i, ret, freq_val, freq_val2;
  620. struct ltr501_chip_info *info = data->chip_info;
  621. ret = iio_device_claim_direct_mode(indio_dev);
  622. if (ret)
  623. return ret;
  624. switch (mask) {
  625. case IIO_CHAN_INFO_SCALE:
  626. switch (chan->type) {
  627. case IIO_INTENSITY:
  628. i = ltr501_get_gain_index(info->als_gain,
  629. info->als_gain_tbl_size,
  630. val, val2);
  631. if (i < 0) {
  632. ret = -EINVAL;
  633. break;
  634. }
  635. data->als_contr &= ~info->als_gain_mask;
  636. data->als_contr |= i << info->als_gain_shift;
  637. ret = regmap_write(data->regmap, LTR501_ALS_CONTR,
  638. data->als_contr);
  639. break;
  640. case IIO_PROXIMITY:
  641. i = ltr501_get_gain_index(info->ps_gain,
  642. info->ps_gain_tbl_size,
  643. val, val2);
  644. if (i < 0) {
  645. ret = -EINVAL;
  646. break;
  647. }
  648. data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
  649. data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
  650. ret = regmap_write(data->regmap, LTR501_PS_CONTR,
  651. data->ps_contr);
  652. break;
  653. default:
  654. ret = -EINVAL;
  655. break;
  656. }
  657. break;
  658. case IIO_CHAN_INFO_INT_TIME:
  659. switch (chan->type) {
  660. case IIO_INTENSITY:
  661. if (val != 0) {
  662. ret = -EINVAL;
  663. break;
  664. }
  665. mutex_lock(&data->lock_als);
  666. ret = ltr501_set_it_time(data, val2);
  667. mutex_unlock(&data->lock_als);
  668. break;
  669. default:
  670. ret = -EINVAL;
  671. break;
  672. }
  673. break;
  674. case IIO_CHAN_INFO_SAMP_FREQ:
  675. switch (chan->type) {
  676. case IIO_INTENSITY:
  677. ret = ltr501_als_read_samp_freq(data, &freq_val,
  678. &freq_val2);
  679. if (ret < 0)
  680. break;
  681. ret = ltr501_als_write_samp_freq(data, val, val2);
  682. if (ret < 0)
  683. break;
  684. /* update persistence count when changing frequency */
  685. ret = ltr501_write_intr_prst(data, chan->type,
  686. 0, data->als_period);
  687. if (ret < 0)
  688. ret = ltr501_als_write_samp_freq(data, freq_val,
  689. freq_val2);
  690. break;
  691. case IIO_PROXIMITY:
  692. ret = ltr501_ps_read_samp_freq(data, &freq_val,
  693. &freq_val2);
  694. if (ret < 0)
  695. break;
  696. ret = ltr501_ps_write_samp_freq(data, val, val2);
  697. if (ret < 0)
  698. break;
  699. /* update persistence count when changing frequency */
  700. ret = ltr501_write_intr_prst(data, chan->type,
  701. 0, data->ps_period);
  702. if (ret < 0)
  703. ret = ltr501_ps_write_samp_freq(data, freq_val,
  704. freq_val2);
  705. break;
  706. default:
  707. ret = -EINVAL;
  708. break;
  709. }
  710. break;
  711. default:
  712. ret = -EINVAL;
  713. break;
  714. }
  715. iio_device_release_direct_mode(indio_dev);
  716. return ret;
  717. }
  718. static int ltr501_read_thresh(struct iio_dev *indio_dev,
  719. const struct iio_chan_spec *chan,
  720. enum iio_event_type type,
  721. enum iio_event_direction dir,
  722. enum iio_event_info info,
  723. int *val, int *val2)
  724. {
  725. struct ltr501_data *data = iio_priv(indio_dev);
  726. int ret, thresh_data;
  727. switch (chan->type) {
  728. case IIO_INTENSITY:
  729. switch (dir) {
  730. case IIO_EV_DIR_RISING:
  731. ret = regmap_bulk_read(data->regmap,
  732. LTR501_ALS_THRESH_UP,
  733. &thresh_data, 2);
  734. if (ret < 0)
  735. return ret;
  736. *val = thresh_data & LTR501_ALS_THRESH_MASK;
  737. return IIO_VAL_INT;
  738. case IIO_EV_DIR_FALLING:
  739. ret = regmap_bulk_read(data->regmap,
  740. LTR501_ALS_THRESH_LOW,
  741. &thresh_data, 2);
  742. if (ret < 0)
  743. return ret;
  744. *val = thresh_data & LTR501_ALS_THRESH_MASK;
  745. return IIO_VAL_INT;
  746. default:
  747. return -EINVAL;
  748. }
  749. case IIO_PROXIMITY:
  750. switch (dir) {
  751. case IIO_EV_DIR_RISING:
  752. ret = regmap_bulk_read(data->regmap,
  753. LTR501_PS_THRESH_UP,
  754. &thresh_data, 2);
  755. if (ret < 0)
  756. return ret;
  757. *val = thresh_data & LTR501_PS_THRESH_MASK;
  758. return IIO_VAL_INT;
  759. case IIO_EV_DIR_FALLING:
  760. ret = regmap_bulk_read(data->regmap,
  761. LTR501_PS_THRESH_LOW,
  762. &thresh_data, 2);
  763. if (ret < 0)
  764. return ret;
  765. *val = thresh_data & LTR501_PS_THRESH_MASK;
  766. return IIO_VAL_INT;
  767. default:
  768. return -EINVAL;
  769. }
  770. default:
  771. return -EINVAL;
  772. }
  773. return -EINVAL;
  774. }
  775. static int ltr501_write_thresh(struct iio_dev *indio_dev,
  776. const struct iio_chan_spec *chan,
  777. enum iio_event_type type,
  778. enum iio_event_direction dir,
  779. enum iio_event_info info,
  780. int val, int val2)
  781. {
  782. struct ltr501_data *data = iio_priv(indio_dev);
  783. int ret;
  784. if (val < 0)
  785. return -EINVAL;
  786. switch (chan->type) {
  787. case IIO_INTENSITY:
  788. if (val > LTR501_ALS_THRESH_MASK)
  789. return -EINVAL;
  790. switch (dir) {
  791. case IIO_EV_DIR_RISING:
  792. mutex_lock(&data->lock_als);
  793. ret = regmap_bulk_write(data->regmap,
  794. LTR501_ALS_THRESH_UP,
  795. &val, 2);
  796. mutex_unlock(&data->lock_als);
  797. return ret;
  798. case IIO_EV_DIR_FALLING:
  799. mutex_lock(&data->lock_als);
  800. ret = regmap_bulk_write(data->regmap,
  801. LTR501_ALS_THRESH_LOW,
  802. &val, 2);
  803. mutex_unlock(&data->lock_als);
  804. return ret;
  805. default:
  806. return -EINVAL;
  807. }
  808. case IIO_PROXIMITY:
  809. if (val > LTR501_PS_THRESH_MASK)
  810. return -EINVAL;
  811. switch (dir) {
  812. case IIO_EV_DIR_RISING:
  813. mutex_lock(&data->lock_ps);
  814. ret = regmap_bulk_write(data->regmap,
  815. LTR501_PS_THRESH_UP,
  816. &val, 2);
  817. mutex_unlock(&data->lock_ps);
  818. return ret;
  819. case IIO_EV_DIR_FALLING:
  820. mutex_lock(&data->lock_ps);
  821. ret = regmap_bulk_write(data->regmap,
  822. LTR501_PS_THRESH_LOW,
  823. &val, 2);
  824. mutex_unlock(&data->lock_ps);
  825. return ret;
  826. default:
  827. return -EINVAL;
  828. }
  829. default:
  830. return -EINVAL;
  831. }
  832. return -EINVAL;
  833. }
  834. static int ltr501_read_event(struct iio_dev *indio_dev,
  835. const struct iio_chan_spec *chan,
  836. enum iio_event_type type,
  837. enum iio_event_direction dir,
  838. enum iio_event_info info,
  839. int *val, int *val2)
  840. {
  841. int ret;
  842. switch (info) {
  843. case IIO_EV_INFO_VALUE:
  844. return ltr501_read_thresh(indio_dev, chan, type, dir,
  845. info, val, val2);
  846. case IIO_EV_INFO_PERIOD:
  847. ret = ltr501_read_intr_prst(iio_priv(indio_dev),
  848. chan->type, val2);
  849. *val = *val2 / 1000000;
  850. *val2 = *val2 % 1000000;
  851. return ret;
  852. default:
  853. return -EINVAL;
  854. }
  855. return -EINVAL;
  856. }
  857. static int ltr501_write_event(struct iio_dev *indio_dev,
  858. const struct iio_chan_spec *chan,
  859. enum iio_event_type type,
  860. enum iio_event_direction dir,
  861. enum iio_event_info info,
  862. int val, int val2)
  863. {
  864. switch (info) {
  865. case IIO_EV_INFO_VALUE:
  866. if (val2 != 0)
  867. return -EINVAL;
  868. return ltr501_write_thresh(indio_dev, chan, type, dir,
  869. info, val, val2);
  870. case IIO_EV_INFO_PERIOD:
  871. return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
  872. val, val2);
  873. default:
  874. return -EINVAL;
  875. }
  876. return -EINVAL;
  877. }
  878. static int ltr501_read_event_config(struct iio_dev *indio_dev,
  879. const struct iio_chan_spec *chan,
  880. enum iio_event_type type,
  881. enum iio_event_direction dir)
  882. {
  883. struct ltr501_data *data = iio_priv(indio_dev);
  884. int ret, status;
  885. switch (chan->type) {
  886. case IIO_INTENSITY:
  887. ret = regmap_field_read(data->reg_als_intr, &status);
  888. if (ret < 0)
  889. return ret;
  890. return status;
  891. case IIO_PROXIMITY:
  892. ret = regmap_field_read(data->reg_ps_intr, &status);
  893. if (ret < 0)
  894. return ret;
  895. return status;
  896. default:
  897. return -EINVAL;
  898. }
  899. return -EINVAL;
  900. }
  901. static int ltr501_write_event_config(struct iio_dev *indio_dev,
  902. const struct iio_chan_spec *chan,
  903. enum iio_event_type type,
  904. enum iio_event_direction dir, int state)
  905. {
  906. struct ltr501_data *data = iio_priv(indio_dev);
  907. int ret;
  908. /* only 1 and 0 are valid inputs */
  909. if (state != 1 && state != 0)
  910. return -EINVAL;
  911. switch (chan->type) {
  912. case IIO_INTENSITY:
  913. mutex_lock(&data->lock_als);
  914. ret = regmap_field_write(data->reg_als_intr, state);
  915. mutex_unlock(&data->lock_als);
  916. return ret;
  917. case IIO_PROXIMITY:
  918. mutex_lock(&data->lock_ps);
  919. ret = regmap_field_write(data->reg_ps_intr, state);
  920. mutex_unlock(&data->lock_ps);
  921. return ret;
  922. default:
  923. return -EINVAL;
  924. }
  925. return -EINVAL;
  926. }
  927. static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
  928. struct device_attribute *attr,
  929. char *buf)
  930. {
  931. struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
  932. struct ltr501_chip_info *info = data->chip_info;
  933. ssize_t len = 0;
  934. int i;
  935. for (i = 0; i < info->ps_gain_tbl_size; i++) {
  936. if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
  937. continue;
  938. len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
  939. info->ps_gain[i].scale,
  940. info->ps_gain[i].uscale);
  941. }
  942. buf[len - 1] = '\n';
  943. return len;
  944. }
  945. static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
  946. struct device_attribute *attr,
  947. char *buf)
  948. {
  949. struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
  950. struct ltr501_chip_info *info = data->chip_info;
  951. ssize_t len = 0;
  952. int i;
  953. for (i = 0; i < info->als_gain_tbl_size; i++) {
  954. if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
  955. continue;
  956. len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
  957. info->als_gain[i].scale,
  958. info->als_gain[i].uscale);
  959. }
  960. buf[len - 1] = '\n';
  961. return len;
  962. }
  963. static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
  964. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
  965. static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
  966. ltr501_show_proximity_scale_avail, NULL, 0);
  967. static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
  968. ltr501_show_intensity_scale_avail, NULL, 0);
  969. static struct attribute *ltr501_attributes[] = {
  970. &iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
  971. &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
  972. &iio_const_attr_integration_time_available.dev_attr.attr,
  973. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  974. NULL
  975. };
  976. static struct attribute *ltr301_attributes[] = {
  977. &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
  978. &iio_const_attr_integration_time_available.dev_attr.attr,
  979. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  980. NULL
  981. };
  982. static const struct attribute_group ltr501_attribute_group = {
  983. .attrs = ltr501_attributes,
  984. };
  985. static const struct attribute_group ltr301_attribute_group = {
  986. .attrs = ltr301_attributes,
  987. };
  988. static const struct iio_info ltr501_info_no_irq = {
  989. .read_raw = ltr501_read_raw,
  990. .write_raw = ltr501_write_raw,
  991. .attrs = &ltr501_attribute_group,
  992. };
  993. static const struct iio_info ltr501_info = {
  994. .read_raw = ltr501_read_raw,
  995. .write_raw = ltr501_write_raw,
  996. .attrs = &ltr501_attribute_group,
  997. .read_event_value = &ltr501_read_event,
  998. .write_event_value = &ltr501_write_event,
  999. .read_event_config = &ltr501_read_event_config,
  1000. .write_event_config = &ltr501_write_event_config,
  1001. };
  1002. static const struct iio_info ltr301_info_no_irq = {
  1003. .read_raw = ltr501_read_raw,
  1004. .write_raw = ltr501_write_raw,
  1005. .attrs = &ltr301_attribute_group,
  1006. };
  1007. static const struct iio_info ltr301_info = {
  1008. .read_raw = ltr501_read_raw,
  1009. .write_raw = ltr501_write_raw,
  1010. .attrs = &ltr301_attribute_group,
  1011. .read_event_value = &ltr501_read_event,
  1012. .write_event_value = &ltr501_write_event,
  1013. .read_event_config = &ltr501_read_event_config,
  1014. .write_event_config = &ltr501_write_event_config,
  1015. };
  1016. static struct ltr501_chip_info ltr501_chip_info_tbl[] = {
  1017. [ltr501] = {
  1018. .partid = 0x08,
  1019. .als_gain = ltr501_als_gain_tbl,
  1020. .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
  1021. .ps_gain = ltr501_ps_gain_tbl,
  1022. .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
  1023. .als_mode_active = BIT(0) | BIT(1),
  1024. .als_gain_mask = BIT(3),
  1025. .als_gain_shift = 3,
  1026. .info = &ltr501_info,
  1027. .info_no_irq = &ltr501_info_no_irq,
  1028. .channels = ltr501_channels,
  1029. .no_channels = ARRAY_SIZE(ltr501_channels),
  1030. },
  1031. [ltr559] = {
  1032. .partid = 0x09,
  1033. .als_gain = ltr559_als_gain_tbl,
  1034. .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
  1035. .ps_gain = ltr559_ps_gain_tbl,
  1036. .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
  1037. .als_mode_active = BIT(1),
  1038. .als_gain_mask = BIT(2) | BIT(3) | BIT(4),
  1039. .als_gain_shift = 2,
  1040. .info = &ltr501_info,
  1041. .info_no_irq = &ltr501_info_no_irq,
  1042. .channels = ltr501_channels,
  1043. .no_channels = ARRAY_SIZE(ltr501_channels),
  1044. },
  1045. [ltr301] = {
  1046. .partid = 0x08,
  1047. .als_gain = ltr501_als_gain_tbl,
  1048. .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
  1049. .als_mode_active = BIT(0) | BIT(1),
  1050. .als_gain_mask = BIT(3),
  1051. .als_gain_shift = 3,
  1052. .info = &ltr301_info,
  1053. .info_no_irq = &ltr301_info_no_irq,
  1054. .channels = ltr301_channels,
  1055. .no_channels = ARRAY_SIZE(ltr301_channels),
  1056. },
  1057. };
  1058. static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
  1059. {
  1060. int ret;
  1061. ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
  1062. if (ret < 0)
  1063. return ret;
  1064. return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
  1065. }
  1066. static irqreturn_t ltr501_trigger_handler(int irq, void *p)
  1067. {
  1068. struct iio_poll_func *pf = p;
  1069. struct iio_dev *indio_dev = pf->indio_dev;
  1070. struct ltr501_data *data = iio_priv(indio_dev);
  1071. u16 buf[8];
  1072. __le16 als_buf[2];
  1073. u8 mask = 0;
  1074. int j = 0;
  1075. int ret, psdata;
  1076. memset(buf, 0, sizeof(buf));
  1077. /* figure out which data needs to be ready */
  1078. if (test_bit(0, indio_dev->active_scan_mask) ||
  1079. test_bit(1, indio_dev->active_scan_mask))
  1080. mask |= LTR501_STATUS_ALS_RDY;
  1081. if (test_bit(2, indio_dev->active_scan_mask))
  1082. mask |= LTR501_STATUS_PS_RDY;
  1083. ret = ltr501_drdy(data, mask);
  1084. if (ret < 0)
  1085. goto done;
  1086. if (mask & LTR501_STATUS_ALS_RDY) {
  1087. ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
  1088. (u8 *)als_buf, sizeof(als_buf));
  1089. if (ret < 0)
  1090. return ret;
  1091. if (test_bit(0, indio_dev->active_scan_mask))
  1092. buf[j++] = le16_to_cpu(als_buf[1]);
  1093. if (test_bit(1, indio_dev->active_scan_mask))
  1094. buf[j++] = le16_to_cpu(als_buf[0]);
  1095. }
  1096. if (mask & LTR501_STATUS_PS_RDY) {
  1097. ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
  1098. &psdata, 2);
  1099. if (ret < 0)
  1100. goto done;
  1101. buf[j++] = psdata & LTR501_PS_DATA_MASK;
  1102. }
  1103. iio_push_to_buffers_with_timestamp(indio_dev, buf,
  1104. iio_get_time_ns(indio_dev));
  1105. done:
  1106. iio_trigger_notify_done(indio_dev->trig);
  1107. return IRQ_HANDLED;
  1108. }
  1109. static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
  1110. {
  1111. struct iio_dev *indio_dev = private;
  1112. struct ltr501_data *data = iio_priv(indio_dev);
  1113. int ret, status;
  1114. ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
  1115. if (ret < 0) {
  1116. dev_err(&data->client->dev,
  1117. "irq read int reg failed\n");
  1118. return IRQ_HANDLED;
  1119. }
  1120. if (status & LTR501_STATUS_ALS_INTR)
  1121. iio_push_event(indio_dev,
  1122. IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
  1123. IIO_EV_TYPE_THRESH,
  1124. IIO_EV_DIR_EITHER),
  1125. iio_get_time_ns(indio_dev));
  1126. if (status & LTR501_STATUS_PS_INTR)
  1127. iio_push_event(indio_dev,
  1128. IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
  1129. IIO_EV_TYPE_THRESH,
  1130. IIO_EV_DIR_EITHER),
  1131. iio_get_time_ns(indio_dev));
  1132. return IRQ_HANDLED;
  1133. }
  1134. static int ltr501_init(struct ltr501_data *data)
  1135. {
  1136. int ret, status;
  1137. ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
  1138. if (ret < 0)
  1139. return ret;
  1140. data->als_contr = status | data->chip_info->als_mode_active;
  1141. ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
  1142. if (ret < 0)
  1143. return ret;
  1144. data->ps_contr = status | LTR501_CONTR_ACTIVE;
  1145. ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
  1146. if (ret < 0)
  1147. return ret;
  1148. ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
  1149. if (ret < 0)
  1150. return ret;
  1151. return ltr501_write_contr(data, data->als_contr, data->ps_contr);
  1152. }
  1153. static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
  1154. {
  1155. switch (reg) {
  1156. case LTR501_ALS_DATA1:
  1157. case LTR501_ALS_DATA0:
  1158. case LTR501_ALS_PS_STATUS:
  1159. case LTR501_PS_DATA:
  1160. return true;
  1161. default:
  1162. return false;
  1163. }
  1164. }
  1165. static struct regmap_config ltr501_regmap_config = {
  1166. .name = LTR501_REGMAP_NAME,
  1167. .reg_bits = 8,
  1168. .val_bits = 8,
  1169. .max_register = LTR501_MAX_REG,
  1170. .cache_type = REGCACHE_RBTREE,
  1171. .volatile_reg = ltr501_is_volatile_reg,
  1172. };
  1173. static int ltr501_powerdown(struct ltr501_data *data)
  1174. {
  1175. return ltr501_write_contr(data, data->als_contr &
  1176. ~data->chip_info->als_mode_active,
  1177. data->ps_contr & ~LTR501_CONTR_ACTIVE);
  1178. }
  1179. static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx)
  1180. {
  1181. const struct acpi_device_id *id;
  1182. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  1183. if (!id)
  1184. return NULL;
  1185. *chip_idx = id->driver_data;
  1186. return dev_name(dev);
  1187. }
  1188. static int ltr501_probe(struct i2c_client *client,
  1189. const struct i2c_device_id *id)
  1190. {
  1191. struct ltr501_data *data;
  1192. struct iio_dev *indio_dev;
  1193. struct regmap *regmap;
  1194. int ret, partid, chip_idx = 0;
  1195. const char *name = NULL;
  1196. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  1197. if (!indio_dev)
  1198. return -ENOMEM;
  1199. regmap = devm_regmap_init_i2c(client, &ltr501_regmap_config);
  1200. if (IS_ERR(regmap)) {
  1201. dev_err(&client->dev, "Regmap initialization failed.\n");
  1202. return PTR_ERR(regmap);
  1203. }
  1204. data = iio_priv(indio_dev);
  1205. i2c_set_clientdata(client, indio_dev);
  1206. data->client = client;
  1207. data->regmap = regmap;
  1208. mutex_init(&data->lock_als);
  1209. mutex_init(&data->lock_ps);
  1210. data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
  1211. reg_field_it);
  1212. if (IS_ERR(data->reg_it)) {
  1213. dev_err(&client->dev, "Integ time reg field init failed.\n");
  1214. return PTR_ERR(data->reg_it);
  1215. }
  1216. data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
  1217. reg_field_als_intr);
  1218. if (IS_ERR(data->reg_als_intr)) {
  1219. dev_err(&client->dev, "ALS intr mode reg field init failed\n");
  1220. return PTR_ERR(data->reg_als_intr);
  1221. }
  1222. data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
  1223. reg_field_ps_intr);
  1224. if (IS_ERR(data->reg_ps_intr)) {
  1225. dev_err(&client->dev, "PS intr mode reg field init failed.\n");
  1226. return PTR_ERR(data->reg_ps_intr);
  1227. }
  1228. data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
  1229. reg_field_als_rate);
  1230. if (IS_ERR(data->reg_als_rate)) {
  1231. dev_err(&client->dev, "ALS samp rate field init failed.\n");
  1232. return PTR_ERR(data->reg_als_rate);
  1233. }
  1234. data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
  1235. reg_field_ps_rate);
  1236. if (IS_ERR(data->reg_ps_rate)) {
  1237. dev_err(&client->dev, "PS samp rate field init failed.\n");
  1238. return PTR_ERR(data->reg_ps_rate);
  1239. }
  1240. data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
  1241. reg_field_als_prst);
  1242. if (IS_ERR(data->reg_als_prst)) {
  1243. dev_err(&client->dev, "ALS prst reg field init failed\n");
  1244. return PTR_ERR(data->reg_als_prst);
  1245. }
  1246. data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
  1247. reg_field_ps_prst);
  1248. if (IS_ERR(data->reg_ps_prst)) {
  1249. dev_err(&client->dev, "PS prst reg field init failed.\n");
  1250. return PTR_ERR(data->reg_ps_prst);
  1251. }
  1252. ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
  1253. if (ret < 0)
  1254. return ret;
  1255. if (id) {
  1256. name = id->name;
  1257. chip_idx = id->driver_data;
  1258. } else if (ACPI_HANDLE(&client->dev)) {
  1259. name = ltr501_match_acpi_device(&client->dev, &chip_idx);
  1260. } else {
  1261. return -ENODEV;
  1262. }
  1263. data->chip_info = &ltr501_chip_info_tbl[chip_idx];
  1264. if ((partid >> 4) != data->chip_info->partid)
  1265. return -ENODEV;
  1266. indio_dev->dev.parent = &client->dev;
  1267. indio_dev->info = data->chip_info->info;
  1268. indio_dev->channels = data->chip_info->channels;
  1269. indio_dev->num_channels = data->chip_info->no_channels;
  1270. indio_dev->name = name;
  1271. indio_dev->modes = INDIO_DIRECT_MODE;
  1272. ret = ltr501_init(data);
  1273. if (ret < 0)
  1274. return ret;
  1275. if (client->irq > 0) {
  1276. ret = devm_request_threaded_irq(&client->dev, client->irq,
  1277. NULL, ltr501_interrupt_handler,
  1278. IRQF_TRIGGER_FALLING |
  1279. IRQF_ONESHOT,
  1280. "ltr501_thresh_event",
  1281. indio_dev);
  1282. if (ret) {
  1283. dev_err(&client->dev, "request irq (%d) failed\n",
  1284. client->irq);
  1285. return ret;
  1286. }
  1287. } else {
  1288. indio_dev->info = data->chip_info->info_no_irq;
  1289. }
  1290. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  1291. ltr501_trigger_handler, NULL);
  1292. if (ret)
  1293. goto powerdown_on_error;
  1294. ret = iio_device_register(indio_dev);
  1295. if (ret)
  1296. goto error_unreg_buffer;
  1297. return 0;
  1298. error_unreg_buffer:
  1299. iio_triggered_buffer_cleanup(indio_dev);
  1300. powerdown_on_error:
  1301. ltr501_powerdown(data);
  1302. return ret;
  1303. }
  1304. static int ltr501_remove(struct i2c_client *client)
  1305. {
  1306. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1307. iio_device_unregister(indio_dev);
  1308. iio_triggered_buffer_cleanup(indio_dev);
  1309. ltr501_powerdown(iio_priv(indio_dev));
  1310. return 0;
  1311. }
  1312. #ifdef CONFIG_PM_SLEEP
  1313. static int ltr501_suspend(struct device *dev)
  1314. {
  1315. struct ltr501_data *data = iio_priv(i2c_get_clientdata(
  1316. to_i2c_client(dev)));
  1317. return ltr501_powerdown(data);
  1318. }
  1319. static int ltr501_resume(struct device *dev)
  1320. {
  1321. struct ltr501_data *data = iio_priv(i2c_get_clientdata(
  1322. to_i2c_client(dev)));
  1323. return ltr501_write_contr(data, data->als_contr,
  1324. data->ps_contr);
  1325. }
  1326. #endif
  1327. static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
  1328. static const struct acpi_device_id ltr_acpi_match[] = {
  1329. {"LTER0501", ltr501},
  1330. {"LTER0559", ltr559},
  1331. {"LTER0301", ltr301},
  1332. { },
  1333. };
  1334. MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
  1335. static const struct i2c_device_id ltr501_id[] = {
  1336. { "ltr501", ltr501},
  1337. { "ltr559", ltr559},
  1338. { "ltr301", ltr301},
  1339. { }
  1340. };
  1341. MODULE_DEVICE_TABLE(i2c, ltr501_id);
  1342. static struct i2c_driver ltr501_driver = {
  1343. .driver = {
  1344. .name = LTR501_DRV_NAME,
  1345. .pm = &ltr501_pm_ops,
  1346. .acpi_match_table = ACPI_PTR(ltr_acpi_match),
  1347. },
  1348. .probe = ltr501_probe,
  1349. .remove = ltr501_remove,
  1350. .id_table = ltr501_id,
  1351. };
  1352. module_i2c_driver(ltr501_driver);
  1353. MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
  1354. MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
  1355. MODULE_LICENSE("GPL");