Kconfig 22 KB

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  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for s390 cryptographic adapters"
  52. depends on S390
  53. select HW_RANDOM
  54. help
  55. Select this option if you want to enable support for
  56. s390 cryptographic adapters like:
  57. + PCI-X Cryptographic Coprocessor (PCIXCC)
  58. + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
  59. + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
  60. + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
  61. config PKEY
  62. tristate "Kernel API for protected key handling"
  63. depends on S390
  64. depends on ZCRYPT
  65. help
  66. With this option enabled the pkey kernel module provides an API
  67. for creation and handling of protected keys. Other parts of the
  68. kernel or userspace applications may use these functions.
  69. Select this option if you want to enable the kernel and userspace
  70. API for proteced key handling.
  71. Please note that creation of protected keys from secure keys
  72. requires to have at least one CEX card in coprocessor mode
  73. available at runtime.
  74. config CRYPTO_PAES_S390
  75. tristate "PAES cipher algorithms"
  76. depends on S390
  77. depends on ZCRYPT
  78. depends on PKEY
  79. select CRYPTO_ALGAPI
  80. select CRYPTO_BLKCIPHER
  81. help
  82. This is the s390 hardware accelerated implementation of the
  83. AES cipher algorithms for use with protected key.
  84. Select this option if you want to use the paes cipher
  85. for example to use protected key encrypted devices.
  86. config CRYPTO_SHA1_S390
  87. tristate "SHA1 digest algorithm"
  88. depends on S390
  89. select CRYPTO_HASH
  90. help
  91. This is the s390 hardware accelerated implementation of the
  92. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  93. It is available as of z990.
  94. config CRYPTO_SHA256_S390
  95. tristate "SHA256 digest algorithm"
  96. depends on S390
  97. select CRYPTO_HASH
  98. help
  99. This is the s390 hardware accelerated implementation of the
  100. SHA256 secure hash standard (DFIPS 180-2).
  101. It is available as of z9.
  102. config CRYPTO_SHA512_S390
  103. tristate "SHA384 and SHA512 digest algorithm"
  104. depends on S390
  105. select CRYPTO_HASH
  106. help
  107. This is the s390 hardware accelerated implementation of the
  108. SHA512 secure hash standard.
  109. It is available as of z10.
  110. config CRYPTO_DES_S390
  111. tristate "DES and Triple DES cipher algorithms"
  112. depends on S390
  113. select CRYPTO_ALGAPI
  114. select CRYPTO_BLKCIPHER
  115. select CRYPTO_DES
  116. help
  117. This is the s390 hardware accelerated implementation of the
  118. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  119. As of z990 the ECB and CBC mode are hardware accelerated.
  120. As of z196 the CTR mode is hardware accelerated.
  121. config CRYPTO_AES_S390
  122. tristate "AES cipher algorithms"
  123. depends on S390
  124. select CRYPTO_ALGAPI
  125. select CRYPTO_BLKCIPHER
  126. help
  127. This is the s390 hardware accelerated implementation of the
  128. AES cipher algorithms (FIPS-197).
  129. As of z9 the ECB and CBC modes are hardware accelerated
  130. for 128 bit keys.
  131. As of z10 the ECB and CBC modes are hardware accelerated
  132. for all AES key sizes.
  133. As of z196 the CTR mode is hardware accelerated for all AES
  134. key sizes and XTS mode is hardware accelerated for 256 and
  135. 512 bit keys.
  136. config S390_PRNG
  137. tristate "Pseudo random number generator device driver"
  138. depends on S390
  139. default "m"
  140. help
  141. Select this option if you want to use the s390 pseudo random number
  142. generator. The PRNG is part of the cryptographic processor functions
  143. and uses triple-DES to generate secure random numbers like the
  144. ANSI X9.17 standard. User-space programs access the
  145. pseudo-random-number device through the char device /dev/prandom.
  146. It is available as of z9.
  147. config CRYPTO_GHASH_S390
  148. tristate "GHASH digest algorithm"
  149. depends on S390
  150. select CRYPTO_HASH
  151. help
  152. This is the s390 hardware accelerated implementation of the
  153. GHASH message digest algorithm for GCM (Galois/Counter Mode).
  154. It is available as of z196.
  155. config CRYPTO_CRC32_S390
  156. tristate "CRC-32 algorithms"
  157. depends on S390
  158. select CRYPTO_HASH
  159. select CRC32
  160. help
  161. Select this option if you want to use hardware accelerated
  162. implementations of CRC algorithms. With this option, you
  163. can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
  164. and CRC-32C (Castagnoli).
  165. It is available with IBM z13 or later.
  166. config CRYPTO_DEV_MARVELL_CESA
  167. tristate "Marvell's Cryptographic Engine driver"
  168. depends on PLAT_ORION || ARCH_MVEBU
  169. select CRYPTO_AES
  170. select CRYPTO_DES
  171. select CRYPTO_BLKCIPHER
  172. select CRYPTO_HASH
  173. select SRAM
  174. help
  175. This driver allows you to utilize the Cryptographic Engines and
  176. Security Accelerator (CESA) which can be found on MVEBU and ORION
  177. platforms.
  178. This driver supports CPU offload through DMA transfers.
  179. config CRYPTO_DEV_NIAGARA2
  180. tristate "Niagara2 Stream Processing Unit driver"
  181. select CRYPTO_DES
  182. select CRYPTO_BLKCIPHER
  183. select CRYPTO_HASH
  184. select CRYPTO_MD5
  185. select CRYPTO_SHA1
  186. select CRYPTO_SHA256
  187. depends on SPARC64
  188. help
  189. Each core of a Niagara2 processor contains a Stream
  190. Processing Unit, which itself contains several cryptographic
  191. sub-units. One set provides the Modular Arithmetic Unit,
  192. used for SSL offload. The other set provides the Cipher
  193. Group, which can perform encryption, decryption, hashing,
  194. checksumming, and raw copies.
  195. config CRYPTO_DEV_HIFN_795X
  196. tristate "Driver HIFN 795x crypto accelerator chips"
  197. select CRYPTO_DES
  198. select CRYPTO_BLKCIPHER
  199. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  200. depends on PCI
  201. depends on !ARCH_DMA_ADDR_T_64BIT
  202. help
  203. This option allows you to have support for HIFN 795x crypto adapters.
  204. config CRYPTO_DEV_HIFN_795X_RNG
  205. bool "HIFN 795x random number generator"
  206. depends on CRYPTO_DEV_HIFN_795X
  207. help
  208. Select this option if you want to enable the random number generator
  209. on the HIFN 795x crypto adapters.
  210. source drivers/crypto/caam/Kconfig
  211. config CRYPTO_DEV_TALITOS
  212. tristate "Talitos Freescale Security Engine (SEC)"
  213. select CRYPTO_AEAD
  214. select CRYPTO_AUTHENC
  215. select CRYPTO_BLKCIPHER
  216. select CRYPTO_HASH
  217. select HW_RANDOM
  218. depends on FSL_SOC
  219. help
  220. Say 'Y' here to use the Freescale Security Engine (SEC)
  221. to offload cryptographic algorithm computation.
  222. The Freescale SEC is present on PowerQUICC 'E' processors, such
  223. as the MPC8349E and MPC8548E.
  224. To compile this driver as a module, choose M here: the module
  225. will be called talitos.
  226. config CRYPTO_DEV_TALITOS1
  227. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  228. depends on CRYPTO_DEV_TALITOS
  229. depends on PPC_8xx || PPC_82xx
  230. default y
  231. help
  232. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  233. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  234. version 1.2 found on MPC8xx
  235. config CRYPTO_DEV_TALITOS2
  236. bool "SEC2+ (SEC version 2.0 or upper)"
  237. depends on CRYPTO_DEV_TALITOS
  238. default y if !PPC_8xx
  239. help
  240. Say 'Y' here to use the Freescale Security Engine (SEC)
  241. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  242. config CRYPTO_DEV_IXP4XX
  243. tristate "Driver for IXP4xx crypto hardware acceleration"
  244. depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
  245. select CRYPTO_DES
  246. select CRYPTO_AEAD
  247. select CRYPTO_AUTHENC
  248. select CRYPTO_BLKCIPHER
  249. help
  250. Driver for the IXP4xx NPE crypto engine.
  251. config CRYPTO_DEV_PPC4XX
  252. tristate "Driver AMCC PPC4xx crypto accelerator"
  253. depends on PPC && 4xx
  254. select CRYPTO_HASH
  255. select CRYPTO_AEAD
  256. select CRYPTO_AES
  257. select CRYPTO_CCM
  258. select CRYPTO_CTR
  259. select CRYPTO_GCM
  260. select CRYPTO_BLKCIPHER
  261. help
  262. This option allows you to have support for AMCC crypto acceleration.
  263. config HW_RANDOM_PPC4XX
  264. bool "PowerPC 4xx generic true random number generator support"
  265. depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
  266. default y
  267. ---help---
  268. This option provides the kernel-side support for the TRNG hardware
  269. found in the security function of some PowerPC 4xx SoCs.
  270. config CRYPTO_DEV_OMAP
  271. tristate "Support for OMAP crypto HW accelerators"
  272. depends on ARCH_OMAP2PLUS
  273. help
  274. OMAP processors have various crypto HW accelerators. Select this if
  275. you want to use the OMAP modules for any of the crypto algorithms.
  276. if CRYPTO_DEV_OMAP
  277. config CRYPTO_DEV_OMAP_SHAM
  278. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  279. depends on ARCH_OMAP2PLUS
  280. select CRYPTO_SHA1
  281. select CRYPTO_MD5
  282. select CRYPTO_SHA256
  283. select CRYPTO_SHA512
  284. select CRYPTO_HMAC
  285. help
  286. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  287. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  288. config CRYPTO_DEV_OMAP_AES
  289. tristate "Support for OMAP AES hw engine"
  290. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  291. select CRYPTO_AES
  292. select CRYPTO_BLKCIPHER
  293. select CRYPTO_ENGINE
  294. select CRYPTO_CBC
  295. select CRYPTO_ECB
  296. select CRYPTO_CTR
  297. select CRYPTO_AEAD
  298. help
  299. OMAP processors have AES module accelerator. Select this if you
  300. want to use the OMAP module for AES algorithms.
  301. config CRYPTO_DEV_OMAP_DES
  302. tristate "Support for OMAP DES/3DES hw engine"
  303. depends on ARCH_OMAP2PLUS
  304. select CRYPTO_DES
  305. select CRYPTO_BLKCIPHER
  306. select CRYPTO_ENGINE
  307. help
  308. OMAP processors have DES/3DES module accelerator. Select this if you
  309. want to use the OMAP module for DES and 3DES algorithms. Currently
  310. the ECB and CBC modes of operation are supported by the driver. Also
  311. accesses made on unaligned boundaries are supported.
  312. endif # CRYPTO_DEV_OMAP
  313. config CRYPTO_DEV_PICOXCELL
  314. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  315. depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
  316. select CRYPTO_AEAD
  317. select CRYPTO_AES
  318. select CRYPTO_AUTHENC
  319. select CRYPTO_BLKCIPHER
  320. select CRYPTO_DES
  321. select CRYPTO_CBC
  322. select CRYPTO_ECB
  323. select CRYPTO_SEQIV
  324. help
  325. This option enables support for the hardware offload engines in the
  326. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  327. and for 3gpp Layer 2 ciphering support.
  328. Saying m here will build a module named pipcoxcell_crypto.
  329. config CRYPTO_DEV_SAHARA
  330. tristate "Support for SAHARA crypto accelerator"
  331. depends on ARCH_MXC && OF
  332. select CRYPTO_BLKCIPHER
  333. select CRYPTO_AES
  334. select CRYPTO_ECB
  335. help
  336. This option enables support for the SAHARA HW crypto accelerator
  337. found in some Freescale i.MX chips.
  338. config CRYPTO_DEV_MXC_SCC
  339. tristate "Support for Freescale Security Controller (SCC)"
  340. depends on ARCH_MXC && OF
  341. select CRYPTO_BLKCIPHER
  342. select CRYPTO_DES
  343. help
  344. This option enables support for the Security Controller (SCC)
  345. found in Freescale i.MX25 chips.
  346. config CRYPTO_DEV_EXYNOS_RNG
  347. tristate "EXYNOS HW pseudo random number generator support"
  348. depends on ARCH_EXYNOS || COMPILE_TEST
  349. depends on HAS_IOMEM
  350. select CRYPTO_RNG
  351. ---help---
  352. This driver provides kernel-side support through the
  353. cryptographic API for the pseudo random number generator hardware
  354. found on Exynos SoCs.
  355. To compile this driver as a module, choose M here: the
  356. module will be called exynos-rng.
  357. If unsure, say Y.
  358. config CRYPTO_DEV_S5P
  359. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  360. depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
  361. depends on HAS_IOMEM
  362. select CRYPTO_AES
  363. select CRYPTO_BLKCIPHER
  364. help
  365. This option allows you to have support for S5P crypto acceleration.
  366. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  367. algorithms execution.
  368. config CRYPTO_DEV_EXYNOS_HASH
  369. bool "Support for Samsung Exynos HASH accelerator"
  370. depends on CRYPTO_DEV_S5P
  371. depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
  372. select CRYPTO_SHA1
  373. select CRYPTO_MD5
  374. select CRYPTO_SHA256
  375. help
  376. Select this to offload Exynos from HASH MD5/SHA1/SHA256.
  377. This will select software SHA1, MD5 and SHA256 as they are
  378. needed for small and zero-size messages.
  379. HASH algorithms will be disabled if EXYNOS_RNG
  380. is enabled due to hw conflict.
  381. config CRYPTO_DEV_NX
  382. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  383. depends on PPC64
  384. help
  385. This enables support for the NX hardware cryptographic accelerator
  386. coprocessor that is in IBM PowerPC P7+ or later processors. This
  387. does not actually enable any drivers, it only allows you to select
  388. which acceleration type (encryption and/or compression) to enable.
  389. if CRYPTO_DEV_NX
  390. source "drivers/crypto/nx/Kconfig"
  391. endif
  392. config CRYPTO_DEV_UX500
  393. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  394. depends on ARCH_U8500
  395. help
  396. Driver for ST-Ericsson UX500 crypto engine.
  397. if CRYPTO_DEV_UX500
  398. source "drivers/crypto/ux500/Kconfig"
  399. endif # if CRYPTO_DEV_UX500
  400. config CRYPTO_DEV_ATMEL_AUTHENC
  401. tristate "Support for Atmel IPSEC/SSL hw accelerator"
  402. depends on ARCH_AT91 || COMPILE_TEST
  403. select CRYPTO_AUTHENC
  404. select CRYPTO_DEV_ATMEL_AES
  405. select CRYPTO_DEV_ATMEL_SHA
  406. help
  407. Some Atmel processors can combine the AES and SHA hw accelerators
  408. to enhance support of IPSEC/SSL.
  409. Select this if you want to use the Atmel modules for
  410. authenc(hmac(shaX),Y(cbc)) algorithms.
  411. config CRYPTO_DEV_ATMEL_AES
  412. tristate "Support for Atmel AES hw accelerator"
  413. depends on ARCH_AT91 || COMPILE_TEST
  414. select CRYPTO_AES
  415. select CRYPTO_AEAD
  416. select CRYPTO_BLKCIPHER
  417. help
  418. Some Atmel processors have AES hw accelerator.
  419. Select this if you want to use the Atmel module for
  420. AES algorithms.
  421. To compile this driver as a module, choose M here: the module
  422. will be called atmel-aes.
  423. config CRYPTO_DEV_ATMEL_TDES
  424. tristate "Support for Atmel DES/TDES hw accelerator"
  425. depends on ARCH_AT91 || COMPILE_TEST
  426. select CRYPTO_DES
  427. select CRYPTO_BLKCIPHER
  428. help
  429. Some Atmel processors have DES/TDES hw accelerator.
  430. Select this if you want to use the Atmel module for
  431. DES/TDES algorithms.
  432. To compile this driver as a module, choose M here: the module
  433. will be called atmel-tdes.
  434. config CRYPTO_DEV_ATMEL_SHA
  435. tristate "Support for Atmel SHA hw accelerator"
  436. depends on ARCH_AT91 || COMPILE_TEST
  437. select CRYPTO_HASH
  438. help
  439. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  440. hw accelerator.
  441. Select this if you want to use the Atmel module for
  442. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  443. To compile this driver as a module, choose M here: the module
  444. will be called atmel-sha.
  445. config CRYPTO_DEV_ATMEL_ECC
  446. tristate "Support for Microchip / Atmel ECC hw accelerator"
  447. depends on ARCH_AT91 || COMPILE_TEST
  448. depends on I2C
  449. select CRYPTO_ECDH
  450. select CRC16
  451. help
  452. Microhip / Atmel ECC hw accelerator.
  453. Select this if you want to use the Microchip / Atmel module for
  454. ECDH algorithm.
  455. To compile this driver as a module, choose M here: the module
  456. will be called atmel-ecc.
  457. config CRYPTO_DEV_CCP
  458. bool "Support for AMD Secure Processor"
  459. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  460. help
  461. The AMD Secure Processor provides support for the Cryptographic Coprocessor
  462. (CCP) and the Platform Security Processor (PSP) devices.
  463. if CRYPTO_DEV_CCP
  464. source "drivers/crypto/ccp/Kconfig"
  465. endif
  466. config CRYPTO_DEV_MXS_DCP
  467. tristate "Support for Freescale MXS DCP"
  468. depends on (ARCH_MXS || ARCH_MXC)
  469. select STMP_DEVICE
  470. select CRYPTO_CBC
  471. select CRYPTO_ECB
  472. select CRYPTO_AES
  473. select CRYPTO_BLKCIPHER
  474. select CRYPTO_HASH
  475. help
  476. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  477. co-processor on the die.
  478. To compile this driver as a module, choose M here: the module
  479. will be called mxs-dcp.
  480. source "drivers/crypto/qat/Kconfig"
  481. source "drivers/crypto/cavium/cpt/Kconfig"
  482. source "drivers/crypto/cavium/nitrox/Kconfig"
  483. config CRYPTO_DEV_CAVIUM_ZIP
  484. tristate "Cavium ZIP driver"
  485. depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
  486. ---help---
  487. Select this option if you want to enable compression/decompression
  488. acceleration on Cavium's ARM based SoCs
  489. config CRYPTO_DEV_QCE
  490. tristate "Qualcomm crypto engine accelerator"
  491. depends on ARCH_QCOM || COMPILE_TEST
  492. depends on HAS_IOMEM
  493. select CRYPTO_AES
  494. select CRYPTO_DES
  495. select CRYPTO_ECB
  496. select CRYPTO_CBC
  497. select CRYPTO_XTS
  498. select CRYPTO_CTR
  499. select CRYPTO_BLKCIPHER
  500. help
  501. This driver supports Qualcomm crypto engine accelerator
  502. hardware. To compile this driver as a module, choose M here. The
  503. module will be called qcrypto.
  504. config CRYPTO_DEV_QCOM_RNG
  505. tristate "Qualcomm Random Number Generator Driver"
  506. depends on ARCH_QCOM || COMPILE_TEST
  507. select CRYPTO_RNG
  508. help
  509. This driver provides support for the Random Number
  510. Generator hardware found on Qualcomm SoCs.
  511. To compile this driver as a module, choose M here. The
  512. module will be called qcom-rng. If unsure, say N.
  513. config CRYPTO_DEV_VMX
  514. bool "Support for VMX cryptographic acceleration instructions"
  515. depends on PPC64 && VSX
  516. help
  517. Support for VMX cryptographic acceleration instructions.
  518. source "drivers/crypto/vmx/Kconfig"
  519. config CRYPTO_DEV_IMGTEC_HASH
  520. tristate "Imagination Technologies hardware hash accelerator"
  521. depends on MIPS || COMPILE_TEST
  522. select CRYPTO_MD5
  523. select CRYPTO_SHA1
  524. select CRYPTO_SHA256
  525. select CRYPTO_HASH
  526. help
  527. This driver interfaces with the Imagination Technologies
  528. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  529. hashing algorithms.
  530. config CRYPTO_DEV_SUN4I_SS
  531. tristate "Support for Allwinner Security System cryptographic accelerator"
  532. depends on ARCH_SUNXI && !64BIT
  533. select CRYPTO_MD5
  534. select CRYPTO_SHA1
  535. select CRYPTO_AES
  536. select CRYPTO_DES
  537. select CRYPTO_BLKCIPHER
  538. help
  539. Some Allwinner SoC have a crypto accelerator named
  540. Security System. Select this if you want to use it.
  541. The Security System handle AES/DES/3DES ciphers in CBC mode
  542. and SHA1 and MD5 hash algorithms.
  543. To compile this driver as a module, choose M here: the module
  544. will be called sun4i-ss.
  545. config CRYPTO_DEV_SUN4I_SS_PRNG
  546. bool "Support for Allwinner Security System PRNG"
  547. depends on CRYPTO_DEV_SUN4I_SS
  548. select CRYPTO_RNG
  549. help
  550. Select this option if you want to provide kernel-side support for
  551. the Pseudo-Random Number Generator found in the Security System.
  552. config CRYPTO_DEV_ROCKCHIP
  553. tristate "Rockchip's Cryptographic Engine driver"
  554. depends on OF && ARCH_ROCKCHIP
  555. select CRYPTO_AES
  556. select CRYPTO_DES
  557. select CRYPTO_MD5
  558. select CRYPTO_SHA1
  559. select CRYPTO_SHA256
  560. select CRYPTO_HASH
  561. select CRYPTO_BLKCIPHER
  562. help
  563. This driver interfaces with the hardware crypto accelerator.
  564. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
  565. config CRYPTO_DEV_MEDIATEK
  566. tristate "MediaTek's EIP97 Cryptographic Engine driver"
  567. depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
  568. select CRYPTO_AES
  569. select CRYPTO_AEAD
  570. select CRYPTO_BLKCIPHER
  571. select CRYPTO_CTR
  572. select CRYPTO_SHA1
  573. select CRYPTO_SHA256
  574. select CRYPTO_SHA512
  575. select CRYPTO_HMAC
  576. help
  577. This driver allows you to utilize the hardware crypto accelerator
  578. EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
  579. Select this if you want to use it for AES/SHA1/SHA2 algorithms.
  580. source "drivers/crypto/chelsio/Kconfig"
  581. source "drivers/crypto/virtio/Kconfig"
  582. config CRYPTO_DEV_BCM_SPU
  583. tristate "Broadcom symmetric crypto/hash acceleration support"
  584. depends on ARCH_BCM_IPROC
  585. depends on MAILBOX
  586. default m
  587. select CRYPTO_AUTHENC
  588. select CRYPTO_DES
  589. select CRYPTO_MD5
  590. select CRYPTO_SHA1
  591. select CRYPTO_SHA256
  592. select CRYPTO_SHA512
  593. help
  594. This driver provides support for Broadcom crypto acceleration using the
  595. Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
  596. ahash, and aead algorithms with the kernel cryptographic API.
  597. source "drivers/crypto/stm32/Kconfig"
  598. config CRYPTO_DEV_SAFEXCEL
  599. tristate "Inside Secure's SafeXcel cryptographic engine driver"
  600. depends on OF
  601. depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
  602. select CRYPTO_AES
  603. select CRYPTO_AUTHENC
  604. select CRYPTO_BLKCIPHER
  605. select CRYPTO_DES
  606. select CRYPTO_HASH
  607. select CRYPTO_HMAC
  608. select CRYPTO_MD5
  609. select CRYPTO_SHA1
  610. select CRYPTO_SHA256
  611. select CRYPTO_SHA512
  612. help
  613. This driver interfaces with the SafeXcel EIP-197 cryptographic engine
  614. designed by Inside Secure. Select this if you want to use CBC/ECB
  615. chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
  616. algorithms.
  617. config CRYPTO_DEV_ARTPEC6
  618. tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
  619. depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
  620. depends on OF
  621. select CRYPTO_AEAD
  622. select CRYPTO_AES
  623. select CRYPTO_ALGAPI
  624. select CRYPTO_BLKCIPHER
  625. select CRYPTO_CTR
  626. select CRYPTO_HASH
  627. select CRYPTO_SHA1
  628. select CRYPTO_SHA256
  629. select CRYPTO_SHA512
  630. help
  631. Enables the driver for the on-chip crypto accelerator
  632. of Axis ARTPEC SoCs.
  633. To compile this driver as a module, choose M here.
  634. config CRYPTO_DEV_CCREE
  635. tristate "Support for ARM TrustZone CryptoCell family of security processors"
  636. depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
  637. default n
  638. select CRYPTO_HASH
  639. select CRYPTO_BLKCIPHER
  640. select CRYPTO_DES
  641. select CRYPTO_AEAD
  642. select CRYPTO_AUTHENC
  643. select CRYPTO_SHA1
  644. select CRYPTO_MD5
  645. select CRYPTO_SHA256
  646. select CRYPTO_SHA512
  647. select CRYPTO_HMAC
  648. select CRYPTO_AES
  649. select CRYPTO_CBC
  650. select CRYPTO_ECB
  651. select CRYPTO_CTR
  652. select CRYPTO_XTS
  653. help
  654. Say 'Y' to enable a driver for the REE interface of the Arm
  655. TrustZone CryptoCell family of processors. Currently the
  656. CryptoCell 712, 710 and 630 are supported.
  657. Choose this if you wish to use hardware acceleration of
  658. cryptographic operations on the system REE.
  659. If unsure say Y.
  660. source "drivers/crypto/hisilicon/Kconfig"
  661. endif # CRYPTO_HW