board-da830-evm.c 17 KB

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  1. /*
  2. * TI DA830/OMAP L137 EVM board
  3. *
  4. * Author: Mark A. Greer <mgreer@mvista.com>
  5. * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
  6. *
  7. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  8. * the terms of the GNU General Public License version 2. This program
  9. * is licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/console.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/gpio.h>
  17. #include <linux/gpio/machine.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/i2c.h>
  20. #include <linux/platform_data/pcf857x.h>
  21. #include <linux/platform_data/at24.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/partitions.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/spi/flash.h>
  26. #include <linux/platform_data/gpio-davinci.h>
  27. #include <linux/platform_data/mtd-davinci.h>
  28. #include <linux/platform_data/mtd-davinci-aemif.h>
  29. #include <linux/platform_data/spi-davinci.h>
  30. #include <linux/platform_data/usb-davinci.h>
  31. #include <linux/platform_data/ti-aemif.h>
  32. #include <linux/regulator/machine.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/mach/arch.h>
  35. #include <mach/common.h>
  36. #include "cp_intc.h"
  37. #include <mach/mux.h>
  38. #include <mach/da8xx.h>
  39. #define DA830_EVM_PHY_ID ""
  40. /*
  41. * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
  42. */
  43. #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
  44. #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
  45. static const short da830_evm_usb11_pins[] = {
  46. DA830_GPIO1_15, DA830_GPIO2_4,
  47. -1
  48. };
  49. static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
  50. static int da830_evm_usb_set_power(unsigned port, int on)
  51. {
  52. gpio_set_value(ON_BD_USB_DRV, on);
  53. return 0;
  54. }
  55. static int da830_evm_usb_get_power(unsigned port)
  56. {
  57. return gpio_get_value(ON_BD_USB_DRV);
  58. }
  59. static int da830_evm_usb_get_oci(unsigned port)
  60. {
  61. return !gpio_get_value(ON_BD_USB_OVC);
  62. }
  63. static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
  64. static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
  65. {
  66. int irq = gpio_to_irq(ON_BD_USB_OVC);
  67. int error = 0;
  68. if (handler != NULL) {
  69. da830_evm_usb_ocic_handler = handler;
  70. error = request_irq(irq, da830_evm_usb_ocic_irq,
  71. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  72. "OHCI over-current indicator", NULL);
  73. if (error)
  74. pr_err("%s: could not request IRQ to watch over-current indicator changes\n",
  75. __func__);
  76. } else
  77. free_irq(irq, NULL);
  78. return error;
  79. }
  80. static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
  81. .set_power = da830_evm_usb_set_power,
  82. .get_power = da830_evm_usb_get_power,
  83. .get_oci = da830_evm_usb_get_oci,
  84. .ocic_notify = da830_evm_usb_ocic_notify,
  85. /* TPS2065 switch @ 5V */
  86. .potpgt = (3 + 1) / 2, /* 3 ms max */
  87. };
  88. static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
  89. {
  90. da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
  91. return IRQ_HANDLED;
  92. }
  93. static __init void da830_evm_usb_init(void)
  94. {
  95. int ret;
  96. ret = da8xx_register_usb_phy_clocks();
  97. if (ret)
  98. pr_warn("%s: USB PHY CLK registration failed: %d\n",
  99. __func__, ret);
  100. ret = da8xx_register_usb_phy();
  101. if (ret)
  102. pr_warn("%s: USB PHY registration failed: %d\n",
  103. __func__, ret);
  104. ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
  105. if (ret)
  106. pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
  107. else {
  108. /*
  109. * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
  110. * with the power on to power good time of 3 ms.
  111. */
  112. ret = da8xx_register_usb20(1000, 3);
  113. if (ret)
  114. pr_warn("%s: USB 2.0 registration failed: %d\n",
  115. __func__, ret);
  116. }
  117. ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
  118. if (ret) {
  119. pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
  120. return;
  121. }
  122. ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
  123. if (ret) {
  124. pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n",
  125. __func__, ret);
  126. return;
  127. }
  128. gpio_direction_output(ON_BD_USB_DRV, 0);
  129. ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
  130. if (ret) {
  131. pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n",
  132. __func__, ret);
  133. return;
  134. }
  135. gpio_direction_input(ON_BD_USB_OVC);
  136. ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
  137. if (ret)
  138. pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
  139. }
  140. static const short da830_evm_mcasp1_pins[] = {
  141. DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
  142. DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
  143. DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
  144. DA830_AXR1_11,
  145. -1
  146. };
  147. static u8 da830_iis_serializer_direction[] = {
  148. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  149. INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
  150. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  151. };
  152. static struct snd_platform_data da830_evm_snd_data = {
  153. .tx_dma_offset = 0x2000,
  154. .rx_dma_offset = 0x2000,
  155. .op_mode = DAVINCI_MCASP_IIS_MODE,
  156. .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
  157. .tdm_slots = 2,
  158. .serial_dir = da830_iis_serializer_direction,
  159. .asp_chan_q = EVENTQ_0,
  160. .version = MCASP_VERSION_2,
  161. .txnumevt = 1,
  162. .rxnumevt = 1,
  163. };
  164. /*
  165. * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
  166. */
  167. static const short da830_evm_mmc_sd_pins[] = {
  168. DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
  169. DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
  170. DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
  171. DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
  172. -1
  173. };
  174. #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
  175. #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
  176. static struct gpiod_lookup_table mmc_gpios_table = {
  177. .dev_id = "da830-mmc.0",
  178. .table = {
  179. /* gpio chip 1 contains gpio range 32-63 */
  180. GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_CD_PIN, "cd",
  181. GPIO_ACTIVE_LOW),
  182. GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_WP_PIN, "wp",
  183. GPIO_ACTIVE_LOW),
  184. },
  185. };
  186. static struct davinci_mmc_config da830_evm_mmc_config = {
  187. .wires = 8,
  188. .max_freq = 50000000,
  189. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  190. };
  191. static inline void da830_evm_init_mmc(void)
  192. {
  193. int ret;
  194. ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
  195. if (ret) {
  196. pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret);
  197. return;
  198. }
  199. gpiod_add_lookup_table(&mmc_gpios_table);
  200. ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
  201. if (ret) {
  202. pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret);
  203. gpiod_remove_lookup_table(&mmc_gpios_table);
  204. }
  205. }
  206. #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
  207. #ifdef CONFIG_DA830_UI_NAND
  208. static struct mtd_partition da830_evm_nand_partitions[] = {
  209. /* bootloader (U-Boot, etc) in first sector */
  210. [0] = {
  211. .name = "bootloader",
  212. .offset = 0,
  213. .size = SZ_128K,
  214. .mask_flags = MTD_WRITEABLE, /* force read-only */
  215. },
  216. /* bootloader params in the next sector */
  217. [1] = {
  218. .name = "params",
  219. .offset = MTDPART_OFS_APPEND,
  220. .size = SZ_128K,
  221. .mask_flags = MTD_WRITEABLE, /* force read-only */
  222. },
  223. /* kernel */
  224. [2] = {
  225. .name = "kernel",
  226. .offset = MTDPART_OFS_APPEND,
  227. .size = SZ_2M,
  228. .mask_flags = 0,
  229. },
  230. /* file system */
  231. [3] = {
  232. .name = "filesystem",
  233. .offset = MTDPART_OFS_APPEND,
  234. .size = MTDPART_SIZ_FULL,
  235. .mask_flags = 0,
  236. }
  237. };
  238. /* flash bbt decriptors */
  239. static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
  240. static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
  241. static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
  242. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  243. NAND_BBT_WRITE | NAND_BBT_2BIT |
  244. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  245. .offs = 2,
  246. .len = 4,
  247. .veroffs = 16,
  248. .maxblocks = 4,
  249. .pattern = da830_evm_nand_bbt_pattern
  250. };
  251. static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
  252. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  253. NAND_BBT_WRITE | NAND_BBT_2BIT |
  254. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  255. .offs = 2,
  256. .len = 4,
  257. .veroffs = 16,
  258. .maxblocks = 4,
  259. .pattern = da830_evm_nand_mirror_pattern
  260. };
  261. static struct davinci_aemif_timing da830_evm_nandflash_timing = {
  262. .wsetup = 24,
  263. .wstrobe = 21,
  264. .whold = 14,
  265. .rsetup = 19,
  266. .rstrobe = 50,
  267. .rhold = 0,
  268. .ta = 20,
  269. };
  270. static struct davinci_nand_pdata da830_evm_nand_pdata = {
  271. .core_chipsel = 1,
  272. .parts = da830_evm_nand_partitions,
  273. .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
  274. .ecc_mode = NAND_ECC_HW,
  275. .ecc_bits = 4,
  276. .bbt_options = NAND_BBT_USE_FLASH,
  277. .bbt_td = &da830_evm_nand_bbt_main_descr,
  278. .bbt_md = &da830_evm_nand_bbt_mirror_descr,
  279. .timing = &da830_evm_nandflash_timing,
  280. };
  281. static struct resource da830_evm_nand_resources[] = {
  282. [0] = { /* First memory resource is NAND I/O window */
  283. .start = DA8XX_AEMIF_CS3_BASE,
  284. .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
  285. .flags = IORESOURCE_MEM,
  286. },
  287. [1] = { /* Second memory resource is AEMIF control registers */
  288. .start = DA8XX_AEMIF_CTL_BASE,
  289. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  290. .flags = IORESOURCE_MEM,
  291. },
  292. };
  293. static struct platform_device da830_evm_aemif_devices[] = {
  294. {
  295. .name = "davinci_nand",
  296. .id = 1,
  297. .dev = {
  298. .platform_data = &da830_evm_nand_pdata,
  299. },
  300. .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
  301. .resource = da830_evm_nand_resources,
  302. },
  303. };
  304. static struct resource da830_evm_aemif_resource[] = {
  305. {
  306. .start = DA8XX_AEMIF_CTL_BASE,
  307. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  308. .flags = IORESOURCE_MEM,
  309. },
  310. };
  311. static struct aemif_abus_data da830_evm_aemif_abus_data[] = {
  312. {
  313. .cs = 3,
  314. },
  315. };
  316. static struct aemif_platform_data da830_evm_aemif_pdata = {
  317. .abus_data = da830_evm_aemif_abus_data,
  318. .num_abus_data = ARRAY_SIZE(da830_evm_aemif_abus_data),
  319. .sub_devices = da830_evm_aemif_devices,
  320. .num_sub_devices = ARRAY_SIZE(da830_evm_aemif_devices),
  321. .cs_offset = 2,
  322. };
  323. static struct platform_device da830_evm_aemif_device = {
  324. .name = "ti-aemif",
  325. .id = -1,
  326. .dev = {
  327. .platform_data = &da830_evm_aemif_pdata,
  328. },
  329. .resource = da830_evm_aemif_resource,
  330. .num_resources = ARRAY_SIZE(da830_evm_aemif_resource),
  331. };
  332. /*
  333. * UI board NAND/NOR flashes only use 8-bit data bus.
  334. */
  335. static const short da830_evm_emif25_pins[] = {
  336. DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
  337. DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
  338. DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
  339. DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
  340. DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
  341. DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
  342. DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
  343. -1
  344. };
  345. static inline void da830_evm_init_nand(int mux_mode)
  346. {
  347. int ret;
  348. if (HAS_MMC) {
  349. pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n"
  350. "\tDisable MMC/SD for NAND support\n");
  351. return;
  352. }
  353. ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
  354. if (ret)
  355. pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
  356. ret = platform_device_register(&da830_evm_aemif_device);
  357. if (ret)
  358. pr_warn("%s: AEMIF device not registered\n", __func__);
  359. gpio_direction_output(mux_mode, 1);
  360. }
  361. #else
  362. static inline void da830_evm_init_nand(int mux_mode) { }
  363. #endif
  364. #ifdef CONFIG_DA830_UI_LCD
  365. static inline void da830_evm_init_lcdc(int mux_mode)
  366. {
  367. int ret;
  368. ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
  369. if (ret)
  370. pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret);
  371. ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
  372. if (ret)
  373. pr_warn("%s: lcd setup failed: %d\n", __func__, ret);
  374. gpio_direction_output(mux_mode, 0);
  375. }
  376. #else
  377. static inline void da830_evm_init_lcdc(int mux_mode) { }
  378. #endif
  379. static struct at24_platform_data da830_evm_i2c_eeprom_info = {
  380. .byte_len = SZ_256K / 8,
  381. .page_size = 64,
  382. .flags = AT24_FLAG_ADDR16,
  383. .setup = davinci_get_mac_addr,
  384. .context = (void *)0x7f00,
  385. };
  386. static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
  387. int gpio, unsigned ngpio, void *context)
  388. {
  389. gpio_request(gpio + 6, "UI MUX_MODE");
  390. /* Drive mux mode low to match the default without UI card */
  391. gpio_direction_output(gpio + 6, 0);
  392. da830_evm_init_lcdc(gpio + 6);
  393. da830_evm_init_nand(gpio + 6);
  394. return 0;
  395. }
  396. static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
  397. unsigned ngpio, void *context)
  398. {
  399. gpio_free(gpio + 6);
  400. return 0;
  401. }
  402. static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
  403. .gpio_base = DAVINCI_N_GPIO,
  404. .setup = da830_evm_ui_expander_setup,
  405. .teardown = da830_evm_ui_expander_teardown,
  406. };
  407. static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
  408. {
  409. I2C_BOARD_INFO("24c256", 0x50),
  410. .platform_data = &da830_evm_i2c_eeprom_info,
  411. },
  412. {
  413. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  414. },
  415. {
  416. I2C_BOARD_INFO("pcf8574", 0x3f),
  417. .platform_data = &da830_evm_ui_expander_info,
  418. },
  419. };
  420. static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
  421. .bus_freq = 100, /* kHz */
  422. .bus_delay = 0, /* usec */
  423. };
  424. /*
  425. * The following EDMA channels/slots are not being used by drivers (for
  426. * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
  427. * they are being reserved for codecs on the DSP side.
  428. */
  429. static const s16 da830_dma_rsv_chans[][2] = {
  430. /* (offset, number) */
  431. { 8, 2},
  432. {12, 2},
  433. {24, 4},
  434. {30, 2},
  435. {-1, -1}
  436. };
  437. static const s16 da830_dma_rsv_slots[][2] = {
  438. /* (offset, number) */
  439. { 8, 2},
  440. {12, 2},
  441. {24, 4},
  442. {30, 26},
  443. {-1, -1}
  444. };
  445. static struct edma_rsv_info da830_edma_rsv[] = {
  446. {
  447. .rsv_chans = da830_dma_rsv_chans,
  448. .rsv_slots = da830_dma_rsv_slots,
  449. },
  450. };
  451. static struct mtd_partition da830evm_spiflash_part[] = {
  452. [0] = {
  453. .name = "DSP-UBL",
  454. .offset = 0,
  455. .size = SZ_8K,
  456. .mask_flags = MTD_WRITEABLE,
  457. },
  458. [1] = {
  459. .name = "ARM-UBL",
  460. .offset = MTDPART_OFS_APPEND,
  461. .size = SZ_16K + SZ_8K,
  462. .mask_flags = MTD_WRITEABLE,
  463. },
  464. [2] = {
  465. .name = "U-Boot",
  466. .offset = MTDPART_OFS_APPEND,
  467. .size = SZ_256K - SZ_32K,
  468. .mask_flags = MTD_WRITEABLE,
  469. },
  470. [3] = {
  471. .name = "U-Boot-Environment",
  472. .offset = MTDPART_OFS_APPEND,
  473. .size = SZ_16K,
  474. .mask_flags = 0,
  475. },
  476. [4] = {
  477. .name = "Kernel",
  478. .offset = MTDPART_OFS_APPEND,
  479. .size = MTDPART_SIZ_FULL,
  480. .mask_flags = 0,
  481. },
  482. };
  483. static struct flash_platform_data da830evm_spiflash_data = {
  484. .name = "m25p80",
  485. .parts = da830evm_spiflash_part,
  486. .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
  487. .type = "w25x32",
  488. };
  489. static struct davinci_spi_config da830evm_spiflash_cfg = {
  490. .io_type = SPI_IO_TYPE_DMA,
  491. .c2tdelay = 8,
  492. .t2cdelay = 8,
  493. };
  494. static struct spi_board_info da830evm_spi_info[] = {
  495. {
  496. .modalias = "m25p80",
  497. .platform_data = &da830evm_spiflash_data,
  498. .controller_data = &da830evm_spiflash_cfg,
  499. .mode = SPI_MODE_0,
  500. .max_speed_hz = 30000000,
  501. .bus_num = 0,
  502. .chip_select = 0,
  503. },
  504. };
  505. static __init void da830_evm_init(void)
  506. {
  507. struct davinci_soc_info *soc_info = &davinci_soc_info;
  508. int ret;
  509. da830_register_clocks();
  510. ret = da830_register_gpio();
  511. if (ret)
  512. pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
  513. ret = da830_register_edma(da830_edma_rsv);
  514. if (ret)
  515. pr_warn("%s: edma registration failed: %d\n", __func__, ret);
  516. ret = davinci_cfg_reg_list(da830_i2c0_pins);
  517. if (ret)
  518. pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret);
  519. ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
  520. if (ret)
  521. pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret);
  522. da830_evm_usb_init();
  523. soc_info->emac_pdata->rmii_en = 1;
  524. soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
  525. ret = davinci_cfg_reg_list(da830_cpgmac_pins);
  526. if (ret)
  527. pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret);
  528. ret = da8xx_register_emac();
  529. if (ret)
  530. pr_warn("%s: emac registration failed: %d\n", __func__, ret);
  531. ret = da8xx_register_watchdog();
  532. if (ret)
  533. pr_warn("%s: watchdog registration failed: %d\n",
  534. __func__, ret);
  535. davinci_serial_init(da8xx_serial_device);
  536. i2c_register_board_info(1, da830_evm_i2c_devices,
  537. ARRAY_SIZE(da830_evm_i2c_devices));
  538. ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
  539. if (ret)
  540. pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret);
  541. da8xx_register_mcasp(1, &da830_evm_snd_data);
  542. da830_evm_init_mmc();
  543. ret = da8xx_register_rtc();
  544. if (ret)
  545. pr_warn("%s: rtc setup failed: %d\n", __func__, ret);
  546. ret = spi_register_board_info(da830evm_spi_info,
  547. ARRAY_SIZE(da830evm_spi_info));
  548. if (ret)
  549. pr_warn("%s: spi info registration failed: %d\n",
  550. __func__, ret);
  551. ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
  552. if (ret)
  553. pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);
  554. regulator_has_full_constraints();
  555. }
  556. #ifdef CONFIG_SERIAL_8250_CONSOLE
  557. static int __init da830_evm_console_init(void)
  558. {
  559. if (!machine_is_davinci_da830_evm())
  560. return 0;
  561. return add_preferred_console("ttyS", 2, "115200");
  562. }
  563. console_initcall(da830_evm_console_init);
  564. #endif
  565. static void __init da830_evm_map_io(void)
  566. {
  567. da830_init();
  568. }
  569. MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
  570. .atag_offset = 0x100,
  571. .map_io = da830_evm_map_io,
  572. .init_irq = cp_intc_init,
  573. .init_time = da830_init_time,
  574. .init_machine = da830_evm_init,
  575. .init_late = davinci_init_late,
  576. .dma_zone_size = SZ_128M,
  577. MACHINE_END